Abstract: An optical detector module can be used to implement proximity sensing function by detecting ambient light outside of the optical detector module in accordance with a first detection threshold. An optical detector module can be further used to implement other active functions such as material detection (e.g., skin) or depth-sensing by emitting one or more optical signals (e.g., light pulses at a specific wavelength) and detecting the reflected optical signals relative to a second and/or third detection threshold. The disclosure provides technical solutions for actively monitoring detection threshold(s) of an optical detector module to achieve better power management. In some embodiments, such solutions are useful for photodetectors having a wide sensing bandwidth, such as a photodetector formed in germanium or a photodetector comprising an absorption region comprising germanium.

Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

Abstract: A hardware-in-the-loop (HIL) simulation device is provided, which includes a processing circuit and a pulse-width modulation (PWM) signal observation circuit. The PWM signal observation circuit includes an energy storage unit and the energy storage unit is coupled to the processing circuit. A signal source transmits a PWM signal to the processing circuit and the PWM signal observation circuit, and the energy storage unit is charged when the PWM signal is at high level. The processing circuit detects the voltage of the energy storage unit when detecting the falling edge of the PWM signal so as to calculate the duty cycle of the PWM signal.

Abstract: A semiconductor package structure includes a conductive structure, at least one semiconductor element, an encapsulant, a redistribution structure and a plurality of bonding wires. The semiconductor element is disposed on and electrically connected to the conductive structure. The encapsulant is disposed on the conductive structure to cover the semiconductor element. The redistribution structure is disposed on the encapsulant, and includes a redistribution layer. The bonding wires electrically connect the redistribution structure and the conductive structure.

Abstract: Systems, apparatuses, and methods for multi-application optical sensing are provided. For example, an optical sensing apparatus can include a photodetector array, a first circuitry, and a second circuitry. The photodetector array includes a plurality of photodetectors, wherein a first subset of the plurality of photodetectors are configured as a first region for detecting a first optical signal, and a second subset of the plurality of photodetectors are configured as a second region for detecting a second optical signal. The first circuitry, coupled to the first region, is configured to perform a first function based on the first optical signal to output a first output result. The second circuitry, coupled to the second region, is configured to perform a second function based on the second optical signal to output a second output result.

Abstract: A smart charging method and an electronic device using the same are provided. The smart charging method includes the following steps. Whether an electronic device is connected to a charger is determined. If the battery is connected to the charger, whether a current time is within a predetermined idle period is determined. If the current time is within the predetermined idle period, a battery of the electronic device is charged at a charge rate less than 0.8C by constant current charging, which lasts for a predetermined constant current charging time. After the predetermined constant current charging time is over, the battery is idled for a predetermined idle time. After the predetermined idle time is over, the battery is charged by constant voltage charging.

Abstract: A method for forming a FinFET device structure is provided. The FinFET device structure includes a first fin structure extending above a substrate, and a first liner layer formed on a first sidewall surface of the first fin structure. The FinFET device structure includes a gate dielectric layer formed over the first fin structure and the first liner layer, wherein a sidewall surface of the gate dielectric layer is aligned with a sidewall surface of the first liner layer.

Abstract: An electronic apparatus and a hotkey prompt method thereof are provided. The method includes the following steps. A power-on self-test (POST) procedure of a basic input output system (BIOS) is performed. During the POST procedure, a display panel of a keyboard module is controlled to display a first keyboard layout, so as to display at least one hotkey corresponding to at least one hotkey function of the BIOS via the display panel. After a hotkey input operation is received via the keyboard, a first hotkey function of the at least one hotkey function of the BIOS is performed. The hotkey input operation is used to enable the first hotkey function. In response to performing the first hotkey function, the display panel of the keyboard module is controlled to display a second keyboard layout.

Abstract: A high hardness and temperature-resistant alloy is disclosed, and comprises 10-40 atomic percent Co, 30-56 atomic percent Cr, 10-40 atomic percent Ni, 6-13 atomic percent C, 0-8 atomic percent Mo, and 0-8 atomic percent W. Moreover, the elemental composition of the high hardness and temperature-resistant alloy can further comprise at least one additive element, such as Pb, Sn, Ge, Si, Zn, Sb, P, B, Mg, Mn, V, Nb, Ti, Zr, Y, La, Ce, Al, Ta, Cu, and Fe. Experimental data reveal that, the high hardness and temperature-resistant alloy can still show a property of hardness greater than HV100 in 900 degrees Celsius. Therefore, experimental data have proved that the high hardness and temperature-resistant alloy has a significant potential for applications in the manufacture of hot working die metals, components (e.g., turbine blade) for high temperature applications, and devices (e.g., aeroengine) for high temperature applications.

Abstract: Apparatuses and methods for calculating heart rate are disclosed herein. The apparatus can include a processor configured to calculate heart rate information. The processor includes a heart rate calculator including a memory configured to store a PPG signal and a calculation element coupled to the memory and configured to calculate a heart rate value and generate at least one quality checking factor according to the PPG signal. The processor also includes a checking element configured to determine a validity indicator according to the at least one quality checking factor, a memory control element coupled to the memory and configured to access the memory to transmit the PPG signal, and a multiplexer configured to output the PPG signal accessed by the memory control element or the heart rate value calculated by the calculation element according to the validity indicator.

Abstract: An optical detector module can be used to implement proximity sensing function by detecting ambient light outside of the optical detector module in accordance with a first detection threshold. An optical detector module can be further used to implement other active functions such as material detection (e.g., skin) or depth-sensing by emitting one or more optical signals (e.g., light pulses at a specific wavelength) and detecting the reflected optical signals relative to a second and/or third detection threshold. The disclosure provides technical solutions for actively monitoring detection threshold(s) of an optical detector module to achieve better power management. In some embodiments, such solutions are useful for photodetectors having a wide sensing bandwidth, such as a photodetector formed in germanium or a photodetector comprising an absorption region comprising germanium.

Abstract: The invention provides a layout pattern of static random access memory, which comprises a plurality of fin structures on a substrate, a plurality of gate structures on the substrate and spanning the fin structures to form a plurality of transistors distributed on the substrate. The transistors include a first pull-up transistor (PU1), a first pull-down transistor (PD1), a second pull-up transistor (PU2) and a second pull-down transistor (PD2), a first access transistor (PG1), a second access transistor (PG2), a first read port transistor (RPD) and a second read port transistor (RPG). The gate structure of the first read port transistor (RPD) is connected to the gate structure of the first pull-down transistor (PD1), wherein a drain of the first pull-down transistor (PD1) is connected to a first voltage source Vss1, and a drain of the first read port transistor (RPD) is connected to a second voltage source Vss2.

Abstract: A light-emitting diode LED driver and a LED driving device including the LED driver are provided. The light-emitting diode LED driver includes a decoding circuit that receives a data signal and decodes the data signal to generate display data used to drive LEDs to emit light and display and a recovered clock signal. Further provided is an encoding circuit that encodes the decoded display data by using the recovered clock signal to generate an encoded data signal, where the data signal is encoded in a first encoding format, and the encoded data signal is encoded in a second encoding format.

Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.

Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).

Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.

Abstract: A method for forming a FinFET device structure is provided. The method includes forming a first fin structure and a second fin structure over a substrate and forming a liner layer over the first fin structure and the second fin structure. The method also includes forming an isolation layer over the liner layer and removing a portion of the liner layer and a portion of the isolation layer, such that the liner layer includes a first liner layer on an outer sidewall surface of the first fin structure and a second liner layer on an inner sidewall surface of the first fin structure, and a top surface of the second liner layer is higher than a top surface of the first liner layer.