Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8042730
    Abstract: A food menu having electronic labels is disclosed. The food menu comprises at least one ordering page and at least one electronic label. Each ordering page has at least one product data. The electronic label is installed on the ordering page, and each electronic label includes an IC data, a first sensing unit, a second sensing unit and a fixed pad. The IC data is corresponding to the product data. The fixed pad is provided for fixing the first sensing unit and the second sensing unit, and enabling the first sensing unit to rotate. When the customer rotates the first sensing unit till the first sensing section of the first sensing unit corresponds to the second sensing section of the second sensing unit, the electronic label is triggered to generate a sensing signal for transmitting the IC data of the product so as to select the product data corresponding thereto.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: October 25, 2011
    Assignee: Taiwan Name Plate Co., Ltd.
    Inventors: Wen Cheng Yin, Ho-Chuan Hsu
  • Patent number: 8035778
    Abstract: A display panel including a pair of substrates, a color filter layer, and a display medium is provided. The substrates including a plurality of pixels, wherein each pixel at least having a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel. The color filter layer is disposed on one of the substrates and at least has a first color filtering pattern disposed in the first sub-pixel, a second color filtering pattern disposed in the second sub-pixel, a third color filtering pattern disposed in the third sub-pixel, and a fourth color filtering pattern disposed in the fourth sub-pixel. The display medium is disposed between the pair of substrates, wherein the display medium correspondingly disposed in the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel has thicknesses of T1, T2, T3 and T4, respectively, and T1>T2>T3 and T1>T4>T3.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: October 11, 2011
    Assignee: Au Optronics Corporation
    Inventors: Chih-Cheng Chan, Sheng-Wen Cheng
  • Patent number: 8035476
    Abstract: The present invention relates to a chip resistor and method for making the same. The chip resistor includes a substrate, a pair of bottom electrodes, a resistive film, a pair of main upper electrodes, a first protective coat, a pair of barrier layers, a second protective coat, a pair of side electrodes and at least one plated layer. The first protective coat is disposed over the resistive film, and covers part of the main upper electrodes. The barrier layers are disposed on the main upper electrodes, and cover part of the first protective coat. The second protective coat is disposed on the first protective coat, and covers part of the barrier layers. The plated layers cover the barrier layers, the bottom electrodes and the side electrodes. As a result, the chip resistor features high corrosion resistance.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: October 11, 2011
    Assignee: Yageo Corporation
    Inventors: Chih-Chung Yang, Wen-Fon Wu, Mei-Ling Lin, Wen-Cheng Wu, Tsai-Hu Chen, Wen-Hsing Kong
  • Publication number: 20110241152
    Abstract: The present disclosure provides methods and apparatus for sensor element isolation in a backside illuminated image sensor. In one embodiment, a method of fabricating a semiconductor device includes providing a sensor layer having a frontside surface and a backside surface, forming a plurality of frontside trenches in the frontside surface of the sensor layer, and implanting oxygen into the sensor layer through the plurality of frontside trenches. The method further includes annealing the implanted oxygen to form a plurality of first silicon oxide blocks in the sensor layer, wherein each first silicon oxide block is disposed substantially adjacent a respective frontside trench to form an isolation feature. A semiconductor device fabricated by such a method is also disclosed.
    Type: Application
    Filed: April 2, 2010
    Publication date: October 6, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ru-Shang Hsiao, Kun-Yu Tsai, Chien-Hsien Tseng, Shou-Gwo Wuu, Nai-Wen Cheng
  • Publication number: 20110233621
    Abstract: The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum.
    Type: Application
    Filed: March 23, 2010
    Publication date: September 29, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Martin Liu, Richard Chu, Hung-Hua Lin, H. T. Huang, Jung-Huei Peng, Yuan-Chih Hsieh, Lan-Lin Chao, Chun-Wen Cheng, Chia-Shiung Tsai
  • Publication number: 20110235255
    Abstract: An enclosure is provided. A housing (120) can have one or more walls (130). At least one of the one or more walls (130) can include a thermally conductive, carbonaceous member (100). The thermally conductive, carbonaceous member (100) can be partially or completely encapsulated within one or more electrically non-conductive materials.
    Type: Application
    Filed: December 4, 2008
    Publication date: September 29, 2011
    Inventors: Chao-Wen Cheng, Mark H. Ruch, Mark S Tracy
  • Patent number: 8028177
    Abstract: A method for changing power states of a computer sends a shutdown event to all running applications before the computer goes to sleep to prevent data loss in a sleep state of the computer. Furthermore, the method stores a system memory image into a flash memory before the computer goes to the sleep state. Moreover, the method restores the system memory image from the flash memory to the system memory when the computer exit the sleep state to come back the work state.
    Type: Grant
    Filed: December 25, 2008
    Date of Patent: September 27, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Wen-Cheng Chuang, Ching-Jou Chen, Hung-Chi Huang
  • Publication number: 20110230002
    Abstract: A method of forming an integrated circuit structure includes providing a silicon substrate, and implanting a p-type impurity into the silicon substrate to form a p-type region. After the step of implanting, performing an anneal to form a silicon oxide region, with a portion of the p-type region converted to the silicon oxide region.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 22, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ru-Shang Hsiao, Chung-Te Lin, Nai-Wen Cheng, Yin-Kai Liao, Wei Chuang Wu
  • Patent number: 8013037
    Abstract: The invention provides a fire resistant material and a formulation thereof. The formulation comprises a liquid suspension of a modified inorganic particle and an organic component. The modified inorganic particle comprises an inorganic particle with hydroxyl groups and a surface modifier coupled to the inorganic particle via a urethane linkage, wherein the surface modifier has an ethylenically unsaturated end group. The organic component comprises a monomer, oligomer, prepolymer, polymer, or combinations thereof, capable of reacting with the ethylenically unsaturated end group.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: September 6, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Shou I Chen, Che I Kao, Chih-Chien Chen, Jin-Her Shen, Wei-Feng Teng, Hsiao-Pin Chiang, Kai-Wen Cheng, Fan-Jeng Tsai
  • Patent number: 8009498
    Abstract: A memory refresh system includes a comparative detection circuit, a logic circuit, and a timing circuit. The comparative detection circuit detects a voltage of the storage capacitor of a memory cell of the memory and generates a corresponding digital code by comparing the voltage with a reference voltage. Each memory cell has a corresponding digital code. The combination of the digital codes of the memory cells forms a first state. After a specific period of time, the voltages of the storage capacitors of the memory cells are once detected by the comparative detection circuit, and corresponding digital codes are generated and combined to form a second state. The logic circuit compares the first state and the second state to determining whether or not to change the refresh period of a refresh period detecting process. The timing circuit changes the refresh period according to the determination result of the logic circuit.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: August 30, 2011
    Assignee: National Tsing Hua University
    Inventors: Meng-Fan Chang, Chih-Wen Cheng
  • Publication number: 20110207908
    Abstract: The present invention provides a method for preparing a phosphorus-containing bexzoxazine resin having the following structure shown as the formula (I) or (V): wherein, R1˜R4 respectively comprise one selected from the group consisting of hydrogen, C1˜C6 alkyl, C3˜C6 cyclic alkyl, and phenyl.
    Type: Application
    Filed: February 23, 2010
    Publication date: August 25, 2011
    Inventors: WEN-CHIUNG SU, Ching-Hsuan Lin, Po-Wen Cheng
  • Publication number: 20110198996
    Abstract: A lighting lamp apparatus with replaceable fuse element is provided, including a light base having a light source, a light focusing shade engaged to top of the light base, and a light head, engaged to bottom of the light base as an electrical connection interface of the entire apparatus to a light bulb installation part, a circuit set being placed between said light head and said light base, where the circuit set further includes a fuse. The fuse is placed inside a fuse base, and one end of said fuse base is exposed outside of surface of said light head for easy replacement of the fuse.
    Type: Application
    Filed: February 12, 2010
    Publication date: August 18, 2011
    Inventor: Wen-Cheng Lai
  • Publication number: 20110199012
    Abstract: A driving circuit for lighting lamp is provided, including, in the order of, a bridge rectifier, an EMC filter, a control circuit, a power transformer and a cold cathode fluorescent load, with a feedback loop connected in series between the control circuit and the power transformer. A cold cathode fluorescent lamp using the driving circuit for lighting lamp is also provided, including a plastic lamp tube, a cold cathode fluorescent lamp tube, installation electrodes, frame and driving circuit module. Two contact electrodes are connected to the electrodes of the installation electrodes on the two ends of the plastic lamp tube for electrical connection to the conventional fluorescent lamp base. The circuit of the present invention is simple in structure, uses less number of components, is inexpensive in manufacturing, novel control mechanism and high reliable.
    Type: Application
    Filed: February 12, 2010
    Publication date: August 18, 2011
    Inventor: Wen-Cheng Lai
  • Publication number: 20110193210
    Abstract: The invention provides a chip package and a fabrication method thereof. In one embodiment, the chip package includes: a substrate having a semiconductor device and a conductive pad thereon; an insulator ring filling a trench formed in the substrate, wherein the insulator ring surrounds an intermediate layer below the conductive pad; and a conductive layer disposed below a backside of the substrate and electrically connected to the conductive pad.
    Type: Application
    Filed: April 2, 2010
    Publication date: August 11, 2011
    Inventors: Wen-Cheng CHIEN, Wen-Ken HUANG, Chien-Hung LIU, Joey LAI
  • Publication number: 20110172843
    Abstract: The present invention discloses an electronic device having a power management module and a power management method thereof. Within the power management method is used for an electronic device, which has a first power module, a second power module and the loads. The power management method comprises the following step: (1) monitoring the first power module and the second power module; (2) if the first power module and the second power module are activated at the same time, sequentially stopping a supply of electric power to at least one of the loads until the electronic device has total load current smaller than a reference value.
    Type: Application
    Filed: January 10, 2011
    Publication date: July 14, 2011
    Applicants: INVENTEC APPLIANCES (SHANGHAI) CO. LTD., INVENTEC APPLIANCES CORP.
    Inventors: YU-FENG WU, Wen-Cheng Hus
  • Patent number: 7976874
    Abstract: A calcium phosphate cement suitable for use in dental and bone prosthesis is disclosed, which include calcium phosphate particles having a diameter of 0.05 to 100 microns, wherein said calcium phosphate particles on their surfaces have whiskers or fine crystals having a width ranging from 1 to 100 nm and a length ranging from 1 to 1000 nm.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: July 12, 2011
    Inventors: Jiin-Huey Chern Lin, Chien-Ping Ju, Wen-Cheng Chen
  • Patent number: 7974484
    Abstract: A Joint Bi-level Image Group (JBIG) coding and decoding system, which provides a series of fully serial and parallel computational combinations in arithmetic coding and decoding to thereby reduce the complexity of JBIG arithmetic encoder and decoder and increase the processing speed. The JBIG coding system receives pixels and contexts of an image datastream and performs an adaptive arithmetic coding on the pixels in accordance with a pre-stored table and a probability prediction table for further performing a non-distortion compression on the image datastream. The JBIG decoding system receives data and contexts of a compressed datastream and performs an adaptive arithmetic decoding on the data of the compressed datastream in accordance with the pre-stored table and the probability prediction table to thereby obtain an image datastream.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: July 5, 2011
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Mine-Ta Yang, Wen-Cheng Ho
  • Publication number: 20110156245
    Abstract: An integrated circuit, a method of operating the integrated circuit, and a method of fabricating the integrated circuit are disclosed. According to one of the broader forms of the invention, a method and apparatus involve an integrated circuit that includes a heat transfer structure having a chamber that has a fluid disposed therein and that extends between a heat generating portion and a heat absorbing portion. Heat is absorbed into the fluid from the heat generating portion, and the fluid changes from a first phase to a second phase different from the first phase when the heat is absorbed. Heat is released from the fluid to the heat absorbing portion, and the fluid changes from the second phase to the first phase when the heat is released.
    Type: Application
    Filed: December 31, 2009
    Publication date: June 30, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Hau Wu, Chun-Ren Cheng, Chun-Wen Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai, Te-Hsi Lee
  • Patent number: 7968448
    Abstract: A semiconductor device and manufacturing method thereof are disclosed. The device comprises a semiconductor die, a passivation layer, a wiring redistribution layer (RDL), an Ni/Au layer, and a solder mask. The semiconductor die comprises a top metal exposed in an active surface thereof. The passivation layer overlies the active surface of the semiconductor die, and comprises a through passivation opening overlying the top metal. The wiring RDL, comprising an Al layer, overlies the passivation layer, and electrically connects to the top metal via the passivation opening. The solder mask overlies the passivation layer and the wiring RDL, exposing a terminal of the wiring RDL.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: June 28, 2011
    Inventors: Chia-Lun Tsai, Ching-Yu Ni, Jack Chen, Wen-Cheng Chien
  • Publication number: 20110153445
    Abstract: A digital data management system and method, wherein, a serial number of a multi-media broadcasting device and digital data of a digital data platform are utilized to generate a key, and that is used to encipher said digital data. Upon downloading and storing said enciphered digital data by said multi-media broadcasting device, said key is used to decipher said digital data for broadcast. Through application of said digital data management system and method, management of protection of digital data authorization can be enhanced, such that a user is able to download said digital data to said multi-media broadcasting device for broadcasting, hereby eliminating the inconvenience of having to listen to music on-line.
    Type: Application
    Filed: May 5, 2010
    Publication date: June 23, 2011
    Inventors: Wen-Cheng HUANG, Chang-Chen Chien, Chiu-Sung Chen