Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6332933
    Abstract: Magnetic nanocomposite materials including iron, rare earth elements, boron, refractory metal and, optionally, cobalt are disclosed. Neodymium and lanthanum are preferred rare earth elements. The amounts of Nd, La, B and refractory metal are controlled in order to produce both hard and soft magnetic phases, as well as a refractory metal boride precipitated phase. The refractory metal boride precipitates serve as grain refiners and substantially improve the magnetic properties of the nanocomposite materials. The materials are particularly suitable for making bonded magnets.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: December 25, 2001
    Assignee: Santoku Corporation
    Inventors: Bao-Min Ma, Charles O. Bounds, Wen Cheng Chang, Qun Chen
  • Publication number: 20010042565
    Abstract: The present invention provides a flow-control apparatus with a check function for controlling the flow resistance of a photoresist solution. The apparatus is connected to a photoresist supply device, the photoresist supply device comprising a tank for storing the photoresist solution, a pipe partially submerged in the photoresist solution in the tank to transport the photoresist solution, and a pump for drawing the photoresist solution from the tank. The apparatus comprises a housing and a sphere. The housing comprises a chamber, a top opening positioned at the top of the chamber, and a bottom opening positioned at the bottom of the chamber, wherein the top opening can be mated to an end of the pipe or to a bottom opening of another apparatus. The sphere is moveably set inside the chamber of the housing and increases the flow resistance of the photoresist solution.
    Type: Application
    Filed: February 4, 2000
    Publication date: November 22, 2001
    Applicant: WINSTON HSU
    Inventors: Chung-Hsien Kao, Ying-Ming Cheng, Li-Chung Lee, Chia-Wen Cheng
  • Patent number: 6318376
    Abstract: A cigarette filter tip structure includes a cigarette holder, and a filter base mounted on the bottom of the cigarette holder. The cigarette holder includes a compartment defined therein and having a bottom formed with a shoulder, the compartment having a center defining a compression hole, four L-shaped support bases each mounted in an inner wall of the compartment, and each having a bottom formed with a transversely extending positioning portion. The filter base has a top defining a filter recess for receiving the shoulder of the cigarette holder, and a bottom defining a passage and formed with a mouth suction portion.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: November 20, 2001
    Inventor: Chih-Wen Cheng
  • Patent number: 6319839
    Abstract: A method for forming an IPO between two polysilicon layers that produces an oxide of superior uniformity and eliminates undercutting, stringer formation, fringe electric fields and plasma damage. The method modifies the prior art by using a densified TEOS mask to allow etching away of the substrate oxide and allow the selective etch of a subsequent non-densified TEOS layer. A high temperature thermal oxide (HTO) then covers the resulting formation. The thickness of the second TEOS layer can be controlled to prevent field fringing and the underlying HTO layer prevents undercutting and stringer formation.
    Type: Grant
    Filed: October 4, 1999
    Date of Patent: November 20, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Wen-Cheng Chien, Jen-Pan Wang
  • Patent number: 6313516
    Abstract: A high-sheet-resistance polysilicon resistor for integrated circuits is achieved by using a two-layer polysilicon process. After forming FET gate electrodes and capacitor bottom electrodes from a polycide layer, a thin interpolysilicon oxide (IPO) layer is deposited to form the capacitor interelectrode dielectric. A doped polysilicon layer and an undoped polysilicon layer are deposited and patterned to form the resistor. The doped polysilicon layer is in-situ doped to minimize the temperature and voltage coefficients of resistivity. Since the undoped polysilicon layer has a very high resistance (infinite), the resistance is predominantly determined by the doped polysilicon layer.
    Type: Grant
    Filed: March 13, 2000
    Date of Patent: November 6, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Ming Tsui, Wen-Cheng Chang, Shung-Jen Yu
  • Patent number: 6308352
    Abstract: A foldable base for a playpen has two sets of side rails (10, 102) (104, 106) respectively mounted on a bottom side of the playpen; two side joints (12, 122) respectively mounted to pivotally receive one end of the rails in a set of the side rails (10, 102) (104, 106); two sets of corner feet (18) respectively connected to one end of the rails (10, 102, 104, 106) of each set of the side rails (10, 102) (104, 106); two sets of connecting bars (14, 142) (144, 146) connected to the side rails (10, 104, 144, 146) near the feet (18); a hinge joint (16) mounted between the two connecting bars (14, 142) (144, 146) of each set of the connecting bars (14, 142) (144, 146); two sets of locking rods (30, 32) connected between the two sets of connecting rods (14, 142) (144, 146); and two inner joints (20) respectively connected to each set of locking rods (30, 32).
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: October 30, 2001
    Inventor: Ching-Wen Cheng
  • Patent number: 6303510
    Abstract: A plasma etch method for forming a patterned layer first employs a substrate having formed therover a blanket microelectronic layer. There is also formed over the blanket microelectronic layer a patterned mask layer. There is then etched, while employing a first plasma etch method which employs the patterned mask layer as an etch mask layer, the blanket microelectronic layer to form a partially etched blanket microelectronic layer. There is then etched, while employing a second plasma etch method which employs the patterned mask layer as an etch mask layer, the partially etched blanket microelectronic layer to form a patterned microelectronic layer. Within the present invention, the first plasma etch method employs a higher bias voltage than the second plasma etch method.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: October 16, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Wen-Cheng Chien, Hui-Chen Chu
  • Patent number: 6297160
    Abstract: A method of forming a layer of top level metal within a semiconductor bonding pad that eliminates the formation of surface pitting and surface corrosion that using Prior Art occur due to the presence of minor traces of copper or silicon in that surface. A layer of pure aluminum is deposited on top of the first level metal surface, this level of pure aluminum prevents the occurrence of surface pitting and surface corrosion.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: October 2, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Wen-Cheng Chien
  • Patent number: 6282595
    Abstract: A method for testing an interface card used with a computer is provided. The method includes steps of (a) providing the computer with a read-only memorizing device for saving a testing program therein, (b) starting the computer, (c) detecting whether there exists the interface card electrically connected to the computer, (d) causing the computer to change from a first mode to a second mode when the interface card is detected, and (e) executing the testing program to test the interface card.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: August 28, 2001
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Cheng-Feng Pan, Wen-Cheng Lin
  • Patent number: 6274397
    Abstract: A method for eliminating metal line corrosion for semiconductor packages where exposed metal lines are exposed to the atmosphere for an extended period of time. A passivation layer is deposited over the active die of the semiconductor package, a layer of polymer film is deposited over the passivation layer and over the exposed conducting lines. At the time that the semiconductor package must be tested, including testing for corrosion of the exposed metal lines, the polymer layer is removed and the molding compound is applied. The semiconductor package is now tested. The added step of depositing a layer of polymer film has protected the interconnecting conducting lines from corrosion.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: August 14, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Wen-Cheng Chien, Ho-Yin Yiu, Hui-Chen Chu
  • Patent number: 6248661
    Abstract: A method for monitoring bubble formation in and over a spin-on glass(SOG) layer during the CVD deposition of a superjacent insulative layer is described wherein a monitor wafer is processed either with or without a metal pattern. After a SOG layer has been deposited and cured, a layer of silicon oxide is deposited over it by CVD. If bubbles are formed during the silicon oxide deposition step as a result of out-gassing of the SOG layer, they are entrapped at or near the SOG/silicon oxide interface. The silicon oxide layer is then subjected to a buffered HF etch which exposes the bubbles either by opening them up by eroding the SOG layer underneath the oxide layer or by bringing the surface of the silicon oxide layer closer to the entrapped bubbles, thereby decorating them to make them visible to a white light scanning tool. The monitor wafer is initially scanned just prior to the SOG deposition to obtain a reference scan.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: June 19, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Wen-Cheng Chien, Chen-Peng Fan
  • Patent number: 6226040
    Abstract: Apparatus for generating at least a selected area in a picture is disclosed herein. The picture and the selected area are displayed on a video display means, and the user can optionally adjust the position and size of the selected area. The apparatus including the following devices. A first converting device that is used to generate a digital signal and a pointer defining signal according to a computer video signal. The picture is transferred from the computer video signal, and the selected area is defined in the pointer defining signal. A first adapting device that is utilized to adapt the format of the computer video signal to suit a digital display format corresponding to the pointer defining signal. A storage device determines said display timing of all the pixels of the picture. A pointer generating device generates a plurality of edge of the selected area according to the pointer defining signal.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: May 1, 2001
    Assignees: Avermedia Technologies, Inc. (Taiwan Company), Avermedia Technologies, Inc. (U.S.A. Company)
    Inventors: Chung-Song Kuo, Yung-Che Chang, Kun-Chou Chen, Hsien-Wen Cheng
  • Patent number: 6210256
    Abstract: A continuous pad feeding method for chemical-mechanical polishing (CMP) is described, which method is suitable for use in a CMP apparatus. The CMP apparatus includes a first polishing belt having two terminals, which first polishing belt serves as a plurality of polishing pads. A second polishing belt having two terminals is provided on the first polishing belt. One of the terminals of the second polishing belt is adhered to one of the terminals of the first polishing belt.
    Type: Grant
    Filed: December 31, 1999
    Date of Patent: April 3, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Hsueh-Chung Chen, Wen-Cheng Yeh, Ming-Sheng Yang
  • Patent number: 6211878
    Abstract: A method and apparatus for interacting and selecting information on a video device employs a remote control unit which has a plurality of user interface devices. The user interface devices control information flow on the video device in a predetermined manner. The method and apparatus for interacting with information on the video device directly interacts with Hypertext Markup Language (HTML) tags without the need of a graphical mouse pointer on the video device.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: April 3, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Po-wen Cheng, Jyhhwa Ferng, Wen-Chiuan Liao, Jeng-Weei Lin, Tai-Yuan Wang
  • Patent number: 6190770
    Abstract: A pulsed voltage surges resistant enamelled wire comprises a metal conductive wire and at least one shield layer outside the wire, the at least one shield layer is provided by a coating composition comprising (a) a synthetic resin, (b) an organic solvent and (c) &agr;-form Al2O3 particles and &ggr;-form Al2O3 particles.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: February 20, 2001
    Assignee: Tai-I Electric Wire & Cable Co.
    Inventors: Chih-Min Jang, Ru-Shi Liu, Chi-Ting Du, Tsair-Shyang Huang, Yao-Chung Tu, Wen-Hsiung Liu, Wen-Cheng Wu, Tsen-Hsu Lin
  • Patent number: 6147372
    Abstract: Device layouts are described which increase the photon current of a metal oxide semiconductor image sensor. The metal oxide semiconductor can be NMOS, PMOS, or CMOS. The key part of the photon current of the image sensors comes from the depletion region at the PN junction between the drain region and the substrate material. The layouts used significantly increase the area of this depletion region illuminated by a stream of photons. The layouts have a drain region which takes the shape of a number of parallel fingers perpendicular to the gate electrode, a number of parallel fingers parallel to the gate electrode, or a spiral. The drain regions of these layouts significantly increase the area of the drain depletion region illuminated by a stream of electrons.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: November 14, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hua-Yu Yang, Chih-Heng Shen, Wen-Cheng Chang
  • Patent number: 6136434
    Abstract: A high temperature resistant colored enamel wire comprises a metal conductive wire and at least one colored coating layer outside the wire, the at least one colored coating layer is provided by a coating composition comprising (a) a synthetic resin, (b) an organic solvent and (c) an inorganic pigment. In addition to having good appearance and uniform color, the high temperature resistant colored enamel wire can provide the temperature resistance and insulation properties meeting the requirements of the art.
    Type: Grant
    Filed: March 8, 1999
    Date of Patent: October 24, 2000
    Assignee: Tai.sub.-- I Electric Wire & Cable Co., Ltd.
    Inventors: Chih-Min Jang, Ru-Shi Liu, Chi-Ting Du, Tsair-Shyang Huang, Yao-Chung Tu, Wen-Hsiung Liu, Wen-Cheng Wu, Tsen-Hsu Lin
  • Patent number: 6122776
    Abstract: A bathing chair, comprising: a seat; a frame, further comprising a front bar and a rear bar, shaped like the letter U turned upside down and mounted on the lower side of the seat, being rotatable around a horizontal axis; a right support bar and a left support bar, mounted between the ends of the front bar and the rear bar and having connecting ends; and a plurality of connecting devices, each having a tube for inserting one of the ends of the right and left support bars, so as to connect the right and left support bars with the front and rear bars.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: September 26, 2000
    Inventor: Yu Wen Cheng
  • Patent number: 6123912
    Abstract: A process for producing an alumina material with high strength is disclosed. The process for producing an alumina material includes the steps of (a) providing a solution containing a dispersing agent, (b) mixing a .theta.-alumina powder and an .alpha.-alumina powder with the solution to form a slurry, (c) filtering the slurry to form a green part, (d) drying the green part, and (e) densifying the dried green part to form the alumina material.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: September 26, 2000
    Assignee: National Science Council
    Inventors: Wen-Cheng J. Wei, Shui-jin Cheng, Chang-Li Hsieh, Hung-Chan Kao
  • Patent number: 6110843
    Abstract: The present invention relates to the fabrication of semiconductor devices and more particularly to a new method for avoiding abnormal via holes when Spin On Glass, SOG, is used as a means of planarizing an interlevel metal interconnect structure. The invention addresses the problem of locations of micro bubbles in a SOG layer that can lead to seams, voids and a ragged surface topology which, in turn, can make it very difficult to eventually etch well formed via holes at such locations. The invention details a new etch back method that solves the above problem by properly smoothing the micro bubble locations. This new method includes a sequence of anisotropic and isotropic etching steps that are used to partially etch back the cured SOG layer in order to achieve a planarized surface while also smoothing the micro bubble locations in the cured SOG layer.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: August 29, 2000
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Wen-Cheng Chien, Chen-Peng Fan