Patents by Inventor Wen Chu

Wen Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10734325
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The method includes forming a layer over the first overlay grating. The method includes forming a second overlay grating over the layer. The second overlay grating has a third strip portion and a fourth strip portion, the third strip portion and the fourth strip portion are elongated in the first elongated axis and are spaced apart from each other, there is a second distance between a third sidewall of the third strip portion and a fourth sidewall of the fourth strip portion, the third sidewall faces away from the fourth strip portion, the fourth sidewall faces the third strip portion, the first distance is substantially equal to the second distance, and the first trench extends across the third strip portion and the fourth strip portion.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: August 4, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Long-Yi Chen, Jia-Hong Chu, Chi-Wen Lai, Chia-Ching Liang, Kai-Hsiung Chen, Yu-Ching Wang, Po-Chung Cheng, Hsin-Chin Lin, Meng-Wei Chen, Kuei-Shun Chen
  • Patent number: 10735149
    Abstract: An eye diagram measurement device includes a first mapping circuitry, a count circuitry, a second mapping circuitry and a memory circuitry. The first mapping circuitry maps one of plurality of internal signals of an electronic device to a first data signal having a predetermined number of bits. The counter circuitry performs a counting operation according to the first data signal and a plurality of signal values associated with the predetermined number of bits, to generate a plurality of count signals. The second mapping circuitry maps the count signals respectively to a plurality of eye diagram measurement signals corresponding to a present phase. The memory circuitry stores the eye diagram measurement signals in order to provide the eye diagram measurement signals to an external system for generating an eye diagram measurement result of the electronic device.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: August 4, 2020
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Juh Kang, Yu-Chu Chen, Hsun-Wei Kao
  • Publication number: 20200237054
    Abstract: An apparatus for buffing a shoe part includes a housing adapted to be articulated around at least a portion of the footwear part. A rotating spindle is positioned in the housing and has a buffing surface for engagement with the footwear part. A carriage is slideably connected to the housing and holds the spindle such that the buffing surface can be moved closer to and further away from the footwear part. An actuator is in the housing and in contact with the carriage. The actuator applies force to the carriage to increase the force of the buffing surface onto the footwear part. A biasing member is in the housing and in contact with the carriage. The biasing member exerts force onto the carriage in a direction opposite the force exerted by the actuator.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Inventors: Dragan Jurkovic, Shih-Yuan Wu, Chia-Wei Chang, Wen-Ruei Chang, Chien-Chun Chen, Chang-Chu Liao, Chia-Hung Lin
  • Publication number: 20200243541
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first trench and a second trench in substrate on the memory region, in which a width of the second trench is greater than a width of the first trench; forming a first liner in the first trench and the second trench; forming a second liner on the first liner as the second liner completely fills the first trench and partly fills the second trench; and planarizing the second liner and the first liner to form a first isolation structure and a second isolation structure.
    Type: Application
    Filed: April 7, 2020
    Publication date: July 30, 2020
    Inventors: Kun-Hsin Chen, Hsuan-Tung Chu, Tsuo-Wen Lu, Po-Chun Chen
  • Publication number: 20200243393
    Abstract: Some embodiments relate to a processing tool for processing a singulated semiconductor die. The tool includes an evaluation unit, a drying unit, and a die wipe station. The evaluation unit is configured to subject the singulated semiconductor die to a liquid to detect flaws in the singulated semiconductor die. The drying unit is configured to dry the liquid from a frontside of the singulated semiconductor die. The die wipe station includes an absorptive drying structure configured to absorb the liquid from a backside of the singulated semiconductor die after the drying unit has dried the liquid from the frontside of the singulated semiconductor die.
    Type: Application
    Filed: April 15, 2020
    Publication date: July 30, 2020
    Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Yang-Ann Chu
  • Patent number: 10728406
    Abstract: A mobile device holding device comprises a basement including an inner accommodation space; a document feeding path including a scanning area, the document feeding path being disposed in said accommodation space; an input tray disposed on an upstream of the document feeding path to accommodate documents to be scanned; an output tray disposed on a downstream of the document feeding path to eject scanned documents; a document feeding unit disposed in the accommodation space for transmitting documents through the document feeding path; and a device holder disposed on the basement to fix a mobile device; wherein the device holder is moved to align the mobile device with the scanning area for capturing the image within the scanning area, and ensuring that the shooting area of the mobile device is not less than the width of documents to be scanned.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: July 28, 2020
    Assignee: Foxlink Image Technology Co., Ltd.
    Inventors: Wen Chu Liao, Yen Ya Wu, Yun Long Lai
  • Patent number: 10727117
    Abstract: A method for manufacturing a semiconductor structure includes following operations. A sacrificial layer is formed over the conductive layer, wherein the sacrificial layer includes a first sacrificial portion over the first conductive portion, and a second sacrificial portion over the second conductive portion, and a first thickness of the first sacrificial portion is larger than a second thickness of the second sacrificial portion. The first sacrificial portion and the second sacrificial portion of the sacrificial layer, and the second conductive portion of the conductive layer are removed, with at least a portion of the first conductive portion remaining over the bottom of the trench.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: July 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Hsiang Liao, Ya-Huei Li, Li-Wei Chu, Chun-Wen Nieh, Hung-Yi Huang, Chih-Wei Chang, Ching-Hwanq Su
  • Patent number: 10727131
    Abstract: The present disclosure describes a method to form silicon germanium (SiGe) source/drain regions with the incorporation of a lateral etch in the epitaxial source/drain growth process. For example, the method can include forming a plurality of fins on a substrate, where each of the plurality of fins has a first width. The SiGe source/drain regions can be formed on the plurality of fins, where each SiGe source/drain region has a second width in a common direction with the first width and a height. The method can also include selectively etching—e.g., via a lateral etch—the SiGe source/drain regions to decrease the second width of the SiGe source/drain regions. By decreasing the width of the SiGe source/drain regions, electrical shorts between neighboring fins can be prevented or minimized. Further, the method can include growing an epitaxial capping layer over the Si/Ge source/drain regions.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Mu Li, Chih-Chiang Chang, Wen-Chu Hsiao, Che-Yu Lin, Wei-Siang Yang
  • Publication number: 20200232542
    Abstract: A cycloid speed reducer includes a weight element, an input shaft and a cycloid disc. The weight element is disposed within an accommodation space of the cycloid disc. An eccentric part is disposed on the input shaft. Since the length of the input shaft is reduced, the overall length of the cycloid speed reducer is shortened. Moreover, the mass center of the weight element and the mass center of the eccentric part and the cycloid disc are arranged along the same axial direction. That is, the line passing through the mass center of the weight element and the mass center of the eccentric part and the cycloid disc is perpendicular to the input shaft. Consequently, the efficacy of the dynamic balance of the cycloid speed reducer is enhanced.
    Type: Application
    Filed: January 10, 2020
    Publication date: July 23, 2020
    Inventors: Chi-Wen Chung, En-Yi Chu, Hung-Wei Lin, Ming-Li Tsao
  • Publication number: 20200235748
    Abstract: An analog to digital converter (ADC) device includes ADC circuitries, a calibration circuitry, and a skew adjustment circuitry. The ADC circuitries are configured to convert an input signal according to interleaved clock signals, in order to generate first quantization outputs. The calibration circuitry is configured to perform at least one calibration operation according to the first quantization outputs, in order to generate second quantization outputs. The skew adjustment circuitry is configured to determine maximum value signals, to which the second quantization outputs respectively correspond during a predetermined interval, and to average the maximum value signals to generate a reference signal, and to compare the reference signal with each of the maximum value signals to generate adjustment signals, in order to reduce a clock skew of the ADC circuitries.
    Type: Application
    Filed: October 8, 2019
    Publication date: July 23, 2020
    Inventors: Wen-Juh KANG, Yu-Chu CHEN, Man-Pio LAM
  • Publication number: 20200231431
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of vias, a signal transmitting portion, a heater and a sensing material. The plurality of vias penetrates the substrate, wherein each of the plurality of vias includes a conductive or semiconductive portion surrounded by an oxide layer. The signal transmitting portion is disposed in the substrate, wherein adjacent vias of the plurality of vias surrounds the signal transmitting portion. The heater is electrically connected to the signal transmitting portion, and the sensing material is disposed over the heater and electrically connected to the substrate. A method of manufacturing a semiconductor structure is also provided.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 23, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Publication number: 20200235747
    Abstract: An analog-to-digital converter (ADC) device includes ADC circuitries, a calibration circuitry, and a skew adjusting circuitry. The ADC circuitries convert an input signal according to interleaved clock signals, in order to generate first quantized outputs. The calibration circuitry performs at least one calibration operation according to the first quantized outputs to generate second quantized outputs. The skew adjusting circuitry analyzes time difference information within even-numbered sampling periods of the clock signals, in order to generate adjustment signals. The adjustment signals are for reducing a clock skew in the ADC circuitries.
    Type: Application
    Filed: January 21, 2020
    Publication date: July 23, 2020
    Inventors: Wen-Juh KANG, Yu-Chu CHEN, Man-Pio LAM
  • Publication number: 20200222498
    Abstract: The present disclosure provides various molecular constructs having a plurality of fatty acids and a functional element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Application
    Filed: March 19, 2020
    Publication date: July 16, 2020
    Applicant: Immunwork Inc.
    Inventors: Tse-Wen CHANG, Hsing-Mao CHU, Chien-Jen LIN
  • Patent number: 10715924
    Abstract: A MEMS microphone includes a backplate that has a plurality of open areas, and a diaphragm spaced apart from the backplate. The diaphragm is deformable by sound waves to cause gaps between the backplate and the diaphragm being changed at multiple locations on the diaphragm. The diaphragm includes a plurality of anchor areas, located near a boundary of the diaphragm, which is fixed relative to the backplate. The diaphragm also includes multiple vent valves. Examples of the vent valve include a wing vent valve and a vortex vent valve.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Chun Yin Tsai
  • Patent number: 10707260
    Abstract: A circuit that includes: a photodiode configured to absorb photons and to generate photo-carriers from the absorbed photons; a first MOSFET transistor that includes: a first channel terminal coupled to a first terminal of the photodiode and configured to collect a portion of the photo-carriers generated by the photodiode; a second channel terminal; and a gate terminal coupled to a first control voltage source; a first readout circuit configured to output a first readout voltage; a second readout circuit configured to output a second readout voltage; and a current-steering circuit configured to steer the photo-carriers generated by the photodiode to one or both of the first readout circuit and the second readout circuit.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: July 7, 2020
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Szu-Lin Cheng, Shu-Lu Chen, Han-Din Liu, Hui-Wen Chen, Che-Fu Liang, Yuan-Fu Lyu, Chien-Lung Chen, Chung-Chih Lin, Kuan-Chen Chu
  • Publication number: 20200213701
    Abstract: An integrated microphone device is provided. The integrated microphone device includes a substrate, a plate, and a membrane. The substrate includes an aperture allowing acoustic pressure to pass through. The plate is disposed on a side of the substrate. The membrane is disposed between the substrate and the plate and movable relative to the plate as acoustic pressure strikes the membrane. The membrane includes a vent valve having an open area that is variable in response to a change in acoustic pressure.
    Type: Application
    Filed: March 10, 2020
    Publication date: July 2, 2020
    Inventors: Chun-Wen CHENG, Chia-Hua CHU, Chun-Yin TSAI, Tzu-Heng WU, Wen-Cheng KUO
  • Patent number: 10689247
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20200190529
    Abstract: The invention relates to a nucleic acid molecule that improves aroma production in an orchid, and a cell and a transgenic orchid comprising the nucleic acid molecule. The invention further relates to a polypeptide that improves aroma production in an orchid, and a method for improving the production of aroma in an orchid.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 18, 2020
    Inventors: HONG-HWA CHEN, YU-CHEN CHUANG, WEN-CHIEH TSAI, YI-CHU HUNG, WEN-HUEI CHEN
  • Publication number: 20200190605
    Abstract: The invention relates to a detective molecule, and more particularly to a detective molecule and a kit for detecting a target molecule, a method for predicting fragrance production in an orchid, and a method for breeding a scented orchid.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 18, 2020
    Inventors: HONG-HWA CHEN, YU-CHEN CHUANG, WEN-CHIEH TSAI, YI-CHU HUNG, WEN-HUEI CHEN, CHI-YU HSU, CHUAN-MING YEH, NOBUTAKA MITSUDA, MASARU OHME-TAKAGI
  • Publication number: 20200190518
    Abstract: A series of peptides and a peptide-siRNA complex are disclosed, wherein the peptide based complex effectively enhances delivery of siRNA molecules into the cells and release of siRNA in the cell, and improves siRNA mediated gene silencing efficiency of cellular targets. Pharmaceutical compositions that include the complex, as well as a use of the complex in the gene therapy field, are also disclosed.
    Type: Application
    Filed: January 24, 2020
    Publication date: June 18, 2020
    Inventors: Pu Chen, Dafeng CHU, Baoling CHEN, Wen XU, Ran PAN