Abstract: A semiconductor device includes a gate structure formed over a channel region of the semiconductor device, a source/drain region adjacent the channel region, and an electrically conductive contact layer over the source/drain region. The source/drain region includes a first epitaxial layer having a first material composition and a second epitaxial layer formed over the first epitaxial layer. The second epitaxial layer has a second material composition different from the first composition. The electrically conductive contact layer is in contact with the first and second epitaxial layers. A bottom of the electrically conductive contact layer is located below an uppermost portion of the first epitaxial layer.

Abstract: Semiconductor device structures and methods for forming the same are provided. A method for forming a semiconductor device structure includes forming a gate structure over a semiconductor substrate. The method also includes forming spacer elements adjoining sidewalls of the gate structure. The method further includes forming a protection material layer over the gate structure. The formation of the protection material layer includes a substantial non-plasma process. In addition, the method includes depositing a dielectric material layer over the protection material layer. The deposition of the dielectric material layer includes a plasma-involved process.

Abstract: Methods of fabricating a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes epitaxially growing a source/drain structure covering the fin structure. In addition, the method includes epitaxially growing a capping layer over the source/drain structure. The capping layer has a top portion and a lower portion under the top portion. The top portion has a first thickness and the lower portion has a second. A ratio of the first thickness to the second thickness is in a range of about 1.01 to about 2. The method also includes etching the top portion and the lower portion of the capping layer. The method further includes forming a silicide layer over the source/drain structure and a contact over the silicide layer.

Abstract: The present invention provides a device and method for inserting an IOL into an eye of a patient. The IOL injector is configured to automatically load an IOL into the injector by folding and aligning the IOL into a lens cartridge of the injector without manual manipulation of the IOL by the physician during the procedure. The injector is configured to properly orient and align the IOL within the injector and maintain proper alignment throughout delivery of the IOL to the eye of a patient and thereby ensuring that the IOL is properly positioned and oriented at a predetermined location in the eye.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a first source/drain structure, and a contact structure. The gate structure has a gate dielectric layer over a first fin structure. The first source/drain structure is positioned in the first fin structure and adjacent to the gate structure. The first source/drain structure includes a first epitaxial layer in contact with the top surface of the first fin structure and a second epitaxial layer over the first epitaxial layer and extending above a bottom surface of the gate dielectric layer. The contact structure extends into the first source/drain structure. The top surface of the first fin structure is between a top surface and a bottom surface of the first source/drain structure.

Abstract: A low-temperature co-fired microwave dielectric ceramic material includes: (a) 85 wt % to 99 wt % ceramic material comprising Mg2SiO4, Ca2SiO4, CaTiO3, and CaZrO3, wherein a weight ratio of Mg2SiO4 relative to Ca2SiO4 is of (1-x): x, a weight ratio of CaTiO3 relative to CaZrO3 is of y:z, and a weight ratio of entities of Mg2SiO4 and Ca2SiO4 relative to CaTiO3 is of (1-y-z):y, 0.2?x?0.7, 0.05?y?0.2, 0.05?z?0.4; and (b) 1 wt % to 15 wt % glass material composed of Li2O, BaO, SrO, CaO, B2O3, and SiO2.

Abstract: An improved structure for reducing compound semiconductor wafer distortion comprises a contact metal layer, at least one stress balance layer and a die attachment layer. The contact metal layer is formed on a bottom surface of a compound semiconductor wafer; the at least one stress balance layer is formed on a bottom surface of the contact metal layer, wherein the at least one stress balance layer is made of at least one conductive material; the die attachment layer is formed on a bottom surface of the at least one stress balance layer, wherein the die attachment layer is made of conductive material. By locating the at least one stress balance layer between the contact metal layer and the die attachment layer, the stress suffered by the compound semiconductor wafer is balanced so that the distortion of the compound semiconductor wafer is reduced.

Abstract: An improved structure for reducing compound semiconductor wafer distortion comprises a contact metal layer formed on a bottom surface of a compound semiconductor wafer, at least one stress balance layer formed on a bottom surface of the contact metal layer and made of nonconductive material, stress balance layer via holes and a die attachment layer. Each stress balance layer via hole penetrates the stress balance layer. The die attachment layer is made of conductive material, formed on a bottom surface of the stress balance layer and an inner surface of each stress balance layer via hole, and electrically connected with the contact metal layer through the stress balance layer via holes. By locating the stress balance layer between the contact metal layer and the die attachment layer, the stress suffered by the compound semiconductor wafer is balanced so that the distortion of the compound semiconductor wafer is reduced.

Abstract: An improved structure for reducing compound semiconductor wafer distortion comprises a contact metal layer and at least one stress balance layer. The contact metal layer is formed on a bottom surface of a compound semiconductor wafer; the at least one stress balance layer is formed on a bottom surface of the contact metal layer, wherein a thermal conductivity of the at least one stress balance layer is greater than or equal to 10 W/m-K. The stress suffered by the compound semiconductor wafer is balanced by the at least one stress balance layer, so that the distortion of the compound semiconductor wafer is reduced.

Abstract: The present disclosure describes a method to form silicon germanium (SiGe) source/drain regions with the incorporation of a lateral etch in the epitaxial source/drain growth process. For example, the method can include forming a plurality of fins on a substrate, where each of the plurality of fins has a first width. The SiGe source/drain regions can be formed on the plurality of fins, where each SiGe source/drain region has a second width in a common direction with the first width and a height. The method can also include selectively etching—e.g., via a lateral etch—the SiGe source/drain regions to decrease the second width of the SiGe source/drain regions. By decreasing the width of the SiGe source/drain regions, electrical shorts between neighboring fins can be prevented or minimized. Further, the method can include growing an epitaxial capping layer over the Si/Ge source/drain regions.

Abstract: An improved structure for reducing compound semiconductor wafer distortion comprises a contact metal layer, at least one stress balance layer and a die attachment layer. The contact metal layer is formed on a bottom surface of a compound semiconductor wafer; the at least one stress balance layer is formed on a bottom surface of the contact metal layer, wherein the at least one stress balance layer is made of at least one conductive material; the die attachment layer is formed on a bottom surface of the at least one stress balance layer, wherein the die attachment layer is made of conductive material. By locating the at least one stress balance layer between the contact metal layer and the die attachment layer, the stress suffered by the compound semiconductor wafer is balanced so that the distortion of the compound semiconductor wafer is reduced.

Abstract: Compositions for use in treating and/or alleviating a symptom of inflammatory bowel disease, colitis, and/or enterocolitis in a subject in need thereof are disclosed. The composition comprises a therapeutically effective amount of an anthraquinone derivative or a pharmaceutically acceptable salt thereof; and a pharmaceutically acceptable vehicle. In one embodiment, the composition comprises diacerein. Also disclosed is a first composition comprising an anthraquinone derivative selected from the group consisting of diacerein, aloe-emodin, emodin, and rhein, and a first pharmaceutically acceptable vehicle; and a second composition comprising mesalazine, and a second pharmaceutically acceptable vehicle, in combination for use in treating and/or alleviating a symptom of inflammatory bowel disease, colitis, and/or enterocolitis.

Abstract: Techniques for a resource management advice service are provided. In some examples, resource management advice and/or instructions may be provided for use with mobile devices, mobile applications, cloud applications, and/or other web-based applications. For example a mobile client may request to perform one or more resource management operations associated with a service provider. Based at least in part on the requested operation and/or the particular service provider, advice and/or instructions for managing the resource may be provided.

Abstract: Compositions for use in treating and/or alleviating a symptom of inflammatory bowel disease, colitis, and/or enterocolitis in a subject in need thereof are disclosed. The composition comprises a therapeutically effective amount of an anthraquinone derivative or a pharmaceutically acceptable salt thereof; and a pharmaceutically acceptable vehicle. In one embodiment, the composition comprises diacerein. Also disclosed is a first composition comprising an anthraquinone derivative selected from the group consisting of diacerein, aloe-emodin, emodin, and rhein, and a first pharmaceutically acceptable vehicle; and a second composition comprising mesalazine, and a second pharmaceutically acceptable vehicle, in combination for use in treating and/or alleviating a symptom of inflammatory bowel disease, colitis, and/or enterocolitis.

Abstract: A semiconductor device includes a gate structure formed over a channel region of the semiconductor device, a source/drain region adjacent the channel region, and an electrically conductive contact layer over the source/drain region. The source/drain region includes a first epitaxial layer having a first material composition and a second epitaxial layer formed over the first epitaxial layer. The second epitaxial layer has a second material composition different from the first composition. The electrically conductive contact layer is in contact with the first and second epitaxial layers. A bottom of the electrically conductive contact layer is located below an uppermost portion of the first epitaxial layer.

Abstract: The invention provides a see-through head-mounted display, including: an inner optical mechanism covered by a nontransparent housing having an opening and providing an image beam from the opening; and an outer optical mechanism including an outer polarizing beam splitter guiding the image beam from the opening and an environment beam to the same direction. The inner optical mechanism includes at least a mirror and a driving motor. The mirror reflects the image beam to make the image beam incident to the outer optical mechanism. The driving motor moves the mirror to vary the image distance from the mirror.

Abstract: A method for fabricating a shallow trench isolation (STI) structure comprises the following steps. A silane-base precursor having a volumetric flowrate of 500 to 750 sccm and a nitrogen-base precursor having a volumetric flowrate of 300 to 600 sccm are introduced and mixed under a first pressure ranging from 0.5 to 1.5 torr at a first temperature ranging from 30 to 105 centigrade to deposit a flowable dielectric layer in a trench of a substrate. Then, ozone gas and oxygen gas are introduced and mixed under a second pressure ranging from 300 to 650 torr at a second temperature ranging from 50 to 250 centigrade to treat the flowable dielectric layer, wherein a volumetric flowrate ratio of ozone gas and oxygen gas ranges from 1:1 to 3:1. A method for fabricating a FinFET is provided.

Abstract: Semiconductor device structures and methods for forming the same are provided. A method for forming a semiconductor device structure includes forming a gate structure over a semiconductor substrate. The method also includes forming spacer elements adjoining sidewalls of the gate structure. The method further includes forming a protection material layer over the gate structure. The formation of the protection material layer includes a substantial non-plasma process. In addition, the method includes depositing a dielectric material layer over the protection material layer. The deposition of the dielectric material layer includes a plasma-involved process.

Abstract: An apparatus for measuring a curvature of a thin film includes a light emitting module, a first optical module, a second optical module, a third optical module, and an image analysis module. The light emitting module emits a single laser to be used as an incident light. The incident light is transmitted through a first optical path provided by the first optical module, then the incident light is guided by the second optical module to be incident to the thin film through a second optical path. A reflected light reflected by the thin film is transmitted through the second optical path, then guided by the third optical module to be transmitted along a third optical path. The image analysis module determines the curvature of the thin film according to the characteristic of the reflected light.