Patents by Inventor Wen Chu

Wen Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10665507
    Abstract: Some embodiments relate to a processing tool for processing a singulated semiconductor die. The tool includes an evaluation unit, a drying unit, and a die wipe station. The evaluation unit is configured to subject the singulated semiconductor die to a liquid to detect flaws in the singulated semiconductor die. The drying unit is configured to dry the liquid from a frontside of the singulated semiconductor die. The die wipe station includes an absorptive drying structure configured to absorb the liquid from a backside of the singulated semiconductor die after the drying unit has dried the liquid from the frontside of the singulated semiconductor die.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Yang-Ann Chu
  • Publication number: 20200161364
    Abstract: A circuit that includes: a photodiode configured to absorb photons and to generate photo-carriers from the absorbed photons; a first MOSFET transistor that includes: a first channel terminal coupled to a first terminal of the photodiode and configured to collect a portion of the photo-carriers generated by the photodiode; a second channel terminal; and a gate terminal coupled to a first control voltage source; a first readout circuit configured to output a first readout voltage; a second readout circuit configured to output a second readout voltage; and a current-steering circuit configured to steer the photo-carriers generated by the photodiode to one or both of the first readout circuit and the second readout circuit.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Yun-Chung Na, Szu-Lin Cheng, Shu-Lu Chen, Han-Din Liu, Hui-Wen Chen, Che-Fu Liang, Yuan-Fu Lyu, Chien-Lung Chen, Chung-Chih Lin, Kuan-Chen Chu
  • Publication number: 20200157519
    Abstract: The present disclosure provides a polypeptide including an anti-fibrin antibody and a serine protease moiety of human tissue plasminogen activator. Methods for treating thrombosis in a subject in need of such treatment using such polypeptide are also disclosed.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 21, 2020
    Applicant: Immunwork Inc.
    Inventors: Tse-Wen CHANG, Hsing-Mao CHU, Wei-Ting TIAN, Ting-Wei CHANG, Ming-Yu HSIEH
  • Patent number: 10658296
    Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Yi Wu, Li-Hsuan Chu, Ching-Wen Wen, Chia-Chun Hung, Chen Liang Chang, Chin-Szu Lee, Hsiang Liu
  • Patent number: 10658369
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a memory region and a periphery region; forming a first trench and a second trench in substrate on the memory region, wherein a width of the second trench is greater than a width of the first trench; forming a first liner in the first trench and the second trench; forming a second liner on the first liner, wherein the second liner completely fills the first trench and partly fills the second trench; and planarizing the second liner and the first liner to form a first isolation structure and a second isolation structure.
    Type: Grant
    Filed: July 4, 2018
    Date of Patent: May 19, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Kun-Hsin Chen, Hsuan-Tung Chu, Tsuo-Wen Lu, Po-Chun Chen
  • Publication number: 20200150080
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
    Type: Application
    Filed: December 26, 2019
    Publication date: May 14, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Alexander KALNITSKY, Yi-Shao LIU, Kai-Chih LIANG, Chia-Hua CHU, Chun-Ren CHENG, Chun-Wen CHENG
  • Publication number: 20200154599
    Abstract: The disclosure relates to a heat dissipation module, a display device having the same, and an assembly method thereof. Place the heat dissipation structure in between the chip of the COF (chip-on-film) and the thermal-conductive supporting component, heat generated by the chip of the COF can be absorbed by the heat dissipation structure and then be transferred to the thermal-conductive supporting component through the heat dissipation structure. As a result, the temperature of the chip is decreased, and the chip is avoided from operating at high temperature to deteriorate its performance and to result in thermal deformation or any other negative effects on the nearby components.
    Type: Application
    Filed: March 13, 2019
    Publication date: May 14, 2020
    Inventors: Chi-Wen Chu, Yun An Chang
  • Publication number: 20200144063
    Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber and introducing a plasma-forming gas into the PVD chamber. The plasma-forming gas is an oxygen-containing gas. The method also includes applying a radio frequency (RF) power by a power source to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. The metal target is directly electrically coupled to the power source. The method further includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.
    Type: Application
    Filed: December 30, 2019
    Publication date: May 7, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ya-Ling LEE, Shing-Chyang PAN, Keng-Chu LIN, Wen-Cheng YANG, Chih-Tsung LEE, Victor Y. LU
  • Publication number: 20200140259
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first dielectric layer over a substrate and forming a first recess in the first dielectric layer. The method also includes conformally forming a first movable membrane over the first dielectric layer. In addition, the first movable membrane has a first corrugated portion in the first recess. The method further includes forming a second dielectric layer over the first movable membrane and partially removing the substrate, the first dielectric layer, and the second dielectric layer to form a cavity. In addition, the first corrugated portion of the first movable membrane is partially sandwiched between the first dielectric layer and the second dielectric layer.
    Type: Application
    Filed: December 31, 2019
    Publication date: May 7, 2020
    Inventors: Yi-Chuan Teng, Chun-Yin Tsai, Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20200141478
    Abstract: A speed reducer comprises a transmission shaft, an eccentric wheel, a first wheel assembly, a rotating wheel and a second wheel assembly. The first wheel assembly comprises a first wheel disc and at least one first roller. The at least one first roller is disposed on the inner wall of first wheel disc. The rotating wheel comprises a main body comprising an outer ring structure and a concave structure. The outer ring structure comprises at least one first tooth. The at least one first tooth is in contact with the corresponding first roller. At least one second roller is disposed within the concave structure. The second wheel assembly comprises a second wheel disc and at least one second tooth. The at least one second tooth is disposed on an outer periphery of the second wheel assembly. The at least one second tooth is in contact with the corresponding second roller.
    Type: Application
    Filed: September 27, 2019
    Publication date: May 7, 2020
    Inventors: Chi-Wen Chung, En-Yi Chu, Hung-Wei Lin, Ming-Li Tsao
  • Publication number: 20200144888
    Abstract: A speed reducing device includes a motor and a speed reducing mechanism. The speed reducing mechanism includes at least one roller assembly, a cycloid disc, at least one fixing disc and a positioning assembly. The roller assembly is disposed within a rotor portion of the motor. While the roller assembly is rotated with the rotor portion, the roller assembly is eccentrically revolved. The roller assembly includes a wheel disc and at least one roller. The cycloid disc includes a main body and at least one cycloid tooth structure. The cycloid tooth structure is protruded from an outer periphery of the main body and in contact with the corresponding roller. While the roller assembly is eccentrically revolved, the at least one cycloid tooth structure is pushed against the corresponding roller, so that the cycloid disc is correspondingly rotated.
    Type: Application
    Filed: September 27, 2019
    Publication date: May 7, 2020
    Inventors: Chi-Wen Chung, En-Yi Chu, Hung-Wei Lin, Ming-Li Tsao
  • Patent number: 10644167
    Abstract: A thin film transistor including a flexible substrate, a semiconductor layer, a first gate, and a first gate dielectric layer is provided. The semiconductor layer is located on the flexible substrate. The first gate is located on the flexible substrate and corresponds to a portion of the semiconductor layer. The first gate dielectric layer is located between the first gate and the semiconductor layer. The first gate dielectric layer is in contact with the semiconductor layer, and the hydrogen atom concentration of the first gate dielectric layer is less than 6.5×1020 atoms/cm3. A method of manufacturing the thin film transistor is also provided.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: May 5, 2020
    Assignees: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Tai-Jui Wang, Yung-Hui Yeh, Jui-Wen Yang, Hsiao-Chiang Yao, Chun-Hung Chu
  • Publication number: 20200135083
    Abstract: Present disclosure discloses a display screen module and a display screen, which includes a front panel, a rear panel and a circuit module. The circuit module includes a driving device, a plurality of display assemblies and a substrate located between the front panel and the rear panel. The substrate includes a first mounting plate and second mounting plate which are integrated. The second mounting plate is formed by extension from one end of the first mounting plate along a horizontal direction. Each of the plurality of display assemblies includes a plurality of lamp beads provided at intervals on the substrate along an extension direction of the second mounting plate and facing the front panel. The driving device is arranged on the first mounting plate and partially protrudes from the rear panel. A size of the driving device is less than or equal to a size of the first mounting plate.
    Type: Application
    Filed: October 24, 2019
    Publication date: April 30, 2020
    Inventors: Shenghe WANG, Wen LIN, Zhenlong LI, Dacheng AN, Guoshi YANG, Azhen CHU, Wei LIU, Xiaohong Zou, Junfeng YANG
  • Publication number: 20200131028
    Abstract: The integrated CMOS-MEMS device includes a CMOS structure, a cap structure, and a MEMS structure. The CMOS structure, fabricated on a first substrate, includes at least one conducting layer. The cap structure, including vias passing through the cap structure, has an isolation layer deposited on its first side and has a conductive routing layer deposited on its second side. The MEMS structure is deposited between the first substrate and the cap structure. The integrated CMOS-MEMS device also includes a conductive connector that passes through one of the vias and through an opening in the isolation layer on the cap structure. The conductive connector conductively connects a conductive path in the conductive routing layer on the cap structure with the at least one conducting layer of the CMOS structure.
    Type: Application
    Filed: May 23, 2019
    Publication date: April 30, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Wen Cheng Kuo, Wei-Jhih Mao
  • Publication number: 20200132166
    Abstract: A two-stage cycloid speed reducer comprises two rotating disc assemblies. Each rotating disc assembly comprises two cycloid discs. In other words, the cycloid speed reducer has four cycloid discs to be in contact with the corresponding rollers. Consequently, the load withstood by each cycloid disc is reduced. Since the cycloid speed reducer has stronger structural strength, the cycloid speed reducer can be applied to the high-load circumstance. Moreover, an eccentric assembly of the eccentric device includes a plurality of eccentric cylinders. The eccentric cylinders are disposed within the axle holes of the corresponding cycloid discs. Due to the eccentric cylinders, the eccentric direction of two cycloid discs is opposite to the eccentric direction of the other two cycloid discs. Consequently, it is not necessary to install an additional weight compensation device in the cycloid speed reducer to compensate the dynamic equilibrium. Moreover, the cycloid speed reducer can be assembled easily.
    Type: Application
    Filed: December 27, 2019
    Publication date: April 30, 2020
    Inventors: Chi-Wen Chung, En-Yi Chu, Hung-Wei Lin, Ming-Li Tsao, Ching-Hsiung Tsai
  • Publication number: 20200133117
    Abstract: A method and a system of performing layout enhancement include: providing a first design layout comprising a plurality of cells; updating a first cell in the plurality of cells using optical proximity correction to provide a first updated cell and a data set; updating a second cell from remaining cells in the first design layout based on the data set to provide a second updated cell; and manufacturing a mask based on the first updated cell and the second updated cell in the first design layout.
    Type: Application
    Filed: August 12, 2019
    Publication date: April 30, 2020
    Inventors: WEI-LIN CHU, HSIN-LUN TSENG, SHENG-WEN HUANG, CHIH-CHUNG HUANG, CHI-MING TSAI
  • Publication number: 20200115222
    Abstract: Processes for integrating complementary metal-oxide-semiconductor (CMOS) devices with microelectromechanical systems (MEMS) devices are provided. In some embodiments, the MEMS devices are formed on a sacrificial substrate or wafer, the sacrificial substrate or wafer is bonded to a CMOS die or wafer, and the sacrificial substrate or wafer is removed. In other embodiments, the MEMS devices are formed over a sacrificial region of a CMOS die or wafer and the sacrificial region is subsequently removed. Integrated circuit (ICs) resulting from the processes are also provided.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 16, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Patent number: 10617177
    Abstract: An apparatus for buffing a shoe part includes a housing adapted to be articulated around at least a portion of the footwear part. A rotating spindle is positioned in the housing and has a buffing surface for engagement with the footwear part. A carriage is slideably connected to the housing and holds the spindle such that the buffing surface can be moved closer to and further away from the footwear part. An actuator is in the housing and in contact with the carriage. The actuator applies force to the carriage to increase the force of the buffing surface onto the footwear part. A biasing member is in the housing and in contact with the carriage. The biasing member exerts force onto the carriage in a direction opposite the force exerted by the actuator.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: April 14, 2020
    Assignee: NIKE, Inc.
    Inventors: Dragan Jurkovic, Shih-Yuan Wu, Chia-Wei Chang, Wen-Ruei Chang, Chien-Chun Chen, Chang-Chu Liao, Chia-Hung Lin
  • Patent number: 10621329
    Abstract: Techniques for a resource management advice service are provided. In some examples, resource management advice and/or instructions may be provided for use with mobile devices, mobile applications, cloud applications, and/or other web-based applications. For example a mobile client may request to perform one or more resource management operations associated with a service provider. Based at least in part on the requested operation and/or the particular service provider, advice and/or instructions for managing the resource may be provided.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: April 14, 2020
    Assignee: Oracle International Corporation
    Inventors: Ajay Sondhi, Ching-Wen Chu, Beomsuk Kim
  • Patent number: 10618804
    Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate, receiving a heater, receiving an electrode, and receiving a sensing material. The substrate have a first surface, a second surface opposite to the first surface and a plurality of vias extending from the second surface toward the first surface and filled with a conductive or semiconductive material and a first oxide layer, the first oxide layer surrounding the conductive or semiconductive material in the plurality of vias, and a second oxide layer disposed over the first surface and the second surface. The heater is disposed within a membrane over the first surface of the substrate and electrically connected with the substrate. The electrode is over the heater and the membrane; and the sensing material covers a portion of the electrode.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin