Patents by Inventor Wen-Chuan Tai

Wen-Chuan Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210078858
    Abstract: The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a cap substrate is bonded to a device substrate. The cap substrate comprises a cap substrate bonded to a device substrate. The cap substrate comprises a MEMS trench, a scribe trench, and an edge trench respectively recessed from at a front-side surface of the cap substrate. A stopper is disposed within the MEMS trench and raised from a bottom surface of the MEMS trench.
    Type: Application
    Filed: December 2, 2020
    Publication date: March 18, 2021
    Inventors: Wen-Chuan Tai, Fan Hu
  • Publication number: 20210061641
    Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 4, 2021
    Inventors: Fan Hu, Chun-Ren Cheng, Hsiang-Fu Chen, Wen-Chuan Tai
  • Patent number: 10899608
    Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: January 26, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chia Lee, Chin-Min Lin, Cheng San Chou, Hsiang-Fu Chen, Wen-Chuan Tai, Ching-Kai Shen, Hua-Shu Ivan Wu, Fan Hu
  • Patent number: 10865102
    Abstract: The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a cap substrate is bonded to a device substrate. The cap substrate comprises a first trench, a second trench, and an edge trench recessed from at a front-side surface of the cap substrate. A stopper is disposed within the first trench and raised from a bottom surface of the first trench. The stopper has a top surface lower than the front-side surface of the cap substrate.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Chuan Tai, Fan Hu
  • Publication number: 20200346923
    Abstract: The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a cap substrate is bonded to a device substrate. The cap substrate comprises a first trench, a second trench, and an edge trench recessed from at a front-side surface of the cap substrate. A stopper is disposed within the first trench and raised from a bottom surface of the first trench. The stopper has a top surface lower than the front-side surface of the cap substrate.
    Type: Application
    Filed: July 21, 2020
    Publication date: November 5, 2020
    Inventors: Wen-Chuan Tai, Fan Hu
  • Publication number: 20200290863
    Abstract: A micro-electro-mechanical system (MEMS) device includes a substrate, a proof mass, and a piezoelectric bump. The substrate has a surface. The proof mass is suspended over the surface of the substrate, wherein the proof mass is movable with respect to the substrate. The piezoelectric bump is disposed on the surface of the substrate and extends a distance from the surface of the substrate toward the proof mass.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 17, 2020
    Inventors: FAN HU, WEN-CHUAN TAI, HSIANG-FU CHEN, CHUN-REN CHENG
  • Patent number: 10752495
    Abstract: The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region, a second trench in a second region, and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, a stopper is formed by performing an etch to the cap substrate such that a first portion of a bottom surface of the first trench uncovered by the hard mask is recessed while a second portion of the bottom surface of the first trench covered by the hard mask is non-altered to form a stopper within the first trench. Then, a second etch is performed to the second trench to lower the bottom surface of the second trench.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Maufacturing Co., Ltd.
    Inventors: Wen-Chuan Tai, Fan Hu
  • Patent number: 10618801
    Abstract: Microelectromechanical systems (MEMS) packages and methods for forming the same are provided. The MEMS package includes a semiconductor substrate having a metallization layer over the semiconductor substrate. The MEMS package also includes a first planarization layer and an overlying second planarization layer over the metallization layer. The planarization structure has a first cavity therein exposing the metallization layer. The MEMS package also includes a MEMS device structure bonded to the second planarization layer. The MEMS device structure includes a moveable element over the first cavity. The MEMS package also includes a first stopper placed on the exposed metallization layer in the first cavity. The first stopper includes a patterned conductive layer and an underlying patterned insulating layer.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: April 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Chuan Tai, Hsiang-Fu Chen, Fan Hu
  • Publication number: 20200109046
    Abstract: The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region, a second trench in a second region, and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, a stopper is formed by performing an etch to the cap substrate such that a first portion of a bottom surface of the first trench uncovered by the hard mask is recessed while a second portion of the bottom surface of the first trench covered by the hard mask is non-altered to form a stopper within the first trench. Then, a second etch is performed to the second trench to lower the bottom surface of the second trench.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 9, 2020
    Inventors: Wen-Chuan Tai, Fan Hu
  • Publication number: 20200062587
    Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Chia-Ming Hung, Shao-Chi Yu, Hung-Hua Lin, Yuan-Chih Hsieh
  • Patent number: 10556790
    Abstract: The present disclosure relates to a MEMS package having a cap substrate with different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, with the hard mask in place, an etch is performed to the cap substrate such that an uncovered portion of a bottom surface of the first trench is recessed while a covered portion of the bottom surface of the first trench is non-altered to form a stopper within the first trench. Then, the front side of the cap substrate is bonded to a device substrate, enclosing the first trench over a first MEMS device.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: February 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Chuan Tai, Fan Hu
  • Patent number: 10556792
    Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: February 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chia Lee, Chin-Min Lin, Cheng San Chou, Hsiang-Fu Chen, Wen-Chuan Tai, Ching-Kai Shen, Hua-Shu Ivan Wu, Fan Hu
  • Publication number: 20200024137
    Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. In some embodiments, a ventilation trench and an isolation trench are concurrently within a capping substrate. The isolation trench isolates a silicon region and has a height substantially equal to a height of the ventilation trench. A sealing structure is formed within the ventilation trench and the isolation trench, the sealing structure filing the isolation trench and defining a vent within the ventilation trench. A device substrate is provided and bonded to the capping substrate at a first gas pressure and hermetically sealing a first cavity associated with a first MEMS device and a second cavity associated with a second MEMS device. The capping substrate is thinned to open the vent to adjust a gas pressure of the second cavity.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 23, 2020
    Inventors: Yi-Chia Lee, Chin-Min Lin, Cheng San Chou, Hsiang-Fu Chen, Wen-Chuan Tai, Ching-Kai Shen, Hua-Shu Ivan Wu, Fan Hu
  • Publication number: 20200024136
    Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 23, 2020
    Inventors: Yi-Chia Lee, Chin-Min Lin, Cheng San Chou, Hsiang-Fu Chen, Wen-Chuan Tai, Ching-Kai Shen, Hua-Shu Ivan Wu, Fan Hu
  • Publication number: 20200006469
    Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.
    Type: Application
    Filed: May 13, 2019
    Publication date: January 2, 2020
    Inventors: Chi-Yuan Shih, Kai-Fung Chang, Shih-Fen Huang, Wen-Chuan Tai, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Anderson Lin, Fu-Chun Huang, Chun-Ren Cheng, Ivan Hua-Shu Wu, Fan Hu, Ching-Hui Lin, Yan-Jie Liao
  • Patent number: 10464808
    Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: November 5, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Chia-Ming Hung, Shao-Chi Yu, Hung-Hua Lin, Yuan-Chih Hsieh
  • Patent number: 10392244
    Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to some embodiments of the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: August 27, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ming Hung, Shao-Chi Yu, Hsiang-Fu Chen, Wen-Chuan Tai, Hsin-Ting Huang
  • Publication number: 20190161342
    Abstract: The present disclosure relates to a MEMS package having a cap substrate with different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, with the hard mask in place, an etch is performed to the cap substrate such that an uncovered portion of a bottom surface of the first trench is recessed while a covered portion of the bottom surface of the first trench is non-altered to form a stopper within the first trench. Then, the front side of the cap substrate is bonded to a device substrate, enclosing the first trench over a first MEMS device.
    Type: Application
    Filed: November 27, 2017
    Publication date: May 30, 2019
    Inventors: Wen-Chuan Tai, Fan Hu
  • Publication number: 20190161346
    Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.
    Type: Application
    Filed: November 28, 2017
    Publication date: May 30, 2019
    Inventors: Yi-Chia Lee, Chin-Min Lin, Cheng San Chou, Hsiang-Fu Chen, Wen-Chuan Tai, Ching-Kai Shen, Hua-Shu Ivan Wu, Fan Hu
  • Patent number: 10266399
    Abstract: A method of manufacturing a semiconductor device is provided. A first substrate is bonded with a second substrate. The second substrate is recessed to form a first sidewall and a first cavity laterally defined by the first sidewall. The second substrate is recessed to form a second sidewall and a second cavity laterally defined by the second sidewall. The second substrate is bonded with a third substrate at a first barometric pressure thereby forming the first cavity and the second cavity. The first sidewall is recessed to form a channel from the first cavity to an outer surface of the first sidewall. The third substrate is recessed and the first cavity is exposed to a second barometric pressure different from the first barometric pressure.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiou-Kang Lee, Wen-Chuan Tai