Patents by Inventor Wen-Chuan Tai

Wen-Chuan Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10266396
    Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Kai Shen, Wen-Chuan Tai, Chia-Ming Hung, Hsiang-Fu Chen, Jung-Huei Peng, Chun-Wen Cheng
  • Publication number: 20190062156
    Abstract: A method of manufacturing a semiconductor device is provided. A first substrate is bonded with a second substrate. The second substrate is recessed to form a first sidewall and a first cavity laterally defined by the first sidewall. The second substrate is recessed to form a second sidewall and a second cavity laterally defined by the second sidewall. The second substrate is bonded with a third substrate at a first barometric pressure thereby forming the first cavity and the second cavity. The first sidewall is recessed to form a channel from the first cavity to an outer surface of the first sidewall. The third substrate is recessed and the first cavity is exposed to a second barometric pressure different from the first barometric pressure.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: JIOU-KANG LEE, WEN-CHUAN TAI
  • Publication number: 20180339899
    Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 29, 2018
    Inventors: CHING-KAI SHEN, WEN-CHUAN TAI, CHIA-MING HUNG, HSIANG-FU CHEN, JUNG-HUEI PENG, CHUN-WEN CHENG
  • Patent number: 10131540
    Abstract: The present disclosure relates to a wafer level chip scale package (WLCSP) with a stress absorbing cap substrate. The cap substrate is bonded to a die through a bond ring and a bond pad arranged on an upper surface of the cap substrate. A through substrate via (TSV) extends from the bond pad, through the cap substrate, to a lower surface of the cap substrate. Further, recesses in the upper surface extend around the bond pad and along sidewalls of the bond ring. The recesses absorb induced stress, thereby mitigating any device offset in the die.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: November 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shao-Chi Yu, Chia-Ming Hung, Hsin-Ting Huang, Hsiang-Fu Chen, Allen Timothy Chang, Wen-Chuan Tai
  • Patent number: 10053361
    Abstract: A microelectromechanical systems (MEMS) package includes a eutectic bonding structure free of a native oxide layer and an anti-stiction layer, while also including a MEMS device having a top surface and sidewalls lined with the anti-stiction layer. The MEMS device is arranged within a MEMS substrate having a first eutectic bonding substructure arranged thereon. A cap substrate having a second eutectic bonding substructure arranged thereon is eutectically bonded to the MEMS substrate with a eutectic bond at the interface of the first and second eutectic bonding substructures. The anti-stiction layer lines a top surface and sidewalls of the MEMS device, but not the first and second eutectic bonding substructures. A method for manufacturing the MEMS package and a process system for selective plasma treatment are also provided.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: August 21, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuan-Chih Hsieh, Hung-Hua Lin, Wen-Chuan Tai, Hsiang-Fu Chen
  • Publication number: 20180127263
    Abstract: Microelectromechanical systems (MEMS) packages and methods for forming the same are provided. The MEMS package includes a semiconductor substrate having a metallization layer over the semiconductor substrate. The MEMS package also includes a first planarization layer and an overlying second planarization layer over the metallization layer. The planarization structure has a first cavity therein exposing the metallization layer. The MEMS package also includes a MEMS device structure bonded to the second planarization layer. The MEMS device structure includes a moveable element over the first cavity. The MEMS package also includes a first stopper placed on the exposed metallization layer in the first cavity. The first stopper includes a patterned conductive layer and an underlying patterned insulating layer.
    Type: Application
    Filed: November 10, 2016
    Publication date: May 10, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Chuan TAI, Hsiang-Fu CHEN, Fan HU
  • Publication number: 20180022602
    Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.
    Type: Application
    Filed: October 2, 2017
    Publication date: January 25, 2018
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Chia-Ming Hung, Shao-Chi Yu, Hung-Hua Lin, Yuan-Chih Hsieh
  • Patent number: 9856139
    Abstract: The present disclosure relates to a method of forming a micro-electro mechanical system (MEMs) structure. In some embodiments, the method may be performed by providing a device substrate having a first MEMS device and a second MEMS device, and by providing a capping structure having a first cavity and a second cavity. The capping structure is bonded to the device substrate, such that the first cavity is arranged over the first MEMS device and the second cavity is arranged over the second MEMS device. A first pressure is established within the first cavity and the second cavity. A vent is selectively etched within the capping structure to change the first pressure within the second cavity to a second pressure, which is different from the first pressure.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: January 2, 2018
    Assignee: Taiwan Semiconductor Maunfacturing Co., Ltd.
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Shao-Chi Yu, Chia-Ming Hung, Allen Timothy Chang, Bruce C. S. Chou, Chin-Min Lin
  • Patent number: 9845236
    Abstract: The present disclosure is directed to a monolithic MEMS (micro-electromechanical system) platform having a temperature sensor, a pressure sensor and a gas sensor, and an associated method of formation. In some embodiments, the MEMS platform includes a semiconductor substrate having one or more transistor devices and a temperature sensor. A dielectric layer is disposed over the semiconductor substrate. A cavity is disposed within an upper surface of the dielectric layer. A MEMS substrate is arranged onto the upper surface of the dielectric layer and has a first section and a second section. A pressure sensor has a first pressure sensor electrode that is vertically separated by the cavity from a second pressure sensor electrode within the first section of a MEMS substrate. A gas sensor has a polymer disposed between a first gas sensor electrode within the second section of a MEMS substrate and a second gas sensor electrode.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: December 19, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shao-Chi Yu, Chia-Ming Hung, Hsin-Ting Huang, Hsiang-Fu Chen, Allen Timothy Chang, Wen-Chuan Tai
  • Patent number: 9776858
    Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: October 3, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Chia-Ming Hung, Shao-Chi Yu, Hung-Hua Lin, Yuan-Chih Hsieh
  • Publication number: 20170233249
    Abstract: The present disclosure relates to a method of forming a micro-electro mechanical system (MEMs) structure. In some embodiments, the method may be performed by providing a device substrate having a first MEMS device and a second MEMS device, and by providing a capping structure having a first cavity and a second cavity. The capping structure is bonded to the device substrate, such that the first cavity is arranged over the first MEMS device and the second cavity is arranged over the second MEMS device. A first pressure is established within the first cavity and the second cavity. A vent is selectively etched within the capping structure to change the first pressure within the second cavity to a second pressure, which is different from the first pressure.
    Type: Application
    Filed: May 3, 2017
    Publication date: August 17, 2017
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Shao-Chi Yu, Chia-Ming Hung, Allen Timothy Chang, Bruce C.S. Chou, Chin-Min Lin
  • Patent number: 9714166
    Abstract: The present disclosure relates to a MEMS device with a hermetic sealing structure, and an associated method. In some embodiments, a first die and a second die are bonded at a bond interface region to form a chamber. A conformal thin film structure is disposed covering an outer sidewall of the bond interface region to provide hermetic sealing. In some embodiments, the conformal thin film structure is a continuous thin layer covering an outer surface of the second die and a top surface of the first die. In some other embodiments, the conformal thin film structure comprises several discrete thin film patches disposed longitudinal.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: July 25, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shao-Chi Yu, Hsiang-Fu Chen, Hsin-Ting Huang, Chia-Ming Hung, Wen-Chuan Tai
  • Patent number: 9656857
    Abstract: Some embodiments relate to multiple MEMS devices that are integrated together on a single substrate. A device substrate comprising first and second micro-electro mechanical system (MEMS) devices is bonded to a capping structure. The capping structure comprises a first cavity arranged over the first MEMS device and a second cavity arranged over the second MEMS device. The first cavity is filled with a first gas at a first gas pressure. The second cavity is filled with a second gas at a second gas pressure, which is different from the first gas pressure. A recess is arranged within a lower surface of the capping structure. The recess abuts the second cavity. A vent is arranged within the capping structure. The vent extends from a top of the recess to the upper surface of the capping structure. A lid is arranged within the vent and configured to seal the second cavity.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: May 23, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Shao-Chi Yu, Chia-Ming Hung, Allen Timothy Chang, Bruce C. S. Chou, Chin-Min Lin
  • Publication number: 20170121174
    Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to some embodiments of the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.
    Type: Application
    Filed: January 16, 2017
    Publication date: May 4, 2017
    Inventors: Chia-Ming Hung, Shao-Chi Yu, Hsiang-Fu Chen, Wen-Chuan Tai, Hsin-Ting Huang
  • Patent number: 9630832
    Abstract: A semiconductor device includes a device substrate and a conductive capping substrate. The device substrate includes at least one micro-electro mechanical system (MEMS) device. The conductive capping substrate is bonded to the device substrate and includes a cap portion covering the MEMS device, and a conductor portion in electrical contact with the device substrate.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: April 25, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Min Lin, Hsiang-Fu Chen, Wen-Chuan Tai, Hsin-Ting Huang, Chia-Ming Hung
  • Patent number: 9584003
    Abstract: A semiconductor device includes a moveable element over a substrate, wherein the moveable element is moveable relative to the substrate. The semiconductor device further includes a first anchor portion connected to the substrate; and a second anchor portion connected to the substrate on an opposite side of the moveable element from the first anchor portion. The semiconductor device further includes a first connector configured to connect the moveable element to the first anchor portion. The semiconductor device further includes a second connector configured to connect the moveable element to the second anchor portion. The semiconductor device further includes a conductive wire loop on the moveable element; and a connection wire electrically connected to a first end of the conductive wire loop, wherein the connection wire extends across the first connector to the first anchor portion.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: February 28, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tien-Kan Chung, Wen-Chuan Tai, Yao-Te Huang, Hsin-Ting Huang, Shang-Ying Tsai, Chang-Yi Yang, Chia-Ming Hung
  • Patent number: 9567204
    Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: February 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ming Hung, Shao-Chi Yu, Hsiang-Fu Chen, Wen-Chuan Tai, Hsin-Ting Huang
  • Publication number: 20160264402
    Abstract: The present disclosure relates to a wafer level chip scale package (WLCSP) with a stress absorbing cap substrate. The cap substrate is bonded to a die through a bond ring and a bond pad arranged on an upper surface of the cap substrate. A through substrate via (TSV) extends from the bond pad, through the cap substrate, to a lower surface of the cap substrate. Further, recesses in the upper surface extend around the bond pad and along sidewalls of the bond ring. The recesses absorb induced stress, thereby mitigating any device offset in the die.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 15, 2016
    Inventors: Shao-Chi Yu, Chia-Ming Hung, Hsin-Ting Huang, Hsiang-Fu Chen, Allen Timothy Chang, Wen-Chuan Tai
  • Publication number: 20160266061
    Abstract: The present disclosure is directed to a monolithic MEMS (micro-electromechanical system) platform having a temperature sensor, a pressure sensor and a gas sensor, and an associated method of formation. In some embodiments, the MEMS platform includes a semiconductor substrate having one or more transistor devices and a temperature sensor. A dielectric layer is disposed over the semiconductor substrate. A cavity is disposed within an upper surface of the dielectric layer. A MEMS substrate is arranged onto the upper surface of the dielectric layer and has a first section and a second section. A pressure sensor has a first pressure sensor electrode that is vertically separated by the cavity from a second pressure sensor electrode within the first section of a MEMS substrate. A gas sensor has a polymer disposed between a first gas sensor electrode within the second section of a MEMS substrate and a second gas sensor electrode.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 15, 2016
    Inventors: Shao-Chi Yu, Chia-Ming Hung, Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai
  • Patent number: 9422151
    Abstract: A semiconductor device includes a substrate and a movable membrane proximal to the substrate. The semiconductor device further includes a mesa over the substrate and protruded from a surface of the substrate toward the movable membrane. The mesa includes a strike hitting portion configured to receive a striking force from the membrane and a hybrid stress buffer under the strike hitting portion, wherein the hybrid stress buffer includes at least two layers which are distinguishable by a difference in hardness.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: August 23, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Chuan Tai, Alexander Kalnitsky, Hsin-Ting Huang, Hsiang-Fu Chen, Jiou-Kang Lee, Ching-Kai Shen