Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.

Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.

Abstract: The present disclosure relates to a MEMS package having a cap substrate with different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, with the hard mask in place, an etch is performed to the cap substrate such that an uncovered portion of a bottom surface of the first trench is recessed while a covered portion of the bottom surface of the first trench is non-altered to form a stopper within the first trench. Then, the front side of the cap substrate is bonded to a device substrate, enclosing the first trench over a first MEMS device.

Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.

Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. In some embodiments, a ventilation trench and an isolation trench are concurrently within a capping substrate. The isolation trench isolates a silicon region and has a height substantially equal to a height of the ventilation trench. A sealing structure is formed within the ventilation trench and the isolation trench, the sealing structure filing the isolation trench and defining a vent within the ventilation trench. A device substrate is provided and bonded to the capping substrate at a first gas pressure and hermetically sealing a first cavity associated with a first MEMS device and a second cavity associated with a second MEMS device. The capping substrate is thinned to open the vent to adjust a gas pressure of the second cavity.

Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.

Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.

Abstract: A method for manufacturing a microelectromechanical systems (MEMS) device is provided. According to some embodiments of the method, a semiconductor structure is provided. The semiconductor structure includes an integrated circuit (IC) substrate, a dielectric layer arranged over the IC substrate, and a MEMS substrate arranged over the IC substrate and the dielectric layer to define a cavity between the MEMS substrate and the IC substrate. The MEMS substrate includes a MEMS hole in fluid communication with the cavity and extending through the MEMS substrate. A sealing layer is formed over or lining the MEMS hole to hermetically seal the cavity with a reference pressure while the semiconductor structure is arranged within a vacuum having the reference pressure. The semiconductor structure resulting from application of the method is also provided.

Abstract: The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. A device substrate comprising first and second MEMS devices is bonded to a capping substrate comprising first and second recessed regions. A ventilation trench is laterally spaced apart from the recessed regions and within the second cavity. A sealing structure is arranged within the ventilation trench and defines a vent in fluid communication with the second cavity. A cap is arranged within the vent to seal the second cavity at a second gas pressure that is different than a first gas pressure of the first cavity.

Abstract: The present disclosure relates to a MEMS package having a cap substrate with different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, with the hard mask in place, an etch is performed to the cap substrate such that an uncovered portion of a bottom surface of the first trench is recessed while a covered portion of the bottom surface of the first trench is non-altered to form a stopper within the first trench. Then, the front side of the cap substrate is bonded to a device substrate, enclosing the first trench over a first MEMS device.

Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.

Abstract: A method of manufacturing a semiconductor device is provided. A first substrate is bonded with a second substrate. The second substrate is recessed to form a first sidewall and a first cavity laterally defined by the first sidewall. The second substrate is recessed to form a second sidewall and a second cavity laterally defined by the second sidewall. The second substrate is bonded with a third substrate at a first barometric pressure thereby forming the first cavity and the second cavity. The first sidewall is recessed to form a channel from the first cavity to an outer surface of the first sidewall. The third substrate is recessed and the first cavity is exposed to a second barometric pressure different from the first barometric pressure.

Abstract: A method of manufacturing a semiconductor device is provided. A first substrate is bonded with a second substrate. The second substrate is recessed to form a first sidewall and a first cavity laterally defined by the first sidewall. The second substrate is recessed to form a second sidewall and a second cavity laterally defined by the second sidewall. The second substrate is bonded with a third substrate at a first barometric pressure thereby forming the first cavity and the second cavity. The first sidewall is recessed to form a channel from the first cavity to an outer surface of the first sidewall. The third substrate is recessed and the first cavity is exposed to a second barometric pressure different from the first barometric pressure.

Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.

Abstract: The present disclosure relates to a wafer level chip scale package (WLCSP) with a stress absorbing cap substrate. The cap substrate is bonded to a die through a bond ring and a bond pad arranged on an upper surface of the cap substrate. A through substrate via (TSV) extends from the bond pad, through the cap substrate, to a lower surface of the cap substrate. Further, recesses in the upper surface extend around the bond pad and along sidewalls of the bond ring. The recesses absorb induced stress, thereby mitigating any device offset in the die.

Abstract: A microelectromechanical systems (MEMS) package includes a eutectic bonding structure free of a native oxide layer and an anti-stiction layer, while also including a MEMS device having a top surface and sidewalls lined with the anti-stiction layer. The MEMS device is arranged within a MEMS substrate having a first eutectic bonding substructure arranged thereon. A cap substrate having a second eutectic bonding substructure arranged thereon is eutectically bonded to the MEMS substrate with a eutectic bond at the interface of the first and second eutectic bonding substructures. The anti-stiction layer lines a top surface and sidewalls of the MEMS device, but not the first and second eutectic bonding substructures. A method for manufacturing the MEMS package and a process system for selective plasma treatment are also provided.

Abstract: Microelectromechanical systems (MEMS) packages and methods for forming the same are provided. The MEMS package includes a semiconductor substrate having a metallization layer over the semiconductor substrate. The MEMS package also includes a first planarization layer and an overlying second planarization layer over the metallization layer. The planarization structure has a first cavity therein exposing the metallization layer. The MEMS package also includes a MEMS device structure bonded to the second planarization layer. The MEMS device structure includes a moveable element over the first cavity. The MEMS package also includes a first stopper placed on the exposed metallization layer in the first cavity. The first stopper includes a patterned conductive layer and an underlying patterned insulating layer.

Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.

Abstract: The present disclosure relates to a method of forming a micro-electro mechanical system (MEMs) structure. In some embodiments, the method may be performed by providing a device substrate having a first MEMS device and a second MEMS device, and by providing a capping structure having a first cavity and a second cavity. The capping structure is bonded to the device substrate, such that the first cavity is arranged over the first MEMS device and the second cavity is arranged over the second MEMS device. A first pressure is established within the first cavity and the second cavity. A vent is selectively etched within the capping structure to change the first pressure within the second cavity to a second pressure, which is different from the first pressure.

Abstract: The present disclosure is directed to a monolithic MEMS (micro-electromechanical system) platform having a temperature sensor, a pressure sensor and a gas sensor, and an associated method of formation. In some embodiments, the MEMS platform includes a semiconductor substrate having one or more transistor devices and a temperature sensor. A dielectric layer is disposed over the semiconductor substrate. A cavity is disposed within an upper surface of the dielectric layer. A MEMS substrate is arranged onto the upper surface of the dielectric layer and has a first section and a second section. A pressure sensor has a first pressure sensor electrode that is vertically separated by the cavity from a second pressure sensor electrode within the first section of a MEMS substrate. A gas sensor has a polymer disposed between a first gas sensor electrode within the second section of a MEMS substrate and a second gas sensor electrode.