Patents by Inventor Wen Fang

Wen Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140159155
    Abstract: A layout pattern of an implant layer includes at least a linear region and at least a non-linear region. The linear region includes a plurality of first patterns to accommodate first dopants and the non-linear region includes a plurality of second patterns to accommodate the first dopants. The linear region abuts the non-linear region. Furthermore, a pattern density of the first patterns in the linear region is smaller than a pattern density of the second patterns in the non-linear region.
    Type: Application
    Filed: February 17, 2014
    Publication date: June 12, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Tsung Lee, Cheng-Hua Yang, Wen-Fang Lee, Chih-Chung Wang, Chih-Wei Hsu, Po-Ching Chuang
  • Publication number: 20140159742
    Abstract: A processing system configured for capacitive sensing comprises transmitter circuitry, a first internal diagnostic mechanism, and a determination module. The transmitter circuitry is coupled with a first transmitter path of a plurality of transmitter paths and configured to transmit a first transmitter signal with the first transmitter path, wherein each transmitter path of the plurality of transmitter paths is configured for capacitive sensing. The first internal diagnostic mechanism is coupled to a second transmitter path of the plurality of transmitter paths. The first internal diagnostic mechanism is configured to acquire a first resulting signal while the transmitter circuitry transmits the first transmitter signal with the first transmitter path, wherein the first internal diagnostic mechanism comprises a selectable leakage path coupled to the transmitter circuitry.
    Type: Application
    Filed: February 13, 2014
    Publication date: June 12, 2014
    Applicant: Synaptics Incorporated
    Inventor: Wen FANG
  • Patent number: 8719442
    Abstract: A stream condense unit coupled to a streaming server and a client player is provided. The stream condense unit includes a streaming data input unit, a stream content analysis unit, a frame timestamp adjust unit, and a streaming data output unit. The streaming data input unit is configured to receive a plurality of streaming content groups sent by the streaming server. The stream content analysis unit is configured to receive the plurality of streaming content groups, execute a content analysis to get importance scores of the source streaming contents. The frame timestamp adjust unit is configured to receive the condensed stream and adjust a timestamp of each frame in the condensed stream. The streaming data output unit is configured to receive the condensed stream and attach content identifying labels and tables to the condensed stream, and send the condensed stream to the client player to display.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: May 6, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Hua Lee, Hui-Ping Kuo, Jen-Yu Yu, Wen-Fang Cheng
  • Publication number: 20140119688
    Abstract: A circuit board, a manufacturing method thereof, and an electro-optic apparatus having the circuit board are provided. The circuit board includes a substrate including a first dielectric layer and a first circuit layer disposed thereon, a waveguide layer disposed on a portion of the substrate, a second dielectric layer, a convex structure and a second circuit layer. The second dielectric layer is disposed on the substrate and the waveguide layer. The second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer. The convex structure is disposed on the sidewall of the waveguide layer. The convex structure and the waveguide layer respectively have refractive index n1 and n2, and |n1-n21|n1<1%. The surface roughness of the convex structure is less than that of the sidewall of the waveguide layer. The second circuit layer is disposed on the second dielectric layer.
    Type: Application
    Filed: February 26, 2013
    Publication date: May 1, 2014
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Pei-Chang Huang, Wen-Fang Liu, Cheng-Po Yu
  • Patent number: 8698247
    Abstract: The present invention provides a semiconductor device including a substrate, a deep well, a high-voltage well, and a doped region. The substrate and the high-voltage well have a first conductive type, and the deep well and the doped region have a second conductive type different from the first conductive type. The substrate has a high-voltage region and a low-voltage region, and the deep well is disposed in the substrate in the high-voltage region. The high-voltage well is disposed in the substrate between the high-voltage region and the low-voltage region, and the doped region is disposed in the high-voltage well. The doped region and the high-voltage well are electrically connected to a ground.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: April 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Chung Wang, Wei-Lun Hsu, Te-Yuan Wu, Wen-Fang Lee, Ke-Feng Lin, Shan-Shi Huang, Ming-Tsung Lee
  • Publication number: 20140099432
    Abstract: A fabrication method for a flexible circuit board is provided. The fabrication method includes the following steps. Firstly, a release film having an upper surface and a lower surface opposite to each other is provided. Next, two flexible substrates are respectively disposed on the upper surface and the lower surface. Next, a plurality of nano-scale micro-pores are formed on each flexible substrate to form two non-smooth flexible substrates. The nano-scale micro-pores evenly distributed over an outer surface of each non-smooth flexible substrate. Each non-smooth flexible substrate being adapted to be performed a plating process directly on the outer surface thereof.
    Type: Application
    Filed: December 27, 2012
    Publication date: April 10, 2014
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
  • Patent number: 8692794
    Abstract: A processing system configured for capacitive sensing comprises transmitter circuitry, a first internal diagnostic mechanism, and a determination module. The transmitter circuitry is configured to transmit during a first time period with a first transmitter path of a plurality of transmitter paths in an input device. Each transmitter path of the plurality of transmitter paths is configured for capacitive sensing. The first internal diagnostic mechanism comprises a selectable leakage path. The selectable leakage path is configured to be coupled with the transmitter circuitry. The determination module is configured to determine if a discontinuity exists within the first transmitter path based on a discharge rate for the first transmitter path. The discharge rate is acquired during a second time period via the selectable leakage path of the first internal diagnostic mechanism, wherein the second time period occurs after the first time period.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: April 8, 2014
    Assignee: Synaptics Incorporated
    Inventor: Wen Fang
  • Patent number: 8692326
    Abstract: A layout pattern of a high voltage metal-oxide-semiconductor transistor device includes a first doped region having a first conductivity type, a second doped region having the first conductivity type, and an non-continuous doped region formed in between the first doped region and the second doped region. The non-continuous doped region includes a plurality of gaps formed therein. The non-continuous doped region further includes a second conductivity type complementary to the first conductivity type.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: April 8, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Tsung Lee, Cheng-Hua Yang, Wen-Fang Lee, Chih-Chung Wang, Chih-Wei Hsu, Po-Ching Chuang
  • Publication number: 20140092067
    Abstract: The disclosure discloses an information processing method for an electronic device with a touch screen. The method includes: touch with a touch screen is detected; an information pickup area is set on the touch screen according to the touch; and information in the information pickup area is picked up according to an information pickup command and the picked-up information is stored. In the disclosure, existing information, such as an image or a signature, is picked up via an information processing device, such as a stylus, on a touch screen of an electronic device; and a user can autonomously control its image, signature and other information to display on the touch screen of the electronic device when needed. Therefore, great convenience is brought to users using a portable electronic device such as a tablet PC and a smart phone, and their personalized application can also be met to a great extent.
    Type: Application
    Filed: September 15, 2011
    Publication date: April 3, 2014
    Applicant: ZTE CORPORATION
    Inventors: Wen Fang, Feng Guo
  • Patent number: 8679851
    Abstract: A method for determining a turbidity point and a free carbohydrate buffer coefficient of an iron-carbohydrate complex. The method includes: (1) contacting the complex with an acid; (2) determining hydrogen ion concentrations and solution turbidities of the complex in acid degradation; and (3) mathematically fitting the data, to obtain the turbidity point of the complex and the free carbohydrate buffer coefficient through mathematical treatment. A method for evaluating the safety of the iron-carbohydrate complex with the turbidity point and the free carbohydrate buffer coefficient.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: March 25, 2014
    Assignee: Nanjing Lifenergy R&D Co., Ltd
    Inventors: Wen Fang, Chuanzheng Hua, Jie Yang, Guoxin He, Shoujun Xiong
  • Publication number: 20140078119
    Abstract: The present document provides a method for simulating left key input and right key input using a capacitive screen stylus, which is applied to a terminal provided with a capacitive screen. The method includes: after receiving a command of a user selecting to perform left key input or right key input, the capacitive screen stylus outputting an electric signal corresponding to the command; and the terminal, if determining that the capacitive screen receives the electric signal through contact with the capacitive screen stylus, executing the input command of the user according to an input mode corresponding to the electric signal. The technical problem of being unable to perform the left key input and right key input conveniently in the related art is solved.
    Type: Application
    Filed: July 11, 2011
    Publication date: March 20, 2014
    Applicant: ZTE Corporation
    Inventors: Yusheng Cao, Wen Fang
  • Publication number: 20140069574
    Abstract: A manufacturing method of a circuit board is provided. In the manufacturing method, an electrically insulating layer and at least one electrically insulating material are formed on a plane of a thermally conductive plate, and a metal pattern layer located on the electrically insulating layer is formed. The electrically insulating layer partially covers the plane, and the electrically insulating material covers the plane where is not covered by the electrically insulating layer. The electrically insulating material touches the thermally conductive plate. A thermal conductivity of the electrically insulating material is larger than that of the electrically insulating layer.
    Type: Application
    Filed: November 12, 2013
    Publication date: March 13, 2014
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: TZYY JANG TSENG, CHANG MING LEE, WEN FANG LIU, CHENG PO YU
  • Patent number: 8669747
    Abstract: The present invention discloses a constant on-time switching regulator, a control method therefor, and an on-time calculation circuit for calculating an on-time period of a constant on-time switching regulator. The on-time calculation circuit calculates on-time according to practical conditions. It includes: a driver gate receiving a gate signal of a power switch in a switching regulator, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving an output from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio of the gate signal; and an on-time generator comparing the second reference voltage with a ramp signal to determine an on-time of the power switch.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: March 11, 2014
    Assignee: Ricktek Technology Corporation, R.O.C.
    Inventors: Li-Wen Fang, Ting-Jung Tai, Chih-Hao Yang
  • Publication number: 20140040983
    Abstract: Disclosed are a terminal authentication method and a terminal. The authentication method comprises: setting on the terminal a detection device; setting on a stylus a label device capable of being detected by the detection device; the detection device detecting for label information preconfigured in the label device, and authenticating the stylus according to a detection result. Employment of the technical solution of the disclosure solves the technical problems in the related art of the incapability of the terminal to authenticate the stylus.
    Type: Application
    Filed: July 19, 2011
    Publication date: February 6, 2014
    Applicant: ZTE CORPORATION
    Inventor: Wen Fang
  • Publication number: 20140016811
    Abstract: A mobile terminal handwriting pen is provided, and the handwriting pen is integrated with an earphone. The handwriting pen includes: a pen nib, which is an earphone plug; a pen body, one end of which is fixedly connected to the pen nib, and the other end is movably connected to a pen cap, wherein, an earphone cord is set within the pen body, and both ends of the earphone cord are respectively connected with the earphone plug and an earplug; and the pen cap, which movably cooperates and connects with the pen body and on which the earplug is set. The present invention has a simple structure and less production cost, and it is easy to be standardized and massively produced, which is convenient for usage and promotion.
    Type: Application
    Filed: June 2, 2011
    Publication date: January 16, 2014
    Applicant: ZTE CORPORATION
    Inventors: Wen Fang, Sha Cao
  • Publication number: 20130342183
    Abstract: A control circuit of a switching regulator includes a control pin for coupling with an external resistor; a resistor detecting circuit for detecting a resistance of the external resistor; a current generating module for generating a corresponding control current according to a detection result of the resistor detecting circuit; an oscillating circuit for generating a clock signal; and a mode-switching circuit. When the mode-switching circuit configures the oscillating circuit to operate in a resistor-controlled mode, the oscillating circuit generates the clock signal according to the control current so that the clock signal has a frequency corresponding to the resistance of the external resistor. When the mode-switching circuit configures the oscillating circuit to operate in a signal-controlled mode, the oscillating circuit generates the clock signal according to an external synchronous signal coupled with the control pin so that the clock signal is synchronized with the external synchronous signal.
    Type: Application
    Filed: June 7, 2013
    Publication date: December 26, 2013
    Inventors: Li-Wen FANG, Ping-Ching HUANG, Cheng-Kuang LIN, An-Tung CHEN
  • Publication number: 20130320445
    Abstract: A high voltage metal-oxide-semiconductor (HV MOS) device includes a substrate, a gate positioned on the substrate, a drain region formed in the substrate, a source region formed in the substrate, a first doped region formed in between the drain region and the source region, and a second doped region formed over a top of the first doped region or/and under a bottom of the first doped region. The drain region, the source region, and the second doped region include a first conductivity type, the first doped region includes a second conductivity type, and the first conductivity type and the second conductivity type are complementary.
    Type: Application
    Filed: June 4, 2012
    Publication date: December 5, 2013
    Inventors: Ming-Tsung Lee, Cheng-Hua Yang, Shih-Chieh Pu, Wen-Fang Lee, Chih-Chung Wang
  • Patent number: 8598463
    Abstract: A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: December 3, 2013
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
  • Publication number: 20130307071
    Abstract: A layout pattern of a high voltage metal-oxide-semiconductor transistor device includes a first doped region having a first conductivity type, a second doped region having the first conductivity type, and an non-continuous doped region formed in between the first doped region and the second doped region. The non-continuous doped region further includes a plurality of third doped regions, a plurality of gaps, and a plurality of fourth doped regions. The gaps and the third doped regions s are alternately arranged, and the fourth doped regions are formed in the gaps. The third doped regions include a second conductivity type complementary to the first conductivity type, and the fourth doped regions include the first conductivity type.
    Type: Application
    Filed: May 21, 2012
    Publication date: November 21, 2013
    Inventors: Ming-Tsung Lee, Cheng-Hua Yang, Wen-Fang Lee, Chih-Chung Wang, Te-Yuan Wu
  • Publication number: 20130298226
    Abstract: The disclosure provides a method and a terminal for locking/unlocking a screen of a terminal based on Radio Frequency Identification (RFID). The method includes: the terminal receives locking or unlocking information carrying authentication information from an external electronic tag via an RFID reader; user identity authentication is performed according to the authentication information; and the screen of the terminal is locked or unlocked according to the locking or unlocking information, after the authentication succeeds. With the method and the terminal, user experience can be achieved by waving a mobile phone and the screen can be opened while being unlocked, thus, the user experience of locking/unlocking screen is improved.
    Type: Application
    Filed: April 2, 2011
    Publication date: November 7, 2013
    Applicant: ZTE CORPORATION
    Inventors: Wen Fang, Yang Liu