Patents by Inventor Wen Hao

Wen Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and a Method of Forming a Particle Shield
    Publication number: 20210018853
    Abstract: A lithography system includes a radiation source and a photomask. The radiation source is configured to generate electromagnetic radiation traveling towards the photomask. The lithography system also includes an incident channel between the radiation source and the photomask for the electromagnetic radiation to travel through. There are a first injection nozzle configured to generate a first particle shield between the photomask and an exit port of the incident channel and a second injection nozzle configured to generate a second particle shield inside the incident channel.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 21, 2021
    Inventor: Wen-Hao Cheng
  • METHOD OF DESIGNING SEMICONDUCTOR DEVICE
    Publication number: 20210004517
    Abstract: A method including selecting a plurality of layout patterns, wherein each of the layout patterns comprises a corresponding via pillar structure that satisfies an electromigration (EM) rule, wherein each of the via pillar structures comprises metal layers and at least one via coupled to the metal layers. The method further includes selecting a layout pattern from the plurality of layout patterns having a smallest physical size. The method further includes performing a placement and routing process by using the selected layout pattern.
    Type: Application
    Filed: September 23, 2020
    Publication date: January 7, 2021
    Inventors: Shao-Huan WANG, Sheng-Hsiung CHEN, Wen-Hao CHEN, Chun-Chen CHEN, Hung-Chih OU
  • FAN NOISE-LOWERING STRUCTURE
    Publication number: 20200400163
    Abstract: A fan noise-lowering structure includes a fan frame and a connection section. The fan frame has a bottom side and a circumferential wall. The circumferential wall defines an airflow passage. Two ends of the airflow passage respectively have an inlet and an outlet. The connection section is disposed on inner side or outer side of the circumferential wall. The connection section has an internal passage. Two ends of the internal passage respectively have an inlet end and an outlet end. The outlet end is disposed on the inner side of the circumferential wall in connection with the airflow passage near the inlet. The inlet end is disposed on the bottom side in flush with the outlet. The connection section serves to guide the high-pressure air at the outlet to jet to the inlet so as to achieve multiple noise-lowering effects.
    Type: Application
    Filed: July 3, 2020
    Publication date: December 24, 2020
    Inventor: Wen-Hao Liu
  • FAN FRAME BODY STRUCTURE
    Publication number: 20200400156
    Abstract: A fan frame body structure includes a first frame body. The first frame body has a first upper end, a first lower end, a first frame wall and a first main flow way. The first main flow way passes through the first frame body and is formed with a first main inlet and a first main outlet respectively at the first upper end and the first lower end. A first subsidiary flow way is disposed in the first frame wall. The first subsidiary flow way is in parallel the first main flow way. The first subsidiary outlet is positioned at the first upper end of the first frame body in flush with and in adjacency to the first main inlet.
    Type: Application
    Filed: July 3, 2020
    Publication date: December 24, 2020
    Inventors: Sung-Wei Sun, Chu-Hsien Chou, Yi-Chih Lin, Pei-Chuan Lee, Wen-Hao Liu
  • COMPOSITION FOR SUBSTRATE SURFACE MODIFICATION AND METHOD USING THE SAME
    Publication number: 20200399293
    Abstract: The present invention provides a composition for substrate surface modification and a method using the same, and the composition for substrate surface modification is composed of a compound of the general formula structure shown in formula 1: formula 1, wherein n1 is an integer of 1 to 6, and R is a zwitterionic group. The composition for substrate surface modification uses water as a medium to perform modifying reaction over a substrate surface, and at the same time has biological modification characteristics, and abilities of immobilizing biomolecules and anti-biofouling.
    Type: Application
    Filed: September 3, 2020
    Publication date: December 24, 2020
    Inventors: Chen-Han Huang, Wen-Hao Chen
  • COMPOSITION FOR SUBSTRATE SURFACE MODIFICATION AND METHOD USING THE SAME
    Publication number: 20200399292
    Abstract: The present invention provides a composition for substrate surface modification and a method using the same, and the composition for substrate surface modification is composed of a compound of the general formula structure shown in formula 1: formula 1, wherein n1 is an integer of 1 to 6, and R is a zwitterionic group. The composition for substrate surface modification uses water as a medium to perform modifying reaction over a substrate surface, and at the same time has biological modification characteristics, and abilities of immobilizing biomolecules and anti-biofouling.
    Type: Application
    Filed: September 3, 2020
    Publication date: December 24, 2020
    Inventors: Chen-Han HUANG, Wen-Hao CHEN
  • Folding cage body
    Patent number: 10871007
    Abstract: A folding cage body includes six groups of fence members and an accommodating portion, wherein each group of the fence member includes an upright pole, an upper moveable pivotal piece, two slanting poles and two lower pivotal pieces, and the accommodating portion is provided in the fence members. The folding cage body can be freely expanded and folded and convenient and easy to move and fold.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: December 22, 2020
    Assignee: SPORT DIVERSIONS INC.
    Inventor: Wen-Hao Tsai
  • Method and system for latch-up prevention
    Patent number: 10872190
    Abstract: An integrated circuit design method includes receiving an integrated circuit design, and determining a floor plan for the integrated circuit design. The floor plan includes an arrangement of a plurality of functional cells and a plurality of tap cells. Potential latchup locations in the floor plan are determined, and the arrangement of at least one of the functional cells or the tap cells is modified based on the determined potential latchup locations.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: December 22, 2020
    Inventors: Po-Chia Lai, Kuo-Ji Chen, Wen-Hao Chen, Wun-Jie Lin, Yu-Ti Su, Rabiul Islam, Shu-Yi Ying, Stefan Rusu, Kuan-Te Li, David Barry Scott
  • Methodology for pattern density optimization
    Patent number: 10860774
    Abstract: The present disclosure relates to a method of data preparation. The method, in some embodiments, performs a first data preparation process using a data preparation element. The first data preparation process modifies a plurality of shapes of an integrated chip (IC) design that comprises a graphical representation of a layout used to fabricate an integrated chip. A plurality of additional shapes are added to the IC design using an additional shape insertion element. The plurality of additional shapes are separated from the plurality of shapes by one or more non-zero distances. A second data preparation process is performed using the data preparation element, after performing the first data preparation process. The second data preparation process modifies the plurality of additional shapes.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Chun Wang, Ming-Hui Chih, Ping-Chieh Wu, Chun-Hung Wu, Wen-Hao Liu, Cheng-Hsuan Huang, Cheng-Kun Tsai, Wen-Chun Huang, Ru-Gun Liu
  • Projection apparatus and heat dissipation control method thereof
    Patent number: 10859898
    Abstract: A projection apparatus and a heat dissipation control method thereof are provided. The projection apparatus includes a light valve module, a light source, a brightness sensor, a cooling element, a first temperature sensor, a second temperature sensor and a controller. The controller determines a specified temperature of the cooling element according to the brightness of an illumination beam provided by the light source, and calculates a dew point temperature according to the ambient temperature. The controller adjusts the operating power of the cooling element according to the dew point temperature, the specified temperature and the cold end temperature of the cold end surface of the cooling element. The operating power of the cooling element is flexibly adjusted based on the brightness provided by the light source to avoid a dew formation phenomenon on the cooling element and the light valve module.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: December 8, 2020
    Assignee: Coretronic Corporation
    Inventors: Kai-Lun Hou, Wen-Hao Chu, Te-Tang Chen
  • Power strap structure for high performance and low current density
    Patent number: 10861790
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a source region and a drain region separated by a channel region within a substrate. A middle-end-of-the-line (MEOL) structure is over the drain region and a gate structure is over the channel region. The MEOL structure is vertically disposed between the drain region and a plane extending along an upper surface of the gate structure. A first interconnect wire is connected to the MEOL structure by a first conductive contact that is directly over the drain region and that extends between the first interconnect wire and the MEOL structure. A conductive strap is located over the first interconnect wire. The conductive strap connects the first interconnect wire to a power rail having a larger width than the first interconnect wire.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chi-Yeh Yu, Jiann-Tyng Tzeng, Kam-Tou Sio, Pin-Dai Sue, Ru-Gun Liu, Shih-Wei Peng, Wen-Hao Chen, Yung-Sung Yen, Chun-Kuang Chen
  • Single-Crystal Hexagonal Boron Nitride Layer and Method Forming Same
    Publication number: 20200373409
    Abstract: A method includes depositing a copper layer over a first substrate, annealing the copper layer, depositing a hexagonal boron nitride (hBN) film on the copper layer, and removing the hBN film from the copper layer. The hBN film may be transferred to a second substrate.
    Type: Application
    Filed: October 7, 2019
    Publication date: November 26, 2020
    Inventors: Tse-An Chen, Chih-Piao Chuu, Lain-Jong Li, Wen-Hao Chang, ChienChih Tseng, Chao-Kai Wen
  • SEMICONDUCTOR WAFER MEASUREMENT METHOD AND SYSTEM
    Publication number: 20200364844
    Abstract: A method includes capturing a raw image from a semiconductor wafer, using graphic data system (GDS) information corresponding to the wafer to assign a measurement box in the raw image, performing a distance measurement on a feature of the raw image in the measurement box, and performing a manufacturing activity based on the distance measurement.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 19, 2020
    Inventors: Peng-Ren CHEN, Shiang-Bau WANG, Wen-Hao CHENG, Yung-Jung CHANG, Wei-Chung HU, Yi-An HUANG, Jyun-Hong CHEN
  • Method of regulating integrated circuit timing and power consumption
    Patent number: 10831978
    Abstract: A method of making an integrated circuit including identifying a first wire at a first location in an array of wires next to an empty location in a layout of the integrated circuit, adjusting a width of the first wire at the first location, and calculating a performance of a widened wire with regard to a first parameter. The method also includes comparing the calculated performance of the widened wire to a performance threshold of the first parameter, adjusting a degree of width adjustment of the widened wire according to a comparison result, and comparing the calculated performance of the width-adjusted widened wire to the performance threshold of the first parameter.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: November 10, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hung-Chih Ou, Wen-Hao Chen
  • LAMINATION FORMING SYSTEM
    Publication number: 20200338798
    Abstract: A lamination forming system includes a melt extruder, a nozzle head and a carrier unit. The melt extruder is configured to melt a plastic raw material into a plastic melt and to deliver the same. The nozzle head includes a sprue channel that has an inlet connected to the melt extruder for entry of the melt plastic into the sprue channel, and an outlet disposed distally from the inlet to deliver the plastic melt from the sprue channel. The carrier unit includes a slide table controllable to move relative to the nozzle head. The slide table is configure to carry the plastic melt outputted from the nozzle head.
    Type: Application
    Filed: April 26, 2019
    Publication date: October 29, 2020
    Inventors: Chung-Ching HUANG, Te-Wen LEE, Jen-Long WU, Wen-Hao KANG, Ying-Cheng WENG
  • PROJECTION APPARATUS AND HEAT DISSIPATION CONTROL METHOD THEREOF
    Publication number: 20200341358
    Abstract: A projection apparatus and a heat dissipation control method thereof are provided. The projection apparatus includes a light valve module, a light source, a brightness sensor, a cooling element, a first temperature sensor, a second temperature sensor and a controller. The controller determines a specified temperature of the cooling element according to the brightness of an illumination beam provided by the light source, and calculates a dew point temperature according to the ambient temperature. The controller adjusts the operating power of the cooling element according to the dew point temperature, the specified temperature and the cold end temperature of the cold end surface of the cooling element. The operating power of the cooling element is flexibly adjusted based on the brightness provided by the light source to avoid a dew formation phenomenon on the cooling element and the light valve module.
    Type: Application
    Filed: April 23, 2020
    Publication date: October 29, 2020
    Applicant: Coretronic Corporation
    Inventors: Kai-Lun Hou, Wen-Hao Chu, Te-Tang Chen
  • Method of designing semiconductor device and system for implementing the method
    Patent number: 10817643
    Abstract: A method including selecting a plurality of layout patterns, wherein each of the layout patterns comprises a corresponding via pillar structure that satisfies an electromigration (EM) rule, wherein each of the via pillar structures comprises metal layers and at least one via coupled to the metal layers. The method further includes selecting a layout pattern from the plurality of layout patterns having a smallest physical size. The method further includes performing a placement and routing process by using the selected layout pattern.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: October 27, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shao-Huan Wang, Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Chen Chen, Hung-Chih Ou
  • FAN NOISE-LOWERING STRUCTURE
    Publication number: 20200332810
    Abstract: A fan noise-lowering structure includes a fan frame main body and a connecting pipe. The fan frame main body has a bottom section and a peripheral wall section; the peripheral wall section is externally located around and forwardly extended normal to the bottom section and internally defines an air-stream passage. Further, the peripheral wall section is formed with a first pipe and a second pipe, which are communicable with the air-stream passage defined in the peripheral wall section. The connecting pipe has two ends respectively connected to the first pipe and the second pipe. With the connecting pipe, air at an air outlet of the air-stream passage having higher pressure is guided to generate swirls, which moves toward an air inlet of the air-stream passage to thereby effectively lower the noise produced by the fan in operating.
    Type: Application
    Filed: July 3, 2020
    Publication date: October 22, 2020
    Inventor: Wen-Hao Liu
  • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20200335614
    Abstract: A semiconductor device includes a substrate, a channel layer, an insulating layer, source/drain contacts, a gate dielectric layer, and a gate electrode. The channel layer over the substrate and includes two dimensional (2D) material. The insulating layer is on the channel layer. The source/drain contacts are over the channel layer. The gate dielectric layer is over the insulating layer and the channel layer. The gate electrode is over the gate dielectric layer and between the source/drain contacts.
    Type: Application
    Filed: April 19, 2019
    Publication date: October 22, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tse-An CHEN, Lain-Jong LI, Wen-Hao CHANG, Chien-Chih TSENG
  • Apparatus and a method of forming a particle shield
    Patent number: 10788764
    Abstract: An apparatus for generating a laminar flow includes an injection nozzle and a suction nozzle. The injection nozzle and the suction nozzle are operable to form the laminar flow for blocking particles from contacting a proximate surface of an object. The injection nozzle includes a main outlet to blow out the laminar flow. The injection nozzle is configured to generate a Coanda flow along an external surface of the injection nozzle. The suction nozzle is configured to provide a gas pressure gradient for the laminar flow.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: September 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Hao Cheng, Chue San Yoo, Ching-Yueh Chen