Abstract: A semiconductor device manufacturing method including: simultaneously forming a plurality of conductive bumps respectively on a plurality of formation sites by adjusting a forming factor in accordance with an environmental density associated with each formation site; wherein the plurality of conductive bumps including an inter-bump height uniformity smaller than a value, and the environmental density is determined by a number of neighboring formation sites around each formation site in a predetermined range.

Abstract: An integrated circuit design method includes receiving an integrated circuit design, and determining a floor plan for the integrated circuit design. The floor plan includes an arrangement of a plurality of functional cells and a plurality of tap cells. Potential latchup locations in the floor plan are determined, and the arrangement of at least one of the functional cells or the tap cells is modified based on the determined potential latchup locations.

Abstract: A heat dissipation system with air sensation function includes a chassis, multiple fans, multiple air sensation units and an external control device connected to the fans. The chassis has an installation face for installing the fans thereon. The air sensation units are respectively disposed on the fans for detecting the air state of the corresponding fans to generate an air sensation signal. The external control device serves to receive the air sensation signal transmitted from the air sensation units and compare the data contained in the air sensation signal with preset data so as to control/adjust the rotational speed of the corresponding fans. Accordingly, a uniform airflow flows out of the fans to effectively lower the noise.

Abstract: A display panel includes a driver, X data lines, Y scan lines, and X*Y pixels. The driver is configured to receive display data with X*Y resolution. The X data lines are electrically connected to the driver and configured to receive a plurality of pixel voltages. The X*Y pixels are electrically connected to the data lines and the scan lines. When each gray level of a first color display data set is identical and lower than a first threshold value, the pixel voltages of the plurality of first color subpixels are not identical.

Abstract: Optical proximity correction (OPC) based computational lithography techniques are disclosed herein for enhancing lithography printability. An exemplary mask optimization method includes receiving an integrated circuit (IC) design layout having an IC pattern; generating target points for a contour corresponding with the IC pattern based on a target placement model, wherein the target placement model is selected based on a classification of the IC pattern; and performing an OPC on the IC pattern using the target points, thereby generating a modified IC design layout. The method can further include fabricating a mask based on the modified IC design layout. The OPC can select an OPC model based on the classification of the IC pattern. The OPC model can weight the target placement model.

Abstract: A method of forming an integrated device includes: pre-storing a plurality of via pillars in a storage tool; arranging a first via pillar selected from the plurality of via pillars to electrically connect to a circuit cell in a first circuit; analyzing an electromigration information of the first circuit to determine if the first via pillar induces EM phenomenon; arranging a second via pillar selected from the plurality of via pillars to replace the first via pillar of the circuit cell to generate a second circuit when the first via pillar induces EM phenomenon; and generating the integrated device according to the second circuit.

Abstract: A method of making an integrated circuit including identifying a first wire at a first location in an array of wires next to an empty location in the layout, adjusting a width of the first wire at the first location, and calculating a performance of the widened wire with regard to a first parameter. The method also includes comparing the calculated performance of the widened wire to a performance threshold of the first parameter, adjusting the degree of width adjustment of the widened wire according to a comparison result, and comparing the calculated performance of the width-adjusted wire to the performance threshold of the first parameter.

Abstract: A multi-time programming non-volatile memory includes a select transistor, a floating gate transistor, a switch transistor, a capacitor and an erase gate element. The select transistor is connected with a select line and a source line. The floating gate transistor includes a floating gate. The floating gate transistor is connected with the select transistor. The switch transistor is connected with a word line, the floating gate transistor and a bit line. A first terminal of the capacitor is connected with the floating gate. A second terminal of the capacitor is connected with a control line. The erase gate element includes the floating gate, a gate oxide layer and a p-type region. The erase gate element is connected with an erase line. The floating gate of the erase gate element at least includes an n-type floating gate part.

Abstract: A method of decomposing a layout for multiple-patterning lithography includes receiving an input that represents a layout of a semiconductor device. The layout includes a plurality of conductive lines of a cell. A first set of conductive lines are overlaid by a second set of conductive lines. The method further includes partitioning the second set of conductive lines into groups. A first group has a different number of conductive lines from the second set than a second group. The method further includes assigning conductive lines from the first set overlaid by conductive lines of the first group to a first photomask and assigning conductive lines from the first set overlaid by conductive lines of the second group to second and third photomasks.

Abstract: A light detecting element for detecting rotations of a wheel is provided. The light detecting element includes a circuit board and an optical transceiver component. The circuit board has a first conductive layer and a first insulation layer. The first conductive layer has a first heat dissipation region, and the first insulation layer covers the first conductive layer and exposes the first heat dissipation region. The optical transceiver component is disposed on the first heat dissipation region and electrically connected to the circuit board. The optical transceiver component includes a light emitter and a light receiver, the light emitter is adapted to emit a light signal to the wheel, and the light receiver is adapted to receive the light signal reflected from the wheel. The invention further provides a projection apparatus having the light detecting element.

Abstract: A method includes patterning a layer over a substrate with a first metal pattern; using a cut mask in a first position relative to the substrate to perform a first cut patterning for removing material from a first region within the first pattern; and using the same cut mask to perform a second cut patterning while in a second position relative to the same layer over the substrate, for removing material from a second region in a second metal pattern of the same layer over the substrate.

Abstract: The present disclosure relates to an integrated circuit having a via rail that prevents reliability concerns such as electro-migration. In some embodiments, the integrated circuit has a first plurality of conductive contacts arranged over a semiconductor substrate. A first metal interconnect wire is arranged over the first plurality of conductive contacts, and a second metal interconnect wire is arranged over the first metal interconnect wire. A via rail is arranged over the first metal interconnect wire and electrically couples the first metal interconnect wire and the second metal interconnect wire. The via rail has a length that continuously extends over two or more of the plurality of conductive contacts. The length of via rail provides for an increased cross-sectional area both between the first metal interconnect wire and the second metal interconnect wire and along a length of the via rail, thereby mitigating electro-migration within the integrated circuit.

Abstract: A data fusion based safety surveillances system has a first through Nth virtual monitoring systems and a data fusion and decision device. The data fusion and decision device defines an ith detection model of the ith virtual monitoring system, and estimates an ith detection loss probability of the ith virtual monitoring system according to detection loss sample numbers of batches of ith monitored data of the ith virtual monitoring system under conditions corresponding to the locations, batches of context data and existence of intruder, the ith detection model, the batches of ith monitored data corresponding to locations of the ith virtual monitoring system and the batches of context data. The data fusion and decision device determines a fusion parameter set according to the first through Nth detection loss probabilities, and performs data fusion on a first through Nth detection results to generate a decision result.

Abstract: Systems, methods, media, and other such embodiments are described for routing track assignment in a circuit design. One embodiment involves accessing routing data for a circuit design, and a first wire of a plurality of wires in the routing data. A second wire is identified that is related to the first wire as a parent wire along a shared routing direction. A misalignment value is calculated for the first wire and the second wire, and a new routing placement is selected for the first wire based at least in part on the misalignment value. In some embodiments, all wires in various routings of a circuit design are checked for possible misalignment in order to improve slew performance via reduction of unnecessary vias.

Abstract: The present disclosure describes a method for detecting unacceptable connection patterns. The method includes, using a processor to perform at least one of: performing an automated place-and-route (APR) process on a circuit layout that includes a first standard cell without a marker layer to generate a circuit graphic database system (GDS) file from the circuit layout, generating a standard-cell GDS file that includes a second standard cell with at least one marker layer applied to the second standard cell, and merging the circuit GDS file with the standard-cell GDS file to generate a merged GDS file that includes the first standard cell with at least one marker layer based on the second standard cell. The method further includes determining whether a connection pattern of the first standard cell in the merged GDS file is an unacceptable connection pattern.

Abstract: A method includes receiving a request to output audio at a speaker of an electronic device, determining whether the speaker of the electronic device is facing substantially towards or away from a support surface, identifying, based on whether the speaker of the electronic device is facing substantially towards or away from the support surface, an equalization setting, and providing, for output at the speaker of the electronic device, an audio signal with the equalization setting.

Abstract: A fan noise-lowering structure includes a fan frame main body and a connection section. The fan frame main body has a bottom side and a frame peripheral wall. The frame peripheral wall is perpendicularly annularly disposed on the outer rim of the bottom side. The inner rim of the frame peripheral wall defines an airflow passage. Two ends of the airflow passage respectively have an inlet and an outlet. The connection section is disposed in the frame peripheral wall. Two ends of the connection section are connected with the frame peripheral wall. The two ends of the middle passage are an inlet end and an outlet end in communication with the airflow passage. The connection section serves to guide the high-pressure air of the outlet to jet toward the inlet so as to achieve multiple noise-lowering effects.

Abstract: A planting structure includes a trough and a plurality of lateral covers. The trough has a hollow space and a planting space, and a canal is formed inside of the trough; the lateral covers cover a lateral side of the trough and seals off the planting space. Accordingly, the planting structure can directly perform cycled transmissions of moisture or a gas via the canal, so as to control growth conditions such as temperature and humidity in the planting space and recycle nutrient solutions and excessive moisture, thereby benefitting crops or growth of the crops and achieving environmental protection and energy saving. In comparison to the conventional indoor organic cultivation, which is necessary to control the temperature and the humidity of the whole indoor space, the present invention only needs to control the pipelines with respect to the root portions of plants, and thus is easier to control and more energy-saving.

Abstract: An integrated circuit (IC) manufacturing method includes receiving an IC design layout having IC regions separate from each other. Each of the IC regions includes an initial IC pattern that is substantially identical among the IC regions. The method further includes identifying a group of IC regions from the IC regions. All IC regions in the group have a substantially same location effect, which is introduced by global locations of the IC regions on the IC design layout. The method further includes performing a correction process to a first IC region in the group, modifying the initial IC pattern in the first IC region into a first corrected IC pattern. The correction process includes using a computer program to correct location effect. The method further includes replacing the initial IC pattern in a second IC region in the group with the first corrected IC pattern.

Abstract: A light source module includes a light source having an optical axis, a fan for providing a cooling airflow and a deflector disposed between the light source and the fan and directing a flowing direction of the cooling airflow. The deflector includes a first air duct connected between a first side of the light source and an air outlet of the fan, a second air duct connected between a second side of the light source and the air outlet of the fan, and a first airflow control assembly controlling the first air duct in a communicating state or a non-communicating state and having a first control shaft and a first airflow passing portion rotating about the first control shaft. The first control shaft is inclined to the optical axis so that a first angle is formed therebetween. The first angle is between 0 and 90 degrees.