Abstract: Provided is a coil carrier board, including a base coil layer, a conductive layer stacked on and bonded to the base coil layer, at least one build-up coil layer stacked on and bonded to the conductive layer, and an opening connecting the base coil layer, the conductive layer and the build-up coil layer. The coil carrier board has thick copper, fine line spacing and appropriate rigidity by means of the build-up circuit process and the structural design of the insulating layer of a photosensitive dielectric material bonded with a thermosetting dielectric material. Accordingly, the high current-carrying efficiency of the coil carrier board is enhanced, and the overall structure of the coil carrier board has better flatness, rigidity and high interlayer alignment accuracy, thereby facilitating miniaturization and automated assembly production.

Abstract: Semiconductor packages with embedded wiring on re-distributed bumps are described. In an illustrative, non-limiting embodiment, a semiconductor package may include an integrated circuit (IC) having a plurality of pads and a re-distribution layer (RDL) coupled to the IC without any substrate or lead frame therebetween, where the RDL comprises a plurality of terminals, and where one or more of the plurality of pads are wire bonded to a corresponding one or more of the plurality of terminals.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a first non-conductive layer over a top side a semiconductor die and patterning the first non-conductive layer to form an opening exposing a top surface of a bond of the semiconductor die. A metal trace of a redistribution layer is formed over a portion of the first non-conductive layer and exposed top surface of the bond pad. A surrounding bump metallization (SBM) structure is formed on a portion of the metal trace. The SBM structure includes a plurality of vertical metal wall segments surrounding a central opening.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; removing the sacrificial layer to form a recess; forming a barrier layer and a free layer in the recess; forming a top electrode layer on the free layer; and patterning the top electrode layer and the free layer to form a second MTJ.

Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a magnetic tunnel junction (MTJ) region and an edge region, forming an first inter-metal dielectric (IMD) layer on the substrate, and then forming a first MTJ and a second MTJ on the first IMD layer, in which the first MTJ is disposed on the MTJ region while the second MTJ is disposed on the edge region. Next, a second IMD layer is formed on the first MTJ and the second MTJ.

Abstract: A semiconductor device includes a first transistor located in a first region of a substrate and a second transistor located in a second region of the substrate. The first transistor includes first channel members vertically stacked above the substrate and a first gate structure wrapping around each of the first channel members. The first gate structure includes a first interfacial layer. The second transistor includes second channel members vertically stacked above the substrate and a second gate structure wrapping around each of the second channel members. The second gate structure includes a second interfacial layer. The second interfacial layer has a first sub-layer and a second sub-layer over the first sub-layer. The first and second sub-layers include different material compositions. A total thickness of the first and second sub-layers is larger than a thickness of the first interfacial layer.

Abstract: A lens driving apparatus includes a holder, a cover, a carrier, a first magnet, a coil, a spring, two second magnets and a hall sensor. The holder includes an opening hole. The cover is made of metal material and coupled to the holder. The carrier is movably disposed in the cover, and for coupling to a lens. The first magnet is connected to an inner side of the cover. The coil is wound around an outer side of the carrier, and adjacent to the first magnet. The spring is coupled to the carrier. The second magnets are disposed on one end of the carrier which is toward the holder. The hall sensor is for detecting a magnetic field of any one of the second magnets, wherein the magnetic field is varied according to a relative displacement between the hall sensor and the second magnet which is detected.

Abstract: An imaging lens module includes an imaging lens unit, an optical folding component and a sensing magnet group. The imaging lens unit has an optical axis. The optical folding component is configured to fold an incident optical path into the imaging lens unit to coincide with the optical axis. The sensing magnet group includes two sensing magnets that are sequentially disposed on the imaging lens unit along a direction in parallel with the optical axis. The sensing magnets are located at the same side with respect to a reference plane that passes through the optical axis and has a normal direction perpendicular to the optical axis. When the sensing magnets are observed from the direction in parallel with the optical axis, images of the sensing magnets are at least partially overlapped. Two adjacent magnetic poles of the sensing magnets are like poles between which there is a repulsive force.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.

Abstract: A method of forming a semiconductor device is provided. The method includes forming a redistribution layer (RDL) substrate over an active side of a semiconductor die. The RDL substrate includes a plurality of under-bump metallization (UBM) structures. A die pad of a leadframe is affixed on a backside of the semiconductor die. The leadframe includes a plurality of leads having a first portion of each lead connected to the die pad and a second portion of each lead extending vertically along sidewalls of the semiconductor die toward a plane of the RDL substrate. An encapsulant encapsulates the semiconductor die and the leadframe, a lead tip portion of each lead is exposed through the encapsulant.

Abstract: A camera module includes a plastic carrier, an imaging lens assembly, a reflective element and a plurality of auto-focusing elements. The plastic carrier includes an inner portion and an outer portion, wherein an inner space is defined by the inner portion, and the outer portion includes at least one mounting structure. The imaging lens assembly is disposed in the inner space of the plastic carrier. The reflective element is for folding an image light by a reflective surface of the reflective element into the imaging lens assembly. The auto-focusing elements include at least two magnets and at least one wiring element, wherein the auto-focusing elements are for moving the plastic carrier along a second optical axis of the imaging lens assembly, and the magnets or the wiring element can be disposed on the mounting structure of the outer portion.

Abstract: A teleconferencing system includes a system housing, a speaker enclosure configured within the system housing, a speaker mounted to the speaker enclosure, and one or more damping elements coupling the speaker enclosure to the system housing. The one or more damping elements suspend the speaker enclosure within the system housing such that the speaker enclosure is isolated and separated from the system. In some cases, the one or more damping elements provide the only structural coupling between the speaker enclosure and the system housing. The damping elements are laterally attached directly to the speaker housing with a resilient element.

Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a magnetic tunnel junction (MTJ) region and an edge region, forming an first inter-metal dielectric (IMD) layer on the substrate, and then forming a first MTJ and a second MTJ on the first IMD layer, in which the first MTJ is disposed on the MTJ region while the second MTJ is disposed on the edge region. Next, a second IMD layer is formed on the first MTJ and the second MTJ.

Abstract: The electronic device monitoring method, provided by the present invention, comprises the following steps: obtaining a coordinate information and an additional information of each electronic device by the master electronic device; generating a display position table by the master electronic device according to the coordinate information and the additional information of each electronic device; generating a barcode pattern, indicating a monitoring website and a plurality of display parameters, by the master electronic device according to the display position table in real time; reading the barcode pattern by a mobile device to connect to a browsing interface related to the monitoring website associated with a monitoring website address; displaying a device pattern corresponding to each electronic device by the browsing interface according to a plurality of display parameters; wherein the barcode pattern indicates the monitoring website address and the plurality of display parameters.

Abstract: An imaging lens module includes an imaging lens unit, an optical folding component and a sensing magnet group. The imaging lens unit has an optical axis. The optical folding component is configured to fold an incident optical path into the imaging lens unit to coincide with the optical axis. The sensing magnet group includes two sensing magnets that are sequentially disposed on the imaging lens unit along a direction in parallel with the optical axis. The sensing magnets are located at the same side with respect to a reference plane that passes through the optical axis and has a normal direction perpendicular to the optical axis. When the sensing magnets are observed from the direction in parallel with the optical axis, images of the sensing magnets are at least partially overlapped. Two adjacent magnetic poles of the sensing magnets are like poles between which there is a repulsive force.

Abstract: A method for manufacturing a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices. Each integrated circuit device extends into the semiconductor wafer to a first depth. Prior to singulation of the integrated circuit devices on the semiconductor wafer, the method further includes forming a cut between the integrated circuit devices. The cut extends to at least the first depth, but does not extend completely through the semiconductor wafer. The cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on each integrated circuit device, a passivation layer on a top surface and on the edges.

Abstract: A heat-dissipating element having a casing having a closed fluid space. At least a part of the fluid space is filled with a coolant fluid, and the coolant fluid is transformed between a liquid phase and a gas phase by an environment temperature transferred by the casing.

Abstract: One or more systems, devices, methods of use and/or methods of fabrication provided herein relate to a superconducting device that can be operated with minimal electric field energy coupling at surface layers of the superconducting device and/or that can have a small footprint. According to one embodiment, a device can comprise a Josephson junction located between a first capacitor portion and a second capacitor portion of a capacitor, wherein at least a trenched section of the first capacitor portion is located beneath a surface of a substrate, and wherein at least a trenched section of the second capacitor portion is located beneath the surface of the substrate. According to another embodiment, a device can comprise a capacitor disposed within a substrate layer and the capacitor comprising a pair of material-filled trenches in the substrate layer, and a Josephson junction coupled to the capacitor.

Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.

Abstract: A semiconductor device and a method for operating the semiconductor device are provided. The semiconductor device includes a calibration device, an adjustment device and a driver. The calibration device is configured to continuously generate a first signal including a first number of bits. The adjustment device is configured to continuously receive the first signal and generate a second signal according to the last two bits of the first signal The second signal includes a second number of bits, and the second number is different from the first number. The driver is electrically coupled to the adjustment device, wherein an output resistance of the driver is controllable in response to the second signal.