Patents by Inventor Wen Hung (Steven) Lu

Wen Hung (Steven) Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106086
    Abstract: An electrically conductive structure of lithium battery mainly comprises a housing, a lithium-battery-core, a cover plate, a first-metal-plate and a second-metal-plate.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventor: Wen-Hung HUANG
  • Patent number: 11935753
    Abstract: A method for forming a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices, each integrated circuit device extending into the semiconductor wafer to a first depth, and grinding a backside of the silicon wafer to no more than the first depth. The method further includes forming a backside cut between the integrated circuit devices. The backside cut extends to within the first depth, but the backside cut does not extend completely through the semiconductor wafer. The backside cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on the backside of the wafer, a metallization layer on a bottom surface of the integrated circuit devices and on the edges.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: March 19, 2024
    Assignee: NXP B.V
    Inventors: Kuan-Hsiang Mao, Wen Hung Huang, Che Ming Fang, Yufu Liu
  • Publication number: 20240088068
    Abstract: A method of forming a semiconductor device is provided. The method includes encapsulating with an encapsulant at least a portion of a semiconductor die and a package substrate, the encapsulant including an additive selectively activated by way of a laser. A first opening is formed in the encapsulant, the first opening exposing a predetermined first portion of the package substrate. The additive is activated at the sidewalls of the first opening. A second opening is formed in the encapsulant, the second opening encircling the first opening and exposing a predetermined second portion of the package substrate. The additive is activated at the sidewalls the second opening. A conductive material is plated on the additive activated portions of the encapsulant.
    Type: Application
    Filed: September 8, 2022
    Publication date: March 14, 2024
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Leo van Gemert, Antonius Hendrikus Jozef Kamphuis, Wen Hung Huang
  • Publication number: 20240090342
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; removing the sacrificial layer to form a recess; forming a barrier layer and a free layer in the recess; forming a top electrode layer on the free layer; and patterning the top electrode layer and the free layer to form a second MTJ.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Ya-Sheng Feng
  • Publication number: 20240090341
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; removing the sacrificial layer to form a recess; forming a barrier layer and a free layer in the recess; forming a top electrode layer on the free layer; and patterning the top electrode layer and the free layer to form a second MTJ.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Ya-Sheng Feng
  • Publication number: 20240087878
    Abstract: A semiconductor wafer cleaning apparatus is provided. The semiconductor wafer cleaning apparatus includes a spin base, a spindle extending through the spin base, and a clamping member covering the spin base. The spindle includes a mounting part and a supporting part disposed on the mounting part. The mounting part includes an inner projection, the supporting part includes a conical projection, and the conical projection is surrounded by the inner projection. The semiconductor wafer cleaning apparatus further includes a first sealing ring disposed between the spin base and the mounting part.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Chia-Lun CHEN, Po-Jen SHIH, Ming-Sung HUNG, Wen-Hung HSU
  • Patent number: 11925912
    Abstract: The disclosure features a system that includes a plurality of material tanks, each of which includes at least one material for forming a chemical composition and includes a first recirculation loop; at least one mixing tank in which the materials from the material tanks are mixed to form a chemical composition, the mixing tank including a second recirculation loop; and at least one holding tank configured to continuously receive the chemical composition from the mixing tank, the holding tank including a third recirculation loop. The system may further include a plurality of fluid flow controller units and be configured to form material and chemical composition flows in an in-process steady state.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: March 12, 2024
    Assignee: Fujifilm Electronic Materials U.S.A., Inc.
    Inventors: Shih-Pin Chou, Wen-Hung Chang, Deepak Mahulikar, Tamas Varga, Abhudaya Mishra
  • Publication number: 20240079788
    Abstract: A dual polarization log-periodic antenna apparatus includes a log-periodic antenna and a conical reflector. The conical reflector is arranged below the log-periodic antenna. The log-periodic antenna is configured to transmit a plurality of radio waves. The conical reflector is configured to reflect the radio waves transmitted by the log-periodic antenna.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Kai-Hsiung HSU, Jia-Jiu SONG, Chien-Wen HUNG
  • Patent number: 11923274
    Abstract: The subject application discloses a substrate. The substrate includes a first conductive layer, a first bonding layer, a first dielectric layer, and a conductive via. The first bonding layer is disposed on the first conductive layer. The first dielectric layer is disposed on the first bonding layer. The conductive via penetrates the first dielectric layer and is electrically connected with the first conductive layer.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: March 5, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Publication number: 20240070285
    Abstract: A method of speeding up a secure boot process and an electronic device using the method. The method includes the following. Whether a storage medium stores a pre-stored hash value corresponding to an image file for the secure boot process is determined. A hash value of the image file is calculated to determine whether the hash value matches the pre-stored hash value in response to the storage medium storing the pre-stored hash value. Firmware in the image file is executed to boot up the electronic device in response to the hash value matching the pre-stored hash value.
    Type: Application
    Filed: June 13, 2023
    Publication date: February 29, 2024
    Applicant: Nuvoton Technology Corporation
    Inventor: Wen-Hung Huang
  • Publication number: 20240062380
    Abstract: A screw hole position detecting apparatus is applied to a board body and at least one screw. The board body defines at least one screw hole. The screw hole position detecting apparatus includes a microprocessor, a lamp group and a camera. The lamp group is configured to illuminate the board body. The camera is configured to photograph the board body to obtain an original image and transmit the original image to the microprocessor. The microprocessor is configured to grayscale convert the original image into a grayscale image, and to convert the grayscale image into a binarization image based on a threshold value. Based on the binarization image, whether the at least one screw hole is locked into the at least one screw is determined.
    Type: Application
    Filed: December 30, 2022
    Publication date: February 22, 2024
    Inventors: Chien-Hung PAN, Chun-Chien CHUEH, Chien-Wen HUNG
  • Patent number: 11908745
    Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Hsiang Chan, Wen-Hung Huang, Shan-Mei Liao, Jian-Hao Chen, Kuo-Feng Yu, Kuei-Lun Lin
  • Patent number: 11908815
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: February 20, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Patent number: 11899272
    Abstract: A lens driving apparatus includes a holder, a cover, a carrier, a first magnet, a coil, a spring, two second magnets and a hall sensor. The holder includes an opening hole. The cover is made of metal material and coupled to the holder. The carrier is movably disposed in the cover, and for coupling to a lens. The first magnet is connected to an inner side of the cover. The coil is wound around an outer side of the carrier, and adjacent to the first magnet. The spring is coupled to the carrier. The second magnets are disposed on one end of the carrier which is toward the holder. The hall sensor is for detecting a magnetic field of any one of the second magnets, wherein the magnetic field is varied according to a relative displacement between the hall sensor and the second magnet which is detected.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: February 13, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Chun-Yi Lu, Te-Sheng Tseng, Wen-Hung Hsu
  • Patent number: 11894293
    Abstract: A circuit structure and an electronic structure are provided. The circuit structure includes a low-density conductive structure, a high-density conductive structure and an electrical connection structure. The high-density conductive structure is disposed on the low-density conductive structure. The electrical connection structure extends through the high-density conductive structure and is electrically connected to the low-density conductive structure. The electrical connection structure includes a shoulder portion.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: February 6, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Patent number: 11894276
    Abstract: A method includes providing a structure having a first channel member and a second channel member over a substrate. The first channel member is located in a first region of the structure and the second channel member is located in a second region of the structure. The method also includes forming a first oxide layer over the first channel member and a second oxide layer over the second channel member, forming a first dielectric layer over the first oxide layer and a second dielectric layer over the second oxide layer, and forming a capping layer over the second dielectric layer but not over the first dielectric layer. The method further includes performing an annealing process to increase a thickness of the second oxide layer under the capping layer.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Wei Lee, Wen-Hung Huang, Kuo-Feng Yu, Jian-Hao Chen, Hsueh-Ju Chen, Zoe Chen
  • Patent number: 11894491
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: February 6, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Tsung-Hsun Chiang, Bo-Jiun Hu, Wen-Hung Chuang, Yu-Ling Lin
  • Publication number: 20240035089
    Abstract: The present invention provides a method for assessing the risk of drug hypersensitivity reaction caused by an antiepileptic drug with a sulfonamide derivative in a subject in need of such an assessment, comprising the step of detecting the presence of HLA-B alleles in the sample obtained from the subject, wherein the presence of the allele indicates that the subject has an increased risk of developing drug hypersensitivity reaction caused by the antiepileptic drug with the sulfonamide derivative. The present invention also provides a method for treating or reducing the incidence of such drug hypersensitivity reaction. Also provided are a test kit for assessing the risk of a patient developing drug hypersensitivity reaction caused by an antiepileptic drug with a sulfonamide derivative, comprising a reagent for determining specific HLA alleles, and use of the test kit in assessing the risk of a patient developing drug hypersensitivity reaction caused by an antiepileptic drug with a sulfonamide derivative.
    Type: Application
    Filed: August 16, 2021
    Publication date: February 1, 2024
    Inventors: Wen-Hung CHUNG, Shuen-Iu HUNG, Chuang-Wei WANG
  • Patent number: 11886032
    Abstract: A camera driving module includes: a base including a central opening; a casing disposed on the base and including an opening hole corresponding to the central opening; a lens unit movably disposed on the casing; and a focus driving part. The focus driving part includes a carrier, an AF coil element, at least two permanent magnets and a Hall element. The carrier is disposed on the lens unit and movable in a direction parallel to an optical axis. The AF coil element is fixed to the base and faces toward the carrier. The permanent magnets are fixed on one side of the carrier facing toward the base and disposed opposite to each other about the optical axis. The Hall element faces toward a corresponding surface of one of the permanent magnets. The AF coil element and the corresponding surfaces are arranged in the direction parallel to the optical axis.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: January 30, 2024
    Assignee: LARGAN DIGITAL CO., LTD.
    Inventors: Te-Sheng Tseng, Ming-Ta Chou, Wen-Hung Hsu
  • Patent number: 11887943
    Abstract: A capacitor structure includes a first metal layer, a first metal oxide layer, a second metal oxide layer, a first conductive member, a second conductive member and a metal composite structure. The first metal layer has a first surface and a second surface opposite the first surface. The first metal oxide layer is formed on the first surface of the first metal layer. The second metal oxide layer is formed on the second surface of the first metal layer. The first conductive member penetrates through the capacitor structure and is electrically isolated from the first metal layer. The second conductive member is electrically connected to the first metal layer. The metal composite structure is disposed between the second conductive member and the first metal layer.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: January 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang