Abstract: A light-emitting element includes a semiconductor light-emitting stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween; a first conductive layer disposed on the second semiconductor layer and electrically connecting the second semiconductor layer; a second conductive layer disposed on the second semiconductor layer and electrically connecting the first semiconductor layer; and a cushion part disposed on and directly contacts the first conductive layer, wherein in a top view, the cushion part is surrounded by and electrically isolated from the second conductive layer.

Abstract: A sound source tracking method adapted to an ongoing video conference comprising: obtaining a streaming signal of the video conference from an internet; performing a video conference procedure to obtain an audio signal from the streaming signal and send the audio signal to a speaker; performing an audio tracking procedure to obtain the audio signal outputted from the video conference procedure to the communication device and send the audio signal to a sound source tracking camera; playing the audio signal to generate a far-end sound; recording a field sound comprising at least one of the far-end sound and a local-end sound; and performing a comparing procedure to determine a shooting direction of the sound source tracking camera, wherein the shooting direction is adjusted so as not to shoot the speaker when a similarity of the far-end sound and the audio signal is greater than a threshold.

Abstract: An antenna connecting-switching apparatus includes a housing, a first connection structure, a second connection structure, an elastic body, an elastic piece structure and an electronic switch. The elastic piece structure includes a first elastic piece and a second elastic piece. When an external antenna is connected to the first connection structure, the first connection structure compresses the elastic body pushing the first elastic piece; the first elastic piece contacts the second elastic piece; the electronic switch is switched; a wireless communication circuit is electrically connected to the external antenna. When the external antenna stops connected to the first connection structure, the elastic body rebounds pushing the first connection structure; the first connection structure stops pushing the first elastic piece; the first elastic piece stops contacting the second elastic piece; the electronic switch is switched; the wireless communication circuit is electrically connected to an internal antenna.

Abstract: A semiconductor device includes a first transistor located in a first region of a substrate and a second transistor located in a second region of the substrate. The first transistor includes first channel members vertically stacked above the substrate and a first gate structure wrapping around each of the first channel members. The first gate structure includes a first interfacial layer. The second transistor includes second channel members vertically stacked above the substrate and a second gate structure wrapping around each of the second channel members. The second gate structure includes a second interfacial layer. The second interfacial layer has a first sub-layer and a second sub-layer over the first sub-layer. The first and second sub-layers include different material compositions. A total thickness of the first and second sub-layers is larger than a thickness of the first interfacial layer.

Abstract: A radio-frequency (RF) device includes a main device on a substrate, a first port extending along a first direction adjacent to a first side of the main device, a second port extending along the first direction adjacent to a second side of the main device, a first shield structure adjacent to a third side of the main device, a second shield structure adjacent to a fourth side of the main device, a first connecting structure extending along a second direction to connect the first port and the main device, and a second connecting structure extending along the second direction to connect the second port and the main device.

Abstract: A lens driving apparatus includes a holder, a cover, a carrier, a first magnet, a coil, a spring, two second magnets and a hall sensor. The holder includes an opening hole. The cover is made of metal material and coupled to the holder. The carrier is movably disposed in the cover, and for coupling to a lens. The first magnet is connected to an inner side of the cover. The coil is wound around an outer side of the carrier, and adjacent to the first magnet. The spring is coupled to the carrier. The second magnets are disposed on one end of the carrier which is toward the holder. The hall sensor is for detecting a magnetic field of any one of the second magnets, wherein the magnetic field is varied according to a relative displacement between the hall sensor and the second magnet which is detected.

Abstract: A camera module includes a casing, a base, an imaging lens module, a driving module, an image stabilization module and an image sensor. The base is coupled to the casing, forming an accommodation space. The imaging lens module is disposed in the accommodation space and includes an imaging lens and a plastic light-folding element. The driving module includes a first holder, a fixed frame, a first rollable support and a first driving mechanism. The first holder holds the plastic light-folding element. The fixed frame is disposed corresponding to the first holder. The first rollable support is disposed between the first holder and the fixed frame. The first driving mechanism is configured to drive the first holder to move relative to the fixed frame. The image stabilization module is configured to drive the imaging lens or the image sensor to move in a direction perpendicular to the optical axis.

Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: A multi-rank circuit system includes multiple transmitters each switchably coupled to a first end of a shared input/output (IO) channel and a unified receiver coupled to a second end of the shared IO channel. The unified receiver is coupled to apply an analog reference voltage to set a differential output of the unified receiver, and further configured to apply a variable digital code to adjust the differential output according to a particular one of the transmitters that is switched to the shared IO channel.

Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.

Abstract: An apparatus and method for providing a decision feedback equalizer are disclosed herein. In some embodiments, a method and apparatus for reduction of inter-symbol interference (ISI) caused by communication channel impairments is disclosed. In some embodiments, a decision feedback equalizer includes a plurality of delay latches connected in series, a slicer circuit configured to receive an input signal from a communication channel and delayed feedback signals from the plurality of delay latches and determine a logical state of the received input signal, wherein the slicer circuit further comprises a dynamic threshold voltage calibration circuit configured to regulate a current flow between output nodes of the slicer circuit and ground based on the received delayed feedback signal and impulse response coefficients of the communication channel.

Abstract: The invention provides a layout pattern of a semiconductor varactor, which comprises a plurality of varactor units arranged on a substrate, wherein each varactor unit comprises a plurality of fin structures arranged in parallel with each other, a plurality of gate structures arranged in parallel with each other, located on the substrate and spanning the fin structures, and a gate metal layer electrically connected with the plurality of gate structures.

Abstract: A foldable electronic device is provided, including a first display, a second display, an input unit, a first hinge, a second hinge, and a flat support unit. The first hinge pivotally connects the first display to the second display. The second hinge pivotally connects the second display to the input unit. The first and second hinges are located on opposite sides of the second display, and the support unit is pivotally connected to the rear side of the second display.

Abstract: The invention provides a layout pattern of a semiconductor cell, which comprises a substrate with a first L-shaped MESA region and a second L-shaped MESA region, wherein the shapes of the first L-shaped MESA region and the second L-shaped MESA region are mutually inverted by 180 degrees, a first high electron mobility transistor (HEMT) and a second high electron mobility transistor are located on the first L-shaped MESA region, and a third high electron mobility transistor and a fourth high electron mobility transistor are located on the second L-shaped MESA region.

Abstract: A facial recognition system and a physiological information generative method are disclosed. The facial recognition system includes a visible light sensor, a thermal imaging sensor, and a processor. The generative method is executed by the processor, using a real-time object detection algorithm. The generative method includes receiving one or more current visible and thermal images, and identifying the nasal area in the current thermal images when a face region in the current visible images is not identifiable by the real-time object detection algorithm in the processor; determining in the processor that respiratory information is abnormal according to the cycles of exhalation and inhalation, as detected through brightness changes in the nostril area; and notifying abnormal respiratory information.

Abstract: A method for fabricating a nanowire transistor includes the steps of first forming a nanowire channel structure on a substrate, in which the nanowire channel structure includes first semiconductor layers and second semiconductor layers alternately disposed over one another. Next, a gate structure is formed on the nanowire channel structure and then a source/drain structure is formed adjacent to the gate structure, in which the source/drain structure is made of graphene.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first conductive component, a second conductive component, a planarization layer and an antenna layer. The second conductive component is disposed adjacent to the first conductive component. The second conductive component and the first conductive component have different thicknesses. The planarization layer is disposed on the first conductive component. The antenna layer is disposed on the first conductive component and the second conductive component.

Abstract: A secure boot device includes a counter, a storage device and a comparator. The counter receives a clock. When the processor performs a verification of a firmware for the first time, the counter counts a first verification time taken by the processor to perform the verification of the firmware for the first time based on the clock to generate a first-time verification count value. When the processor performs the verification of the firmware for the non-first time, the counter counts a second verification time taken by the processor to perform the verification of the firmware at least once for the non-first time based on the clock to generate a count value. The storage device stores the first-time verification count value. The comparator is electrically connected to the counter and the storage device. When the processor performs the verification of the firmware for the non-first time, the comparator compares the count value with the first-time verification count value, and generates a comparison result.

Abstract: A method for forming a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices, each integrated circuit device extending into the semiconductor wafer to a first depth, and grinding a backside of the silicon wafer to no more than the first depth. The method further includes forming a backside cut between the integrated circuit devices. The backside cut extends to within the first depth, but the backside cut does not extend completely through the semiconductor wafer. The backside cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on the backside of the wafer, a metallization layer on a bottom surface of the integrated circuit devices and on the edges.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.