Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: Power supply circuits in which a supplemental current driver is utilized to boost the current provided by a voltage regulator. The supplementing driver detects operating conditions for providing the supplementary current, and may be trained to provide particular amounts of current in response to particular operation conditions of a circuit load.

Abstract: This invention relates to a method and system for detecting ovulation in female's menstrual cycles, which involves collecting menstrual cycle information of a subject to calculate ovulation interval dates. Daily heart rate waveform signals are used to obtain heart rate-related physiological parameters, including the first cumulative power (LF), second cumulative power (HF), standard deviation of interbeat intervals (SDNN), root mean square of successive differences (RMSSD), cumulative power ratio (LF/HF), and heart rate parameter ratio (SDNN/RMSSD). The invention selects the day with the highest cumulative power ratio (LF/HF) and heart rate parameter ratio (SDNN/RMSSD) within the ovulation interval as the day of ovulation.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a redistribution layer (RDL) over an active side of a semiconductor die. A die pad of the semiconductor die is connected to an interconnect segment of the RDL by way of a bond wire. An encapsulating layer is formed over the active side of the semiconductor die such that exposed portions of the die pad and the bond wire are embedded in the encapsulating layer.

Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer includes a first edge; a reflective structure located on the second semiconductor layer and including an outer edge; a first electrode pad located on the reflective structure, wherein the first electrode pad including an outer side wall adjacent to the outer edge, wherein the outer edge extends beyond the outer side wall and does not exceed the first edge in a cross-sectional view of the light-emitting device.

Abstract: Packaged semiconductor devices are disclosed, comprising: a semiconductor die having a top major surface with a plurality of contact pads thereon, and four sides, wherein the sides are stepped such that a lower portion of each side extends laterally beyond a respective upper portion; encapsulating material encapsulating the top major surface and the upper portion of each of the sides wherein the semiconductor die is exposed at the lower portion of each of the sides; a contact-redistribution structure on the encapsulating material over the top major surface of the semiconductor die; a plurality of metallic studs extending through the encapsulating material, and providing electrical contact between the contact pads and the contact-redistribution structure. Corresponding methods are also disclosed.

Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.

Abstract: The present invention pertains to methods of coating antimicrobial peptides on the biomaterial and the biomaterial coated thereby. The coating solution described herein comprises one or more antimicrobial peptides (AMPs) dissolved in a buffer containing an anionic surfactant, wherein the AMPs are amphipathic and cationic.

Abstract: This disclosure relates to a thin pump including a case, a rotor, and a stator. The case has a bottom surface, a lower chamber, an upper chamber, and an accommodation space. The upper chamber is located further away from the bottom surface than the lower chamber. The upper chamber has two opposite ends respectively in fluid communication with the lower chamber and the accommodation space. The rotor includes an impeller and a magnet. The impeller is rotatably disposed in the lower chamber of the case. The magnet is disposed on the impeller. The stator is disposed in the case. The stator corresponds to the magnet of the rotor so as to drive the rotor to rotate with respect to the case.

Abstract: A magnetic driving device is provided, including: a sleeving rod, including a connection hole and a receiving hole in communication with the connection hole which are disposed at one end of the sleeving rod, the connection hole being configured to receive a workpiece, a first groove being disposed on a hole wall of the receiving hole; a movable member, received in the receiving hole, including a magnetic end portion and a second groove; a retainer, sleeved on the movable member, extending radially within the first groove and the second groove, axially movable in the first groove; and an elastic member, received in the receiving hole and located between the sleeving rod and the movable member.

Abstract: The present disclosure provides a neutralizing antibody for flaviviruses, a production method, a method of treating or preventing a flaviviruses infection in a subject, and the use thereof.

Abstract: A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.

Abstract: A leadless semiconductor package includes an integrated circuit (IC) die having one or more contacts at an active surface facing a mounting surface of the leadless semiconductor package. The leadless semiconductor package further includes a plurality of dual-sided stud structures providing electrical connectivity between the IC die and the mounting surface, each dual-sided stud structure having at least one first conductive pillar structure extending from a corresponding contact at the active surface to a redistribution layer and having at least one second conductive pillar structure extending from a redistribution layer to an edge of the mounting surface, each first conductive pillar structure having a first dimension in a direction parallel to the mounting surface that is less than a corresponding second dimension of each second conductive pillar structure. Solder wettable flanks may be formed at the external sidewall edges of the second conductive pillar structures to facilitate soldering or inspection.

Abstract: A semiconductor structure includes a substrate, a first transistor disposed over the substrate and including a first channel, a first interfacial layer over the first channel, a first gate dielectric layer over the first interfacial layer, and a first gate electrode layer over the first gate dielectric layer, and a second transistor disposed over the substrate and including a second channel, a second interfacial layer over the second channel, a second gate dielectric layer over the second interfacial layer, and a second gate electrode layer over the second gate dielectric layer. The first gate dielectric layer includes a first dipole material composition having a first maximum concentration at a half-thickness line of the first gate dielectric layer. The second gate dielectric layer includes a second dipole material composition having a second maximum concentration at a half-thickness line of the second gate dielectric layer and greater than the first maximum concentration.

Abstract: A position-adjustable probing device comprises a stationary probe comprising a first coaxial structure having a first needle core, a first dielectric layer, and a first exterior conductive layer, and a first and a second movable probes. The first movable probe arranged at a first side of the stationary probe comprises a ground needle core, and a first extending structure comprising a first planar structure electrically contacted with the stationary probe through a first movement, a first top surface and a first bottom surface. The second movable probe arranged at a second side of the stationary needle comprises a second coaxial structure comprising a second needle core, a second dielectric layer, and a second exterior conductive layer, and a second extending structure comprising a second planar structure electrically contacted with the stationary probe through a second movement, a second top surface, and a second bottom surface.

Abstract: A nanowire transistor includes a channel structure on a substrate, a gate structure on and around the channel structure, a source/drain structure adjacent to two sides of the gate structure, and a contact plug connected to the source/drain structure. Preferably, the source/drain structure includes graphene and the contact plug further includes a silicide layer on the source/drain structure, a graphene layer on the silicide layer, and a barrier layer on the graphene layer.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer includes a first edge; a reflective structure located on the second semiconductor layer and including an outer edge; a first electrode pad located on the reflective structure, wherein the first electrode pad including an outer side wall adjacent to the outer edge, wherein the outer edge extends beyond the outer side wall and does not exceed the first edge in a cross-sectional view of the light-emitting device.

Abstract: Packaged semiconductor devices are disclosed, comprising: a semiconductor die having a top major surface with a plurality of contact pads thereon, and four sides, wherein the sides are stepped such that a lower portion of each side extends laterally beyond a respective upper portion; encapsulating material encapsulating the top major surface and the upper portion of each of the sides wherein the semiconductor die is exposed at the lower portion of each of the sides; a contact-redistribution structure on the encapsulating material over the top major surface of the semiconductor die; a plurality of metallic studs extending through the encapsulating material, and providing electrical contact between the contact pads and the contact-redistribution structure. Corresponding methods are also disclosed.

Abstract: A ground-signal-ground (GSG) device structure is provided in the present invention, including two signal pads aligned in a first direction and two ground pads respectively at two sides of each signal pad in a second direction, and two transmission lines between the two signal pads and are connected respectively with said two signal pads, and said two transmission lines extend toward each other in the first direction and connect to a device, wherein the two signal pads and the two transmission lines are only in the level of 7th metal layer or above in back-end-of-line (BEOL) metal layers.