Patents by Inventor Wen Hung (Steven) Lu

Wen Hung (Steven) Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12009341
    Abstract: An integrated antenna package structure includes a first redistribution structure, a first chip, a heat dissipation structure, a second chip, and an antenna structure. The first chip is located on a first side of the first redistribution structure, and is electrically connected to the first redistribution structure. The heat dissipation structure is thermally connected to the first chip, and the first chip is located between the heat dissipation structure and the first redistribution structure. The second chip is located on a second side of the first redistribution structure opposite to the first side, and is electrically connected to the first redistribution structure. The antenna structure is electrically connected to the first redistribution structure.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: June 11, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Kai Chiu, Sheng-Tsai Wu, Yu-Min Lin, Wen-Hung Liu, Ang-Ying Lin, Chang-Sheng Chen
  • Patent number: 12009400
    Abstract: A method includes forming a dielectric layer on a semiconductor workpiece, forming a first patterned layer of a first dipole material on the dielectric layer, and performing a first thermal drive-in operation at a first temperature to form a diffusion feature in a first portion of the dielectric layer beneath the first patterned layer. The method also includes forming a second patterned layer of a second dipole material, where a first section of the second patterned layer is on the diffusion feature and a second section of the second patterned layer is offset from the diffusion feature. The method further includes performing a second thermal drive-in operation at a second temperature, where the second temperature is less than the first temperature. The method additionally includes forming a gate electrode layer on the dielectric layer.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Hsiang Chan, Shan-Mei Liao, Wen-Hung Huang, Jian-Hao Chen, Kuo-Feng Yu, Mei-Yun Wang
  • Publication number: 20240186303
    Abstract: A package is formed that encapsulates first and second components having respective first and second thickness differing from each other. Each component has lower surface provided with electrical contact pads and an upper surface opposite the lower surface. A volume of molding material encapsulates the first component. The package includes a set redistribution layers including a set of electrically-conductive interconnects surrounded by electrically-insulating material. The redistribution layers are disposed above the upper surface of the first component. The package includes one or more electrically conductive interconnects that pass through the redistribution layers to the lower surface of the first component; The second component is disposes at a location adjacent to the first component. A first portion of the second component is surrounded by the volume of molding material and a second portion of the second component is surrounded by one or more of the redistribution layers.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Inventors: Zhiwei Gong, Scott M Hayes, Michael B. Vincent, Leo van Gemert, Antonius Hendrikus Jozef Kamphuis, Wen Hung Huang
  • Publication number: 20240186188
    Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.
    Type: Application
    Filed: February 14, 2024
    Publication date: June 6, 2024
    Inventors: Yung-Hsiang CHAN, Wen-Hung HUANG, Shan-Mei LIAO, Jian-Hao CHEN, Kuo-Feng YU, Kuei-Lun LIN
  • Publication number: 20240186301
    Abstract: An electronic device package and method of fabricating such a package includes a first and second components encapsulated in a volume of molding material. A surface of the first component is bonded to a surface of the second component. Upper and lower sets of redistribution lowers that include, respectively, first and second sets of conductive interconnects are formed on opposite sides of the molding material. A through-package interconnect passes through the volume of molding material and has ends that terminate, respectively, within the upper set of redistribution layers and within the lower set of redistribution layers.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Inventors: Scott M. Hayes, Wen Hung Huang, Michael B. Vincent, Antonius Hendrikus Jozef Kamphuis, Zhiwei Gong, Leo van Gemert
  • Patent number: 12002904
    Abstract: A light-emitting element includes a semiconductor light-emitting stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween; a first conductive layer disposed on the second semiconductor layer and electrically connecting the second semiconductor layer; a second conductive layer disposed on the second semiconductor layer and electrically connecting the first semiconductor layer; and a cushion part disposed on and directly contacts the first conductive layer, wherein in a top view, the cushion part is surrounded by and electrically isolated from the second conductive layer.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: June 4, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Tsung-Hsun Chiang, Chien-Chih Liao, Wen-Hung Chuang, Min-Yen Tsai, Bo-Jiun Hu
  • Publication number: 20240170473
    Abstract: A chip package structure including a heat dissipation base, a first redistribution layer, a second redistribution layer, at least one chip, at least one metal stack, a plurality of conductive structures, and an encapsulant is provided. The second redistribution layer is disposed on the heat dissipation base and thermally coupled to the heat dissipation base. The chip, the metal stack, and the conductive structures are disposed between the second redistribution layer and the first redistribution layer. An active surface of the chip is electrically connected to the first redistribution layer and an inactive surface of the chip is thermally coupled to the second redistribution layer via the metal stack. The first redistribution layer is electrically connected to the second redistribution layer via the conductive structures. The encapsulant is filled between the second redistribution layer and the first redistribution layer. A manufacturing method of a chip package structure is also provided.
    Type: Application
    Filed: July 6, 2023
    Publication date: May 23, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hao-Che Kao, Wen-Hung Liu, Yu-Min Lin, Ching-Kuan Lee
  • Publication number: 20240162635
    Abstract: A power transceiver device includes a housing, a circuit module and an electrical connector. The circuit module is located within the housing. The electrical connector includes a terminal base and two conductive terminals. The terminal base is fixed on one side surface of the housing. Each of the conductive terminals includes a sheet, an extending portion and an opening. One end of the sheet extends through a front face of the terminal base, another end thereof is electrically connected to the circuit module. The extending portion extends transversely from the end of the sheet, the opening is firmed on the extending portion, and a virtual axis of the opening passes through the front lateral face of the terminal base. The conductive terminals are switchably electrically connected to each other.
    Type: Application
    Filed: October 3, 2023
    Publication date: May 16, 2024
    Inventors: Wen-Chiu CHEN, Chi-Wen HUNG, Chun-Chen LIN, Li-Shiun TSAI
  • Patent number: 11978496
    Abstract: A method includes generating a differential voltage from a first reference voltage generator; receiving the differential voltage at a second reference voltage generator; dividing the differential voltage at the second reference voltage generator into multiple available reference voltage levels; and selecting one of the available reference voltage levels to apply to a circuit.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: May 7, 2024
    Assignee: NVIDIA CORP.
    Inventors: Jiwang Lee, Jaewon Lee, Po-Chien Chiang, Hsuche Nee, Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir
  • Patent number: 11973501
    Abstract: A multi-rank circuit system includes multiple transmitters each switchably coupled to a first end of a shared input/output (IO) channel and a unified receiver coupled to a second end of the shared IO channel. The unified receiver is coupled to apply a preconfigured analog reference voltage to set a differential output of the unified receiver, and further configured to apply a variable digital code to adjust the differential output according to a particular one of the transmitters that is switched to the shared IO channel.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: April 30, 2024
    Assignee: NVIDIA CORP.
    Inventors: Jiwang Lee, Jaewon Lee, Hsuche Nee, Po-Chien Chiang, Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir
  • Publication number: 20240136472
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20240134150
    Abstract: A lens driving apparatus includes a holder, a cover, a carrier, a first magnet, a coil, a spring, two second magnets and a hall sensor. The holder includes an opening hole. The cover is made of metal material and coupled to the holder. The carrier is movably disposed in the cover, and for coupling to a lens. The first magnet is connected to an inner side of the cover. The coil is wound around an outer side of the carrier, and adjacent to the first magnet. The spring is coupled to the carrier. The second magnets are disposed on one end of the carrier which is toward the holder. The hall sensor is for detecting a magnetic field of any one of the second magnets, wherein the magnetic field is varied according to a relative displacement between the hall sensor and the second magnet which is detected.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Chun-Yi LU, Te-Sheng TSENG, Wen-Hung HSU
  • Patent number: 11967396
    Abstract: A multi-rank system includes multiple circuit ranks communicating over a common data line to multiple data receivers, each corresponding to one or more of the ranks and each having a corresponding reference voltage generator and clock timing adjustment circuit, such that a rank to communicate on the shared data line is switched without reconfiguring outputs of either the reference voltage generators or the clock timing adjustment circuits.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: April 23, 2024
    Assignee: NVIDIA CORP.
    Inventors: Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir, Jaewon Lee
  • Patent number: 11961799
    Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Publication number: 20240118589
    Abstract: A camera module includes a plastic carrier, an imaging lens assembly, a reflective element and a plurality of auto-focusing elements. The plastic carrier includes an inner portion and an outer portion, wherein an inner space is defined by the inner portion, and the outer portion includes at least one mounting structure. The imaging lens assembly is disposed in the inner space of the plastic carrier. The reflective element is for folding an image light by a reflective surface of the reflective element into the imaging lens assembly. The auto-focusing elements include at least two magnets and at least one wiring element, wherein the auto-focusing elements are for moving the plastic carrier along a second optical axis of the imaging lens assembly, and the magnets or the wiring element can be disposed on the mounting structure of the outer portion.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Te-Sheng TSENG, Ming-Ta CHOU, Wen-Hung HSU
  • Publication number: 20240118514
    Abstract: A camera driving module includes: a base including a central opening; a casing disposed on the base and including an opening hole corresponding to the central opening; a lens unit movably disposed on the casing; and a focus driving part. The focus driving part includes a carrier, an AF coil element, at least two permanent magnets and a Hall element. The carrier is disposed on the lens unit and movable in a direction parallel to an optical axis. The AF coil element is fixed to the base and faces toward the carrier. The permanent magnets are fixed on one side of the carrier facing toward the base and disposed opposite to each other about the optical axis. The Hall element faces toward a corresponding surface of one of the permanent magnets. The AF coil element and the corresponding surfaces are arranged in the direction parallel to the optical axis.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: LARGAN DIGITAL CO.,LTD.
    Inventors: Te-Sheng TSENG, Ming-Ta CHOU, Wen-Hung HSU
  • Patent number: 11949157
    Abstract: A dual polarization log-periodic antenna apparatus includes a log-periodic antenna and a conical reflector. The conical reflector is arranged below the log-periodic antenna. The log-periodic antenna is configured to transmit a plurality of radio waves. The conical reflector is configured to reflect the radio waves transmitted by the log-periodic antenna.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: April 2, 2024
    Assignees: GRAND-TEK TECHNOLOGY CO., LTD., RESILIENT TECHNOLOGY CO., LTD.
    Inventors: Kai-Hsiung Hsu, Jia-Jiu Song, Chien-Wen Hung
  • Publication number: 20240105659
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a redistribution layer (RDL) over a semiconductor die. A portion of the RDL contacts a die pad of the semiconductor die. A metal layer is formed on a top surface and sidewalls of the RDL and configured to encase the RDL. A non-conductive layer is formed over the metal layer and underlying RDL. An opening in the non-conductive layer is formed exposing a portion of the metal layer formed on the RDL. An under-bump metallization (UBM) is formed in the opening and conductively connected to the die pad by way of the metal layer and RDL.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: Kuan-Hsiang Mao, Yufu Liu, Wen Hung Huang, Tsung Nan Lo
  • Publication number: 20240103641
    Abstract: In one example, a keyboard housing may include a chassis, a plurality of keys exposed through a top surface of the chassis, and an input device assembly connected to the chassis. The input device assembly may include a flexible touch sensing component to receive a touch input and a support structure. The support structure may include a first portion and a second portion foldable onto the first portion. The first portion and the second portion may support the flexible touch sensing component.
    Type: Application
    Filed: November 6, 2019
    Publication date: March 28, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Cheng-Han Tsai, Midas Wu, Wen-Hung Wang
  • Publication number: 20240106086
    Abstract: An electrically conductive structure of lithium battery mainly comprises a housing, a lithium-battery-core, a cover plate, a first-metal-plate and a second-metal-plate.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventor: Wen-Hung HUANG