Patents by Inventor Wen Liao

Wen Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240395572
    Abstract: A wet etch apparatus includes a wafer chuck, a dispensing nozzle above the wafer chuck, a rail, first and second vehicles, and an electric field generator. The rail extends at least from a first position aligned laterally with the wafer chuck to a second position higher than a top surface of the wafer chuck. The first and second vehicles are movable along the rail. The electric field generator is operative to generate an electric field across the wafer chuck. The electric field generator comprises a first electrode carried by the first vehicle and a second electrode carried by the second vehicle.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hong-Ting LU, Han-Wen LIAO
  • Patent number: 12154474
    Abstract: A brightness compensation device includes a panel, a heat detector, a memory, and a processor. he processor is configured to perform the following steps: at a specific grayscale of the red grayscale data, the green grayscale data, or the blue grayscale data, adjusting a turn-on time data of a luminous signal according to the first temperature data; adjusting the red grayscale data, the green grayscale data, or the blue grayscale data according to a brightness relation or the sheet to obtain a red updating grayscale data, a green updating grayscale data, or a blue updating grayscale data; and when it is determined that the second temperature data is the same as the first temperature data, outputting or storing the red updating grayscale data, the green updating grayscale data, or the blue updating grayscale data.
    Type: Grant
    Filed: October 30, 2023
    Date of Patent: November 26, 2024
    Assignee: AUO CORPORATION
    Inventors: Shu-Wen Liao, Ti-Kuei Yu, Yen-Wen Fang, Ya-Ling Hsu
  • Publication number: 20240389482
    Abstract: A resistive memory cell includes a lower electrode, a resistive transition metal oxide layer, and an upper electrode. The lower electrode includes at least one lower metallic barrier layer, a lower metal layer including a first metal having a melting point higher than 2,000 degrees Celsius, and a transition metal compound layer including an oxide or nitride of a transition metal selected from Ti, Ta, and W. The resistive transition metal oxide layer includes a conductive-filament-forming dielectric oxide of at least one transition metal and located on the transition metal compound layer. The upper electrode includes an upper metal layer including a second metal having a melting point higher than 2,000 degrees Celsius and at least one upper metallic barrier layer.
    Type: Application
    Filed: July 21, 2024
    Publication date: November 21, 2024
    Inventors: Wen-Hao CHENG, Yuan-Huang LEE, Yu-Wen LIAO, Yen-Yu CHEN, Hsuan-Chih CHU
  • Publication number: 20240385066
    Abstract: Described herein are techniques to enable a mobile device to perform multi-source estimation of an altitude for a location. A baseline altitude may be determined at ground level for a location and used to calibrate a barometric pressure sensor on the mobile device. The calibrated barometric pressure sensor can then estimate changes in altitude relative to ground level based on detected pressure differentials, allowing a relative altitude to ground to be determined. Baseline calibration for the barometric sensor calibration can be performed to determine an ambient ground-level barometric pressure.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 21, 2024
    Inventors: Lei Wang, William J. Bencze, Kumar Gaurav Chhokra, Fatemeh Ghafoori, Stephen P. Jackson, Cheng Jia, Yi-Wen Liao, Glenn D. Macgougan, Isaac T. Miller, Alexandru Popovici, Christina Selle, Aditya Narain Srivastava, Richard Warren, Michael P. Dal Santo, Pejman Lotfali Kazemi
  • Patent number: 12142664
    Abstract: A polysilicon layer is formed over a substrate. The polysilicon layer is etched to form a dummy gate electrode having a top portion with a first lateral dimension and a bottom portion with a second lateral dimension. The first lateral dimension is greater than, or equal to, the second lateral dimension. The dummy gate electrode is replaced with a metal gate electrode.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: November 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih Wei Bih, Han-Wen Liao, Xuan-You Yan, Yen-Yu Chen, Chun-Chih Lin
  • Publication number: 20240329277
    Abstract: Embodiments are disclosed for crash detection on one or more mobile devices (e.g., smartwatch and/or smartphone. In some embodiments, a method comprises: detecting a crash event on a crash device; extracting multimodal features from sensor data generated by multiple sensing modalities of the crash device; computing a plurality of crash decisions based on a plurality of machine learning models applied to the multimodal features, wherein at least one multimodal feature is a rotation rate about a mean axis of rotation; and determining that a severe vehicle crash has occurred involving the crash device based on the plurality of crash decisions and a severity model.
    Type: Application
    Filed: June 7, 2024
    Publication date: October 3, 2024
    Inventors: Vinay R. Majjigi, Bharath Narasimha Rao, Sriram Venkateswaran, Aniket Aranake, Tejal Bhamre, Alexandru Popovici, Parisa Dehleh Hossein Zadeh, Yann Jerome Julien Renard, Yi Wen Liao, Stephen P. Jackson, Rebecca L. Clarkson, Henry Choi, Paul D. Bryan, Mrinal Agarwal, Ethan Goolish, Richard G. Liu, Omar Aziz, Alvaro J. Melendez Hasbun, David Ojeda Avellaneda, Sunny Kai Pang Chow, Pedro O. Varangot, Tianye Sun, Karthik Jayaraman Raghuram, Hung A. Pham
  • Publication number: 20240321164
    Abstract: A brightness compensation device includes a panel, a heat detector, a memory, and a processor. he processor is configured to perform the following steps: at a specific grayscale of the red grayscale data, the green grayscale data, or the blue grayscale data, adjusting a turn-on time data of a luminous signal according to the first temperature data; adjusting the red grayscale data, the green grayscale data, or the blue grayscale data according to a brightness relation or the sheet to obtain a red updating grayscale data, a green updating grayscale data, or a blue updating grayscale data; and when it is determined that the second temperature data is the same as the first temperature data, outputting or storing the red updating grayscale data, the green updating grayscale data, or the blue updating grayscale data.
    Type: Application
    Filed: October 30, 2023
    Publication date: September 26, 2024
    Inventors: Shu-Wen LIAO, Ti-Kuei YU, Yen-Wen FANG, Ya-Ling HSU
  • Patent number: 12075634
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first resistive random access memory (RRAM) element and a second RRAM element over a substrate. A conductive element is arranged below the first RRAM element and the second RRAM element. The conductive element electrically couples the first RRAM element to the second RRAM element. An upper insulating layer continuously extends over the first RRAM element and the second RRAM element. An upper inter-level dielectric (ILD) structure laterally surrounds the first RRAM element and the second RRAM element. The upper insulating layer separates the first RRAM element and the second RRAM element from the upper ILD structure.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: August 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Chieh Yang, Chih-Yang Chang, Wen-Ting Chu, Yu-Wen Liao
  • Publication number: 20240276951
    Abstract: A combined brush and comb contains a body, a fixing cushion, multiple bristle sets, and multiple spherical needles. The fixing cushion is disposed on the body and includes multiple receiving notches and multiple through orifices. A respective one receiving notch includes an opening defined on a top thereof, and the respective one receiving notch includes a bottom face formed on a bottom thereof. A diameter of the respective one receiving notch increases from the opening to the bottom face. The multiple bristle sets are fixed in the multiple receiving notches. The multiple spherical needles are mounted in the multiple through orifices. A respective one spherical needle includes an inverted H-shaped base, and the inverted H-shaped base has a first engagement section, a second engagement extension parallel to and spaced from the first engagement extension, and a trench defined between the first engagement extension and the second engagement extension.
    Type: Application
    Filed: February 22, 2023
    Publication date: August 22, 2024
    Inventor: Yu Wen Liao
  • Patent number: 12066344
    Abstract: Described herein are techniques to enable a mobile device to perform multi-source estimation of an altitude for a location. A baseline altitude may be determined at ground level for a location and used to calibrate a barometric pressure sensor on the mobile device. The calibrated barometric pressure sensor can then estimate changes in altitude relative to ground level based on detected pressure differentials, allowing a relative altitude to ground to be determined. Baseline calibration for the barometric sensor calibration can be performed to determine an ambient ground-level barometric pressure.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: August 20, 2024
    Assignee: Apple Inc.
    Inventors: Lei Wang, William J. Bencze, Kumar Gaurav Chhokra, Fatemeh Ghafoori, Stephen P. Jackson, Cheng Jia, Yi-Wen Liao, Glenn D. Macgougan, Isaac T. Miller, Alexandru Popovici, Christina Selle, Aditya Narain Srivastava, Richard Warren, Michael P. Dal Santo, Pejman Lotfali Kazemi
  • Publication number: 20240250092
    Abstract: A micro light-emitting diode display device includes a circuit substrate, a first light-emitting element, a second light-emitting element, a third light-emitting element, and a conductive layer. The first light-emitting element, the second light-emitting element, and the third light-emitting element are disposed on the circuit substrate and have a first electrode and a second electrode, respectively. The first electrode of the first light-emitting element, the first electrode of the second light-emitting element, and the first electrode of the third light-emitting element are electrically connected to the circuit substrate. The second electrode of the first light-emitting element and the second electrode of the second light-emitting element are a continuous semiconductor material layer. The second electrode of the third light-emitting element is separated from the second electrode of the first light-emitting element and the second electrode of the second light-emitting element.
    Type: Application
    Filed: November 28, 2023
    Publication date: July 25, 2024
    Inventors: Chao-Kun HUANG, Kuo-Hsuan Huang, Chieh-Ming Chen, Bo-Ru Jian, Ta-Wen Liao
  • Publication number: 20240242661
    Abstract: A display device includes first and second pixel circuits, first and second gate lines, and first and second transmission lines. The first pixel circuit emits light according to a data signal, and is charged according to a first gate signal. The second pixel circuit emits light according to the data signal, and is charged according to a second gate signal. The first gate line is located between the first second pixel circuits, and provides the first gate signal. The second gate line provides the second gate signal. The first transmission line provides the second gate signal to the second gate line. The second transmission line is located between the first transmission line and the second pixel circuit, crosses over the second gate line, and provides the first gate signal to the first gate line.
    Type: Application
    Filed: July 7, 2023
    Publication date: July 18, 2024
    Inventors: Yueh-Chi WU, Shu-Wen LIAO, Ti-Kuei YU, Ya-Ling HSU, Sheng-Yen CHENG, Yueh-Hung CHUNG
  • Publication number: 20240234652
    Abstract: A micro light-emitting diode display device includes a substrate, a first planarization layer, a first light-emitting element, and a second planarization layer. The first planarization layer is disposed on the substrate and has a first opening. The first opening has a first opening inner wall. The first light-emitting element is disposed on the substrate, in the first opening, and separated from the first opening inner wall. The second planarization layer is disposed on the substrate and between the first planarization layer and the first light-emitting element. The second planarization layer is in contact with the first light-emitting element.
    Type: Application
    Filed: October 19, 2023
    Publication date: July 11, 2024
    Inventors: Bin-Cheng LIN, Chieh-Ming Chen, Bo-Ru Jian, Chi-Sheng Liao, Ta-Wen Liao
  • Patent number: 12027108
    Abstract: A display device includes first and second pixel circuits, first and second gate lines, and first and second transmission lines. The first pixel circuit emits light according to a data signal, and is charged according to a first gate signal. The second pixel circuit emits light according to the data signal, and is charged according to a second gate signal. The first gate line is located between the first second pixel circuits, and provides the first gate signal. The second gate line provides the second gate signal. The first transmission line provides the second gate signal to the second gate line. The second transmission line is located between the first transmission line and the second pixel circuit, crosses over the second gate line, and provides the first gate signal to the first gate line.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: July 2, 2024
    Assignee: AUO CORPORATION
    Inventors: Yueh-Chi Wu, Shu-Wen Liao, Ti-Kuei Yu, Ya-Ling Hsu, Sheng-Yen Cheng, Yueh-Hung Chung
  • Patent number: 12022629
    Abstract: The present invention discloses a smart clothing and its device mount, wherein the device mount includes an upper casing and a lower casing, a circuit board is arranged between the upper casing and the lower casing, and a metal contact of the top surface of the circuit board penetrates through the upper casing to form a plurality of metal contact points, and the cable interface of the bottom surface of the circuit board passes through the lower casing, and the bottom surface of the lower casing is formed with individual cable grooves toward each cable interface for guiding the transmission wire to insert into the cable interface along the cable groove, and the device mount is combined with a soft gasket on the clothing body and is equipped with a waterproof protective layer to avoid damage to the circuit components and transmission wire during cleaning; when the device mount is installed with the electronic device, the motion status can be monitored.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: June 25, 2024
    Assignee: AMPAK TECHNOLOGY INC.
    Inventors: Wen-Sung Fan, Kai-Yuan Cheng, Chih-Wei Tu, Pei-Wen Liao, Ming-Hui Yao, Tzong-Yow Ho
  • Publication number: 20240170829
    Abstract: The present disclosure provides an electronic package. The electronic package includes an antenna structure having a first antenna and a second antenna at least partially covered by the first antenna. The electronic package also includes a directing element covering the antenna structure. The directing element has a first portion configured to direct a first electromagnetic wave having a first frequency to transmit via the first antenna and a second portion configured to direct a second electromagnetic wave having a second frequency different from the first frequency to transmit via the second antenna. A method of manufacturing an electronic package is also provided.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Ya-Wen LIAO
  • Publication number: 20240162406
    Abstract: A display panel including an array substrate, a light-emitting diode chip, a photosensitive material layer and a photosensitive material layer. The array substrate includes a first electrode pad and a second electrode pad adjacent to the first electrode pad. The light-emitting diode chip includes a first electrode and a second electrode at opposite sides of the light-emitting diode chip, and the first electrode is connected with the first electrode pad. The photosensitive material layer is over the array substrate and surrounds the light-emitting diode chip, in which the photosensitive material layer includes an opening exposing the second electrode pad, a sidewall of the opening has a first portion and a second portion, a slope of the first portion is greater than a slope of the second portion. The transparent conductive layer is over the photosensitive material layer and electrically connects the second electrode pad and the second electrode.
    Type: Application
    Filed: October 4, 2023
    Publication date: May 16, 2024
    Inventors: Chieh-Ming CHEN, Chou-Huan Yu, Bo-ru Jian, Ta-Wen Liao
  • Publication number: 20240162088
    Abstract: An integrated circuit device includes an interconnect layer, a memory structure, a third conductive feature, and a fourth conductive feature. The interconnect layer includes a first conductive feature and a second conductive feature. The memory structure is over and in contact with the first conductive feature. The memory structure includes at least a resistance switching element over the first conductive feature. The third conductive feature, including a first conductive line, is over and in contact with the second conductive feature. The fourth conductive feature is over and in contact with the memory structure. The fourth conductive feature includes a second conductive line, a top surface of the first conductive line is substantially level with a top surface of the second conductive line, and a bottom surface of the first conductive line is lower than a bottommost portion of a bottom surface of the second conductive line.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsia-Wei CHEN, Fu-Ting SUNG, Yu-Wen LIAO, Wen-Ting CHU, Fa-Shen JIANG, Tzu-Hsuan YEH
  • Patent number: 11980041
    Abstract: Various embodiments of the present application are directed towards an integrated chip comprising memory cells separated by a void-free dielectric structure. In some embodiments, a pair of memory cell structures is formed on a via dielectric layer, where the memory cell structures are separated by an inter-cell area. An inter-cell filler layer is formed covering the memory cell structures and the via dielectric layer, and further filling the inter-cell area. The inter-cell filler layer is recessed until a top surface of the inter-cell filler layer is below a top surface of the pair of memory cell structures and the inter-cell area is partially cleared. An interconnect dielectric layer is formed covering the memory cell structures and the inter-cell filler layer, and further filling a cleared portion of the inter-cell area.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsia-Wei Chen, Wen-Ting Chu, Yu-Wen Liao
  • Publication number: 20240136481
    Abstract: A micro light-emitting diode display device includes a substrate, a first planarization layer, a first light-emitting element, and a second planarization layer. The first planarization layer is disposed on the substrate and has a first opening. The first opening has a first opening inner wall. The first light-emitting element is disposed on the substrate, in the first opening, and separated from the first opening inner wall. The second planarization layer is disposed on the substrate and between the first planarization layer and the first light-emitting element. The second planarization layer is in contact with the first light-emitting element.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Inventors: Bin-Cheng LIN, Chieh-Ming Chen, Bo-Ru Jian, Chi-Sheng Liao, Ta-Wen Liao