Patents by Inventor Wen Lin

Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220308464
    Abstract: In a method of manufacturing a semiconductor device a semiconductor wafer is retrieved from a load port. The semiconductor wafer is transferred to a treatment device. In the treatment device, the surface of the semiconductor wafer is exposed to a directional stream of plasma wind to clean a particle from the surface of the semiconductor wafer. The stream of plasma wind is generated by an ambient plasma generator and is directed at an oblique angle with respect to a perpendicular plane to the surface of the semiconductor wafer for a predetermined plasma exposure time. After the cleaning, a photo resist layer is disposed on the semiconductor wafer.
    Type: Application
    Filed: July 6, 2021
    Publication date: September 29, 2022
    Inventors: Chung-Hsuan LIU, Chen-Yang LIN, Ku-Hsiang SUNG, Da-Wei YU, Kuan-Wen LIN, Chia-Jen CHEN, Hsin-Chang LEE
  • Publication number: 20220311985
    Abstract: The present invention discloses an image capture device and depth information calculation method thereof. The depth information calculation method includes: acquiring, a stereo camera module, an image information; and determining a re-projection mode according to a usage scenario, and transforming the image information to a depth information corresponding to the re-projection mode according to the re-projection mode. The re-projection mode is planar mode, cylinder mode or spherical mode, and the corresponding coordinate systems are planar coordinate system, cylinder coordinate system and spherical coordinate system respectively.
    Type: Application
    Filed: June 30, 2021
    Publication date: September 29, 2022
    Inventors: Chih-Chien CHENG, Chiao-Wen LU, Ming-Hua LIN
  • Publication number: 20220310819
    Abstract: A semiconductor device includes a channel structure, extending along a first lateral direction, that is disposed over a substrate. The semiconductor device includes a gate structure, extending along a second lateral direction perpendicular to the first lateral direction, that straddles the channel structure. The semiconductor device includes an epitaxial structure, coupled to the channel structure, that is disposed next to the gate structure. The semiconductor device includes a first gate spacer and a second gate spacer each comprising a first portion disposed between the gate structure and the epitaxial structure along the first lateral direction. The semiconductor device includes an air gap interposed between the first portion of the first gate spacer and the first portion of the second gate spacer. The air gap exposes a second portion of the first gate spacer that extends in the first lateral direction.
    Type: Application
    Filed: October 4, 2021
    Publication date: September 29, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Yu-Shan Cheng, Ming-Ching Chang
  • Publication number: 20220310468
    Abstract: A package structure is provided. The package structure includes a redistribution structure, and the redistribution structure has multiple insulating layers and multiple conductive features. The package structure also includes a semiconductor die and a device element over opposite surfaces of the redistribution structure. The package structure further includes a first protective layer at least partially surrounding the semiconductor die. In addition, the package structure includes a second protective layer at least partially surrounding the device element. The second protective layer is thicker than the first protective layer, and the second protective layer and the first protective layer have different coefficients of thermal expansion.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 29, 2022
    Inventors: Meng-Liang LIN, Po-Hao TSAI, Po-Yao CHUANG, Yi-Wen WU, Techi WONG, Shin-Puu JENG
  • Publication number: 20220310464
    Abstract: A semiconductor structure that includes two circuit regions; two inner seal rings, each of the two inner seal rings surrounding one of the two circuit regions; an outer seal ring surrounding the two inner seal rings, wherein each of the inner seal rings and the outer seal ring has a substantially rectangular periphery with four interior corner seal ring structures; four first redundant regions between the two inner seal rings and the outer seal ring, each of the four first redundant regions being a substantially trapezoidal shape; and first dummy patterns substantially uniformly distributed in the four first redundant regions.
    Type: Application
    Filed: June 2, 2021
    Publication date: September 29, 2022
    Inventors: Shan-Yu Huang, Hsiao-Wen Chung, Yi-Lun Chen, Huang-Sheng Lin
  • Publication number: 20220304995
    Abstract: The present disclosure provides an ophthalmic composition comprising 4-(3-amino-1-(isoquinolin-6-ylamino)-1-oxopropan-2-yl)benzyl 2,4-dimethylbenzoate or its pharmaceutically acceptable salts; about 0.01% weight/volume to about 1.0% weight/volume of a buffer; and about 0.01% weight/volume to about 10% weight/volume of a tonicity agent.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 29, 2022
    Inventors: Cheng-Wen Lin, Casey Kopczynski, Mitchell A. deLong, Jill M. Sturdivant, Ramesh Krishnamoorthy
  • Patent number: 11456257
    Abstract: A method includes forming a redistribution structure over a carrier, the redistribution structure having conductive features on a surface of the redistribution structure distal the carrier; forming a conductive pillar over the surface of the redistribution structure; attaching a die to the surface of the redistribution structure adjacent to the conductive pillar, where die connectors of the die are electrically coupled to the conductive features of the redistribution structure; and attaching a pre-made substrate to the conductive pillar through a conductive joint, where the conductive joint is on the conductive pillar and comprises a different material from the conductive pillar, where the conductive joint and the conductive pillar electrically couple the redistribution structure to the pre-made substrate.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: September 27, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shin-Puu Jeng, Shuo-Mao Chen, Hsien-Wen Liu, Po-Yao Chuang, Feng-Cheng Hsu, Po-Yao Lin
  • Patent number: 11456590
    Abstract: A short circuit detection module includes a power unit including a battery for providing a voltage of the battery, a monitoring unit, a switch unit, a heating unit and a control unit. The monitoring unit is connected with the power unit. The switch unit includes a first MOSFET, the monitoring unit is connected with the source electrode of the first MOSFET. The heating unit is connected with the drain electrode of the first MOSFET, the drain electrode of the first MOSFET transmits a heating current to the heating unit. A heating voltage is generated at an output terminal of the short circuit detection module. The control unit is connected with and controls the power unit, the monitoring unit, the switch unit and the heating unit. When the heating voltage is greater than a critical value of the heating voltage, the control unit turns off the first MOSFET.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: September 27, 2022
    Assignee: Cheng Uei Precision Industry Co., Ltd.
    Inventors: Chin Huang Tseng, Wen Bing Hsu, Hui Lin Lai
  • Patent number: 11456256
    Abstract: A semiconductor device includes a semiconductor substrate, a dielectric structure, an electrical insulating and thermal conductive layer and a circuit layer. The electrical insulating and thermal conductive layer is disposed over the semiconductor substrate. The dielectric structure is disposed over the electrical insulating and thermal conductive layer, wherein a thermal conductivity of the electrical insulating and thermal conductive layer is substantially greater than a thermal conductivity of the dielectric structure. The circuit layer is disposed in the dielectric structure.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang, Wen-Lin Shih
  • Publication number: 20220301646
    Abstract: The present disclosure provides semiconductor device and methods of forming the same. A semiconductor device according to the present disclosure includes a gate structure, a source/drain feature adjacent the gate structure, a dielectric layer disclosed over the gate structure and the source/drain feature, a gate contact disposed in the dielectric layer and over the gate structure, and a source/drain contact disposed in the dielectric layer and over the source/drain feature. The dielectric layer is doped with a dopant and the dopant includes germanium or tin.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 22, 2022
    Inventors: Hsin-Wen Su, Shih-Hao Lin, Jui-Lin Chen, Lien-Jung Hung, Ping-Wei Wang
  • Publication number: 20220300039
    Abstract: A metal backplate is composed of two parallel plain parts and a flexible part lying two plain parts, and the flexible part has a first surface and a second surface deployed underneath the first surface. The flexible part is etched or etched partially with a plurality of curved first openings which form a first array in a staggered arrangement in order to weaken the flexible part B with rigidity property to be one with bending-resilience property; at the same time, which form in staggered rows or in alignments on the upside and the reverse side of the first surface in order to decrease the unidirectional stress concentration and the warpage problem of the display panel.
    Type: Application
    Filed: May 4, 2021
    Publication date: September 22, 2022
    Inventors: Ching Wen TAO, Wen Yi LIN
  • Publication number: 20220298604
    Abstract: A titanium alloy product includes a titanium alloy substrate and a plurality of first holes defined in a surface of the titanium alloy substrate. The first holes have an opening on the surface of the titanium alloy substrate and an inner wall connecting with the opening, a diameter of the inner space is greater than a diameter of the opening. The product tensile strength of bonding between the titanium alloy product and a material part filled in the first holes is very high. A housing with the titanium alloy product and a method for manufacturing the titanium alloy product are also disclosed.
    Type: Application
    Filed: March 21, 2022
    Publication date: September 22, 2022
    Inventors: WEN-CHENG ZHU, XIAO-QING FU, JING-PING SANG, LI-MING SHEN, QING LIN
  • Publication number: 20220302276
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.
    Type: Application
    Filed: June 7, 2022
    Publication date: September 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Hsiao Wen Lee
  • Publication number: 20220301922
    Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.
    Type: Application
    Filed: July 9, 2021
    Publication date: September 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Chung HUANG, Chiung-Wen HSU, Mei-Ju KUO, Yu-Ting WENG, Yu-Chi LIN, Ting-Chung WANG, Chao-Cheng CHEN
  • Publication number: 20220302369
    Abstract: A magnetoresistive random access memory (MRAM) structure is provided in the present invention, including multiple MRAM cells, and an atomic layer deposition dielectric layer between and at outer sides of the MRAM cells, wherein the material of top electrode layer is titanium nitride, and the nitrogen percentage is greater than titanium percentage and further greater than oxygen percentage in the titanium nitride, and the nitrogen percentage gradually increases inward from the top surface of top electrode layer to a depth and then start to gradually decrease to a first level and then remains constant, and the titanium percentage gradually decreases inward from the top surface of top electrode layer to the depth and then start to gradually increase to a second level and then remains constant.
    Type: Application
    Filed: April 25, 2021
    Publication date: September 22, 2022
    Inventors: Hui-Lin Wang, Bo-Yun Huang, Wen-Wen Zhang, Kun-Chen Ho
  • Patent number: 11450137
    Abstract: A display device adapted to perform in-screen fingerprint identification is provided. The display device includes a plurality of sub-pixel circuits, a plurality of light sensing circuit stages, and a plurality of sensing drive lines. The light sensing circuit stages correspond to the sub-pixel circuits. The sensing drive lines drive the light sensing circuit stages sequentially. In a first time interval, a first sensing drive line among the sensing drive lines provides a first sensing drive signal to a qth light sensing circuit stage and a latter light sensing circuit stage among the light sensing circuit stages. In the first time interval, the qth light sensing circuit stage performs a light sensing reset operation according to the first sensing drive signal, and the latter light sensing circuit stage performs a light sensing write operation according to the first sensing drive signal.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: September 20, 2022
    Assignee: Au Optronics Corporation
    Inventors: Ming-Yao Chen, Cheng-Hsing Lin, Shu-Wen Tzeng, Hsin-Lin Hu, Jui-Chi Lo
  • Patent number: 11450626
    Abstract: A semiconductor package includes a multilayer substrate, a device die, an insulating encapsulant, and a shielding structure. The multilayer substrate has a first surface and a second surface opposite to the first surface. The multilayer substrate includes through holes, and each of the through holes extends from the first surface to the second surface. The device die is disposed on the first surface of the multilayer substrate. The insulating encapsulant is disposed on the first surface of the multilayered substrate and encapsulating the device die. The shielding structure is disposed over the first surface of the multilayer substrate. The shielding structure includes a cover body and conductive pillars. The cover body covers the device die and the insulating encapsulant. The conductive pillars are connected to the cover body and fitted into the through holes of the multilayer substrate.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yang-Che Chen, Victor Chiang Liang, Chen-Hua Lin, Chwen-Ming Liu, Huang-Wen Tseng
  • Publication number: 20220287605
    Abstract: A blood picker including one or more needles, a storage device, and a fluid transmission control system is provided. The needle is adapted to be inserted into a blood vessel of a human for blood detection. The storage device is in communication with the needle and provided with a drawing tube in communication with an inner space of the storage device. The fluid transmission control system includes a fluid transmission device, a driving controller, and a power supply. The fluid transmission device is in communication with one end of the drawing tube. The power supply provides a power source for the driving controller to enable the fluid transmission device, so that after the fluid transmission device is enabled, the inner space of the storage device is controlled by the fluid transmission device to generate a pressure difference, thereby allowing the blood to be drawn and stored in the storage device.
    Type: Application
    Filed: March 9, 2022
    Publication date: September 15, 2022
    Inventors: Hao-Jan Mou, Ching-Sung Lin, Yung-Lung Han, Chi-Feng Huang, Chin-Wen Hsieh, Tsung-I Lin, Yang Ku
  • Publication number: 20220288841
    Abstract: A production line for producing components to a high standard of cleanliness and sealed and protected in that state includes a loading device, a cleaning device, a detecting device, a pasting device, a heat-sealing device, a packing device, and transfer devices of the production line. The production line automatically processes the components for obtaining components with the high cleanliness. By the processes of protective film pasting, heat-sealing, and packing, the components may be further protected from subsequent pollution. A method for producing components with a high cleanliness applied to the production line is also disclosed.
    Type: Application
    Filed: March 7, 2022
    Publication date: September 15, 2022
    Inventors: JIAN-WEN GAO, TING-TING LI, CHU-HUI WU, AI-JUN TANG, HUI WANG, SHI CHEN, BO YANG, FENG ZHANG, KUN-LIANG LIN, JIAN-GANG ZHANG
  • Publication number: 20220293528
    Abstract: A method of manufacturing an interconnect structure includes forming an opening through a dielectric layer. The opening exposes a top surface of a first conductive feature. The method further includes forming a barrier layer on sidewalls of the opening, passivating the exposed top surface of the first conductive feature with a treatment process, forming a liner layer over the barrier layer, and filling the opening with a conductive material. The liner layer may include ruthenium.
    Type: Application
    Filed: April 28, 2021
    Publication date: September 15, 2022
    Inventors: Shu-Cheng Chin, Ming-Yuan Gao, Chen-Yi Niu, Yen-Chun Lin, Hsin-Ying Peng, Chih-Hsiang Chang, Pei-Hsuan Lee, Chi-Feng Lin, Chih-Chien Chi, Hung-Wen Su