Patents by Inventor Wen Lin

Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367315
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen
  • Patent number: 11502529
    Abstract: A battery charging method is disclosed. The method includes: obtaining historical working durations in which the electronic device was powered by a battery of the electronic device; in response to an electronic device connected to a charging power source, obtaining a remaining battery level and a target capacity of a battery of the electronic device, and accordingly defining a capacity to be charged; obtaining a current system time when the electronic device is connected to the charging power source; obtaining a specific time difference between the current system time and a predicted working duration, wherein the predicted working duration is a specific working duration chosen from the historical working durations subsequent to the current system time; and using the capacity to be charged to correspond to the specific time difference to obtain a predicted charging current value.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: November 15, 2022
    Assignee: PEGATRON CORPORATION
    Inventors: Shih-Feng Tseng, Yi-Hsuan Lee, Wen-Lin Huang
  • Patent number: 11497440
    Abstract: The present invention provides a human-computer interactive rehabilitation system, which can automatically calculate rehabilitation strength suitable for the patient, so that it is not necessary to manually evaluate and adjust the parameter settings in human-computer interactive rehabilitation system when different patients use it. At the same time, the human-machine interactive rehabilitation system and the hospital end can track the rehabilitation status and intervene through the data platform at any time. The platform establishes a cloud community feedback and encouragement mechanism, and immediately transmits the rehabilitation results to the designated barriers of the patients, provides patient encouragement feedback, and strengthens the community interaction and linkage in the medical relationship.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: November 15, 2022
    Assignee: FU JEN CATHOLIC UNIVERSITY
    Inventors: Chien-Wen Lin, Chia-Hsiang Lee, Yu-Jen Chen, Jui-Yun Hung
  • Patent number: 11488909
    Abstract: A package structure includes at least one integrated circuit component, an insulating encapsulation, and a redistribution structure. The at least one integrated circuit component includes a semiconductor substrate, an interconnection structure disposed on the semiconductor substrate, and signal terminals and power terminals located on and electrically connecting to the interconnection structure. The interconnection structure is located between the semiconductor substrate and the signal terminals and between the semiconductor substrate and the power terminals, and where a size of the signal terminals is less than a size of the power terminals. The insulating encapsulation encapsulates the at least one integrated circuit component. The redistribution structure is located on the insulating encapsulation and electrically connected to the at least one integrated circuit component.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: November 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Lin, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Che-Wei Hsu
  • Publication number: 20220342290
    Abstract: A wavelength conversion module includes a driving element, a wavelength conversion wheel, and at least one flow guide. The wavelength conversion wheel includes a rotary disc and at least one wavelength conversion layer. The driving element is connected to the rotary disc to drive the wavelength conversion wheel to rotate along an axis of the driving element as a central axis. The flow guide is disposed beside the wavelength conversion wheel at intervals along the axis, and at least one airflow channel is formed between the flow guide and the wavelength conversion wheel. The flow guide and the driving element are disposed at intervals, and the flow guide does not contact the rotary disc and the driving element. An orthographic projection of the flow guide on the rotary disc overlaps the wavelength conversion layer. When the wavelength conversion wheel rotates, the wavelength conversion wheel and the flow guide move relatively.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 27, 2022
    Applicant: Coretronic Corporation
    Inventors: Ming-Feng Hou, Shi-Wen Lin, Shih-Hang Lin
  • Publication number: 20220331308
    Abstract: The present disclosure provides an ophthalmic composition comprising 4-(3-amino-1-(isoquinolin-6-ylamino)-1-oxopropan-2-yl)benzyl 2,4-dimethylbenzoate or its pharmaceutically acceptable salts; about 0.01% weight/volume to about 1.0% weight/volume of a buffer; and about 0.01% weight/volume to about 10% weight/volume of a tonicity agent.
    Type: Application
    Filed: July 6, 2022
    Publication date: October 20, 2022
    Inventors: Cheng-Wen Lin, Casey Kopczynski, Mitchell A. deLong, Jill M. Sturdivant, Ramesh Krishnamoorthy
  • Publication number: 20220328639
    Abstract: A method for forming a FinFET device structure and method for forming the same is provided. The method includes forming an isolation structure over a substrate and forming a first dielectric layer over the isolation structure. The method includes forming a gate structure in the first dielectric layer and forming a deep trench through the first dielectric layer and the isolation structure. The method also includes forming an S/D trench in the first dielectric layer and filling a metal material in the deep trench and the S/D trench to form a deep contact structure and the S/D contact structure. A bottom surface of the S/D contact structure is higher than a bottom surface of the deep contact structure.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 13, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting FANG, Da-Wen LIN, Fu-Kai YANG, Chen-Ming LEE, Mei-Yun WANG
  • Patent number: 11469073
    Abstract: The disclosure describes various aspects of a cryogenic trapped-ion system. In an aspect, a method is described that includes bringing a chain of ions in a trap at a cryogenic temperature, the trap being a micro-fabricated trap, and performing quantum computations, simulations, or both using the chain of ions in the trap at the cryogenic temperature. In another aspect, a method is described that includes establishing a zig-zag ion chain in the cryogenic trapped-ion system, detecting a change in a configuration of the zig-zag ion chain, and determining a measurement of the pressure based on the detection in the change in configuration. In another aspect, a method is described that includes measuring a low frequency vibration, generating a control signal based on the measurement to adjust one or more optical components, and controlling the one or more optical components using the control signal.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: October 11, 2022
    Assignee: UNIVERSITY OF MARYLAND, COLLEGE PARK
    Inventors: Christopher Monroe, Guido Pagano, Paul W. Hess, Harvey B. Kaplan, Wen Lin Tan, Philip J. Richerme
  • Publication number: 20220320314
    Abstract: A method of making a semiconductor device includes depositing a TiN layer over a substrate. The method further includes doping a first portion of the TiN layer using an oxygen-containing plasma treatment. The method further includes doping a second portion of the TiN layer using a nitrogen-containing plasma treatment, wherein the second portion of the TiN layer directly contacts the first portion of the TiN layer. The method further includes forming a first metal gate electrode over the first portion of the TiN layer. The method further includes forming a second metal gate electrode over the second portion of the TiN layer, wherein the first metal gate electrode has a different work function from the second metal gate electrode, and the second metal gate electrode directly contacts the first metal gate electrode.
    Type: Application
    Filed: June 16, 2022
    Publication date: October 6, 2022
    Inventors: Ming ZHU, Hui-Wen LIN, Harry Hak-Lay CHUANG, Bao-Ru YOUNG, Yuan-Sheng HUANG, Ryan Chia-Jen CHEN, Chao-Cheng CHEN, Kuo-Cheng CHING, Ting-Hua HSIEH, Carlos H. DIAZ
  • Publication number: 20220321458
    Abstract: Techniques are described for providing fast reroute for traffic in EVPN-VXLAN. For example, a backup PE device of an Ethernet segment is configured with an additional tunnel endpoint address (“reroute tunnel endpoint address”) for a backup path associated with a second split-horizon group that is different than a tunnel endpoint address and first split-horizon group for another path used for normal traffic forwarding. The backup PE device sends the reroute tunnel endpoint address to a primary PE device of the Ethernet segment, which uses the reroute tunnel endpoint address to configure a backup path to the backup PE device over the core network. For example, the primary PE device may install the reroute tunnel endpoint address within its forwarding plane and one or more operations to cause the primary PE device to encapsulate a VXLAN header including the reroute tunnel endpoint address when rerouting the packet along the backup path.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 6, 2022
    Inventors: Wen Lin, Yi Zheng, Mukesh Kumar, Xichun Hong, SelvaKumar Sivaraj, Vamshi Krishna Voruganti, John E. Drake
  • Patent number: 11457706
    Abstract: The present invention provides a body-worn structure, and more particularly a body-worn structure that applies a containing structure to the body of an animal, including a person or pet, and uses a multifunctional structure for use by a user in various different circumstances. For example, the structure can be applied as a body protective device in an emergency situation in outdoor activities, such as riding a motorcycle, mountain-climbing, skiing, hand gliding, paragliding, and boating, when the body-worn structure is applied as a protective clothing, an airbag, airbag clothing, etc. Moreover, the body-worn structure is an all-in-one functional device, including use when taking a pet outdoors, when the structure can be applied as a pet knapsack, pet weatherproof clothing, pet carrier bag, and a fixing device for a pet droppings collection bag.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: October 4, 2022
    Inventor: Che-Wen Lin
  • Patent number: 11458478
    Abstract: An integrated stage for holding rapid test reagent cards includes two U-shaped sidewalls opposite to each other, a first receiving space, a second receiving space, and an elastic sheet. The U-shaped sidewalls cooperatively define the first receiving space. The second receiving space is formed in the first receiving space and is lower than the first receiving space. The elastic sheet is arranged on a short side of the first receiving space. The first receiving space is used for allowing the integrated stage to hold a first rapid test reagent card. The second receiving space is used for allowing the integrated stage to hold a second rapid test reagent card. The integrated stage utilizes the elastic sheet to hold and fix the first rapid test reagent card or the second rapid test reagent card.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: October 4, 2022
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Yu-Cheng Lin, Wei-Chien Weng, Kai-Wen Lin
  • Publication number: 20220304995
    Abstract: The present disclosure provides an ophthalmic composition comprising 4-(3-amino-1-(isoquinolin-6-ylamino)-1-oxopropan-2-yl)benzyl 2,4-dimethylbenzoate or its pharmaceutically acceptable salts; about 0.01% weight/volume to about 1.0% weight/volume of a buffer; and about 0.01% weight/volume to about 10% weight/volume of a tonicity agent.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 29, 2022
    Inventors: Cheng-Wen Lin, Casey Kopczynski, Mitchell A. deLong, Jill M. Sturdivant, Ramesh Krishnamoorthy
  • Publication number: 20220308464
    Abstract: In a method of manufacturing a semiconductor device a semiconductor wafer is retrieved from a load port. The semiconductor wafer is transferred to a treatment device. In the treatment device, the surface of the semiconductor wafer is exposed to a directional stream of plasma wind to clean a particle from the surface of the semiconductor wafer. The stream of plasma wind is generated by an ambient plasma generator and is directed at an oblique angle with respect to a perpendicular plane to the surface of the semiconductor wafer for a predetermined plasma exposure time. After the cleaning, a photo resist layer is disposed on the semiconductor wafer.
    Type: Application
    Filed: July 6, 2021
    Publication date: September 29, 2022
    Inventors: Chung-Hsuan LIU, Chen-Yang LIN, Ku-Hsiang SUNG, Da-Wei YU, Kuan-Wen LIN, Chia-Jen CHEN, Hsin-Chang LEE
  • Patent number: 11456256
    Abstract: A semiconductor device includes a semiconductor substrate, a dielectric structure, an electrical insulating and thermal conductive layer and a circuit layer. The electrical insulating and thermal conductive layer is disposed over the semiconductor substrate. The dielectric structure is disposed over the electrical insulating and thermal conductive layer, wherein a thermal conductivity of the electrical insulating and thermal conductive layer is substantially greater than a thermal conductivity of the dielectric structure. The circuit layer is disposed in the dielectric structure.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang, Wen-Lin Shih
  • Patent number: 11443915
    Abstract: Disclosed herein an apparatus and a method for detecting buried features using backscattered particles. In an example, the apparatus comprises a source of charged particles; a stage; optics configured to direct a beam of the charged particles to a sample supported on the stage; a signal detector configured to detect backscattered particles of the charged particles in the beam from the sample; wherein the signal detector has angular resolution. In an example, the methods comprises obtaining an image of backscattered particles from a region of a sample; determining existence or location of a buried feature based on the image.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: September 13, 2022
    Assignee: ASML Netherlands B.V.
    Inventors: Joe Wang, Chia Wen Lin, Zhongwei Chen, Chang-Chun Yeh
  • Publication number: 20220285513
    Abstract: Gate spacer that improves performance and methods for fabricating such are disclosed herein. An exemplary device includes a gate stack disposed over a semiconductor layer and a gate spacer disposed on a sidewall of the gate stack. A source/drain feature is disposed in the semiconductor layer and adjacent the gate spacer. A low-k contact etch stop layer is disposed on a top surface and a sidewall of the gate spacer and a portion of the gate spacer is disposed between the low-k contact etch stop layer and the semiconductor layer. A source/drain contact is disposed on the source/drain feature and adjacent the low-k contact etch stop layer.
    Type: Application
    Filed: September 2, 2021
    Publication date: September 8, 2022
    Inventors: Ting-Yeh Chen, Wei-Yang Lee, Chia-Pin Lin, Da-Wen Lin
  • Publication number: 20220285533
    Abstract: A method of fabricating a device includes providing a fin extending from a substrate, where the fin includes an epitaxial layer stack having a plurality of semiconductor channel layers interposed by a plurality of dummy layers. In some embodiments, the method further includes removing a portion of the epitaxial layer stack within a source/drain region of the semiconductor device to form a trench in the source/drain region that exposes lateral surfaces of the plurality of semiconductor channel layers and the plurality of dummy layers. After forming the trench, in some examples, the method further includes performing a dummy layer recess process to laterally etch ends of the plurality of dummy layers to form first recesses along a sidewall of the trench. In some embodiments, the method further includes conformally forming a cap layer along the exposed lateral surfaces of the plurality of semiconductor channel layers and within the first recesses.
    Type: Application
    Filed: September 2, 2021
    Publication date: September 8, 2022
    Inventors: Tsung-Lin LEE, Choh Fei YEAP, Da-Wen LIN, Chih-Chieh YEH
  • Publication number: 20220280742
    Abstract: A ventilator airflow splitter is described herein that includes two to four connectors extending axially through two to four channels starting from a port insert of a single inlet connector and terminating at a port of each of the two to four connectors. The two to four connectors merge into the single inlet connector where the single inlet connector includes an internal cross-splitter individually dividing each of the two to four connectors internally, thereby separating the airflow between each of the two to four connectors such that the air is incapable of moving between connectors. The ventilator airflow splitter also includes gussets where each of the two to four connectors have a gusset individually attached and the gussets merge at the single inlet connector. Each of the two to four connectors are configured to be operatively connected to medical equipmentor a ventilator at the ports and the port insert of the single inlet connector.
    Type: Application
    Filed: March 2, 2021
    Publication date: September 8, 2022
    Applicant: THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY
    Inventors: Tristan Charles Kitchin, Palmer Duston Hayward, Daniel Sean Jennings, Chandler James Petrovich Flynn, Annie Yu-wen Lin, Eric William Goulet
  • Patent number: 11430671
    Abstract: A wafer cleaning module and a method for cleaning a wafer with the wafer cleaning module are disclosed. For example, the wafer cleaning module includes a wafer chuck to hold a wafer, an ozone source to provide ozone gas towards the wafer, and an ultraviolet (UV) lamp module to provide UV light. The UV lamp module includes a UV light source and a rotatable reflector around the UV light source. The rotatable reflector is movable to adjust an amount of UV light directed towards a surface of the wafer.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: August 30, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yang Lin, Chung-Hsuan Liu, Ku-Hsiang Sung, Kuan-Wen Lin, Chia-Jen Chen, Hsin-Chang Lee