Patents by Inventor Wen Lin

Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11194238
    Abstract: A heat dissipation module includes a housing, at least one inlet, at least one outlet and at least one heat dissipation set. The housing includes a partition dividing the housing, such that a first accommodation space and a second accommodation space are formed inside the housing. At least one opening is disposed in the partition, penetrates through the partition and communicates the first accommodation space with the second accommodation space. The inlet is connected to the housing and communicates with the first accommodation space. The outlet is connected to the housing and communicates with the second accommodation space. The heat dissipation set is located in the second accommodation space. A projection apparatus is also provided. The heat dissipation module and the projection apparatus may effectively exhaust the heat accumulated on the at least one heat dissipation set, which facilitates reducing a temperature of a heat source with high heat-density.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: December 7, 2021
    Assignee: Coretronic Corporation
    Inventors: Wei-Chi Liu, Tsung-Ching Lin, Shi-Wen Lin
  • Publication number: 20210375724
    Abstract: A package structure is provided. The package structure includes a first interconnect structure formed over a first substrate. The package structure also includes a second interconnect structure formed below a second substrate. The package structure further includes a bonding structure between the first interconnect structure and the second interconnect structure. In addition, the bonding structure includes a first intermetallic compound (IMC) and a second intermetallic compound (IMC). The bonding structure also includes an underfill layer surrounding the bonding structure. A width of the first IMC is greater than a width of the second IMC, and the underfill layer covers a sidewall of the first IMC and a sidewall of the second IMC.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Liang SHAO, Wen-Lin SHIH, Su-Chun YANG, Chih-Hang TUNG, Chen-Hua YU
  • Publication number: 20210375766
    Abstract: A semiconductor device includes a semiconductor substrate, a dielectric structure, an electrical insulating and thermal conductive layer and a circuit layer. The electrical insulating and thermal conductive layer is disposed over the semiconductor substrate. The dielectric structure is disposed over the electrical insulating and thermal conductive layer, wherein a thermal conductivity of the electrical insulating and thermal conductive layer is substantially greater than a thermal conductivity of the dielectric structure. The circuit layer is disposed in the dielectric structure.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang, Wen-Lin Shih
  • Publication number: 20210373628
    Abstract: An electronic device that includes a first device portion, a second device portion coupled to the first device portion, and a uni-directional thermally conductive connector coupled to the first device portion and the second device portion. The first device portion comprises a region that includes a component configured to generate heat. The uni-directional thermally conductive connector is configured to dissipate heat away from the first device portion and towards the second device portion. The uni-directional thermally conductive connector includes a thermally conductive material that primarily dissipates heat along a first direction of the thermally conductive material.
    Type: Application
    Filed: November 10, 2020
    Publication date: December 2, 2021
    Inventors: Hung-Wen LIN, Sin-Shong WANG, Keith WANG, Ajit Kumar VALLABHANENI, Jen-Chun CHANG
  • Patent number: 11185563
    Abstract: The present invention discloses uses of treating, preventing or improving bone diseases by Lactobacillus or a composition including the Lactobacillus. The Lactobacillus and compositions can increase the blood calcium concentration, the trabecular bone volume density, the trabecular thickness, the trabecular number and the bone mineral density of a subject, and reduce trabecular spacing of the subject. Further, the present invention discloses a method for treating a subject diagnosed with a bone disease, through identifying the subject having the bone disease and administering to the subject an effective amount of a composition including at least one of Lactobacillus plantarum GKM3 and Lactobacillus paracasei GKS6, wherein the Lactobacillus plantarum GKM3 is deposited in China General Microbiological Culture Collection Center (CGMCC) with a deposition number of CGMCC 14565 on Aug. 25, 2017, and the Lactobacillus paracasei GKS6 is deposited in CGMCC with a deposition number of CGMCC 14566 on Aug. 25, 2017.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: November 30, 2021
    Assignee: GRAPE KING BIO Ltd.
    Inventors: Chin-Chu Chen, Yen-Lien Chen, Shin-Wei Lin, Yen-Po Chen, Yang-Tzu Shih, Ching-Wen Lin
  • Patent number: 11185538
    Abstract: Described herein are compounds and compositions for treating glaucoma and/or reducing intraocular pressure. Compositions may comprise an isoquinoline compound and a prostaglandin or a prostaglandin analog. Compounds described herein include those in which an isoquinoline compound is covalently linked to a prostaglandin or a prostaglandin analog, and those in which an isoquinoline compound and a prostaglandin free acid together form a salt.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: November 30, 2021
    Assignee: Aerie Pharmaceuticals, Inc.
    Inventors: Casey Kopczynski, Cheng-Wen Lin, Jill Marie Sturdivant, Mitchell A. deLong
  • Publication number: 20210363981
    Abstract: A noise reduction device of compressor for gas is arranged at the inlet end of the compressor. The noise reduction device includes a noise reduction gas return housing and a plurality of gas inlet small pipes, gas inlet large pipes, gas return large pipes, and gas return small pipes, respectively arranged in the noise reduction gas return housing. The design and arrangement that the gas inlet large pipes and the gas return large pipes are respectively sleeved on the gas inlet small pipes and the gas return small pipes changes the moving path of the gas in the noise reduction gas return housing in an instantaneously reverse manner. Such moving path change mainly reduces the flow rate of the gas, so that the noise generated by the gas can be effectively reduced.
    Type: Application
    Filed: May 20, 2021
    Publication date: November 25, 2021
    Inventors: YU-WEN LIN, HIS-YUNG SUN
  • Publication number: 20210367100
    Abstract: This disclosure relates to a superlattice structure, an LED epitaxial structure, a display device, and a method for manufacturing the LED epitaxial structure. The superlattice structure includes at least two superlattice units which are grown in stacking layers. Each of the at least two superlattice units includes a first n-type GaN layer, a second n-type GaN layer, a first n-type GaInN layer, and a second n-type GaInN layer which are grown in stacking layers. The first n-type GaN layer has a doping concentration which is constant along a growth direction, the second n-type GaN layer has a doping concentration which gradually increases along the growth direction, the first n-type GaInN layer has a doping concentration which gradually decreases along the growth direction, and the second n-type GaInN layer has a doping concentration which is constant along the growth direction.
    Type: Application
    Filed: June 14, 2021
    Publication date: November 25, 2021
    Inventors: Wen Yang HUANG, Ya-Wen LIN, Kuo-Tung HUANG, Chia-Hung HUANG, Shun-Kuei YANG
  • Publication number: 20210366784
    Abstract: A semiconductor device includes a P-type Field Effect Transistor (PFET) and an NFET. The PFET includes an N-well disposed in a substrate, a first fin structure disposed over the N-well, a first liner layer disposed over the N-well, and a second liner layer disposed over the first liner layer. The first liner layer and the second liner layer include different materials. The NFET includes a P-well disposed in the substrate, a second fin structure disposed over the P-well, a third liner layer disposed over the P-well. The third liner layer and the second liner layer include the same materials.
    Type: Application
    Filed: June 4, 2021
    Publication date: November 25, 2021
    Inventors: Ming-Lung Cheng, Yen-Chun Lin, Da-Wen Lin
  • Publication number: 20210367101
    Abstract: A micro LED and a manufacturing method thereof are provided. The micro LED includes a first semiconductor layer, an active layer, and a second semiconductor layer that are successively stacked together. The first semiconductor layer and the second semiconductor layer are of different types. The active layer includes a first quantum well layer and a second quantum well layer stacked together. The second quantum well layer and the second semiconductor layer form a nanoring. The first quantum well layer is configured to emit light of a first color. The second quantum well layer forming a sidewall of the nanoring is configured to emit light of a second color different from the first color. The first semiconductor layer is electrically coupled to a first electrode, and the second semiconductor layer is electrically coupled to a second electrode. A manufacturing method for a micro LED is provided.
    Type: Application
    Filed: August 3, 2021
    Publication date: November 25, 2021
    Inventors: Kuo-Tung HUANG, Ya-Wen LIN, Chia-Hung HUANG
  • Patent number: 11182272
    Abstract: Embodiments of the present disclosure relate to methods, systems, and computer program products for monitoring a state of an application. A target object that is to be monitored in an application may be determined in response to receiving a monitoring configuration. A position of the target object in source codes of the application may be identified. A state of the target object may be monitored in response to the application being traced to a location corresponding to the position.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: November 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Zheng Chen, Jinsong Ji, Ke Wen Lin, Qing Shan Zhang
  • Patent number: 11175753
    Abstract: A mouse includes a main body, a supporting component, a stopping structure and an elastic component. The main body has a receiving chamber penetrating through one end of the main body. An upper portion of the main body is equipped with a magnetic attraction component located to a top of the receiving chamber. The supporting component is slidably arranged in the receiving chamber to be retracted into or be pulled out from the receiving chamber. A top of the supporting component is equipped with a magnetic attraction element. The stopping structure is arranged between the main body and the supporting component for limiting the supporting component from being retracted into the main body. One end of the elastic component is connected to the main body, and the other end of the elastic component is connected to the supporting component.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: November 16, 2021
    Assignee: Cheng Uei Precision Industry Co., Ltd.
    Inventor: Li Wen Lin
  • Publication number: 20210343672
    Abstract: A method of manufacturing a die package structure includes steps described below. A conductive substrate with a plurality of trenches is provided. A die is disposed in each of the trenches. A conductive layer is formed covering the dies and the conductive substrate. A patterned photoresist layer with a plurality of openings is formed exposing a plurality of areas of the conductive layer. A mask is formed on each of the areas of the conductive layer. The patterned photoresist layer is removed after forming the masks. By using the masks, the conductive layer and the conductive substrate under thereof are selectively etched to a predetermined depth to form a plurality of conductive bumps and a plurality of electrodes, in which a remaining of the conductive substrate includes a bottom substrate, the electrodes and the conductive bumps. An upper sealing layer is formed covering the bottom substrate and the dies.
    Type: Application
    Filed: May 31, 2020
    Publication date: November 4, 2021
    Inventors: Chien-Chih LAI, Hung-Wen LIN
  • Publication number: 20210343007
    Abstract: A quality control method for remote fundus screening includes acquiring a fundus image of an examinee through a fundus camera by terminal application institution and transmitting the fundus image as well as personal information and inquiry data which are carried by the examinee to a remote interpretation and consultation center. The remote interpretation consultation center determines whether the fundus image, personal information, and consultation data are qualified; if the fundus image, personal information, and consultation data are unqualified, the remote interpretation consultation center terminates the interpretation.
    Type: Application
    Filed: November 28, 2018
    Publication date: November 4, 2021
    Applicant: FUZHOU YIYING HEALTH TECHNOLOGY CO., LTD.
    Inventors: LUN YU, YING-QIANG QIU, JIA-WEN LIN, XIN-RONG CAO, LI-NA WANG
  • Publication number: 20210343006
    Abstract: The present invention relates to fundus image processing field, especially a preprocessing method for quantitative analysis of fundus image, and storage device. A preprocessing method for quantitative analysis of fundus image, wherein the step includes, acquiring a to-be-processed fundus image; performing optic disk positioning on the to-be-processed fundus image; performing macular fovea positioning on the to-be-processed image; and calculating a quantization parameter of a distance between a center of the macular fovea and a bitamporal edge of the optic disk. Through this method, the data obtained is converted from absolute representation to relative representation, and through normalization, a meaningful and comparable quantification is formed between people, between different people, and even between inspection results of different instruments. analyze data. It ensures that fundus images from different sources can form meaningful and comparable quantitative indicators.
    Type: Application
    Filed: November 28, 2018
    Publication date: November 4, 2021
    Applicant: FUZHOU YIYING HEALTH TECHNOLOGY CO., LTD.
    Inventors: LUN YU, YING-QIANG QIU, JIA-WEN LIN, XIN-RONG CAO, LI-NA WANG
  • Patent number: 11164749
    Abstract: Examples described herein provide a method for reducing warpage when stacking semiconductor substrates. In an example, a first substrate is bonded with a second substrate to form a stack. The first substrate comprises a first semiconductor substrate, and the second substrate comprises a second semiconductor substrate. The second semiconductor substrate is thinned, and a first trench is etched into a backside of the thinned second semiconductor substrate. A first stressed material is deposited into the first trench.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: November 2, 2021
    Assignee: XILINX, INC.
    Inventors: Nui Chong, Hui-Wen Lin
  • Publication number: 20210333569
    Abstract: A display apparatus includes a coherent light source, a display unit, a light-diffusing element, and at least one optical element. The coherent light source is configured to provide coherent light beams. The display unit is configured to form a three-dimensional image beam based on interference of the coherent light beams, wherein the three-dimensional image beam is imaged on an intermediate imaging surface after passing through the display unit. The light-diffusing element is located on the intermediate imaging surface, wherein a diffusion angle of the three-dimensional image beam is sequentially changed by passing through the light-diffusing element. The at least one optical element is located on a transmission path of the three-dimensional image beam from the light-diffusing element, and is configured to project the three-dimensional image light beam passing through the display unit out of the display apparatus to display a three-dimensional image.
    Type: Application
    Filed: April 23, 2020
    Publication date: October 28, 2021
    Applicant: Himax Display, Inc.
    Inventors: Kuan-Hsu Fan-Chiang, Chi-Wen Lin
  • Publication number: 20210329201
    Abstract: A camera module aligning method includes the following steps. Firstly, a reference chart having plural chart characteristic points is provided. Then, a camera module is used to shoot the reference chart, and an installation position and an installation posture of the camera module are acquired according to an internal parameter matrix and an external parameter matrix. When the camera module shoots the reference chart and an image is formed on an imaging plane of the camera module, a relationship between at least one image characteristic point of the image and the corresponding chart characteristic point complies with a standard relationship. The standard relationship is defined by the internal parameter matrix and the external parameter matrix.
    Type: Application
    Filed: June 24, 2020
    Publication date: October 21, 2021
    Inventors: HSIU-WEN WANG, Chih-Wen Lin
  • Patent number: 11150680
    Abstract: Some embodiments relate to a device disposed on a semiconductor substrate. The semiconductor substrate includes a base region and a crown structure extending upwardly from the base region. The crown structure is narrower than the base region. A plurality of fins extend upwardly from an upper surface of the crown structure. A gate dielectric material is disposed over upper surfaces and sidewalls of the plurality of the fins. A conductive electrode is disposed along sidewall portions of the gate dielectric material. An uppermost surface of the conductive electrode resides below the upper surfaces of the plurality of fins.
    Type: Grant
    Filed: September 22, 2019
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yvonne Lin, Da-Wen Lin, Peter Huang, Paul Rousseau, Sheng-Jier Yang
  • Publication number: 20210319973
    Abstract: The disclosure describes various aspects of a cryogenic trapped-ion system. In an aspect, a method is described that includes bringing a chain of ions in a trap at a cryogenic temperature, the trap being a micro-fabricated trap, and performing quantum computations, simulations, or both using the chain of ions in the trap at the cryogenic temperature. In another aspect, a method is described that includes establishing a zig-zag ion chain in the cryogenic trapped-ion system, detecting a change in a configuration of the zig-zag ion chain, and determining a measurement of the pressure based on the detection in the change in configuration. In another aspect, a method is described that includes measuring a low frequency vibration, generating a control signal based on the measurement to adjust one or more optical components, and controlling the one or more optical components using the control signal.
    Type: Application
    Filed: May 3, 2021
    Publication date: October 14, 2021
    Inventors: Christopher MONROE, Guido PAGANO, Paul W. HESS, Harvey B. KAPLAN, Wen Lin TAN, Philip J. RICHERME