Patents by Inventor Wen Lin

Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11020013
    Abstract: A physiological detection device includes an array sensor and a processing unit. The array sensor is configured to output array photoplethysmography (PPG) signals. The processing unit is configured to construct a 3D energy distribution, and identify an arc-like pattern in the 3D energy distribution according to the array PPG signals to accordingly identify different microcirculation states and an attaching status.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: June 1, 2021
    Assignee: PIXART IMAGING INC.
    Inventors: Chiung-Wen Lin, Wei-Ru Han, Yang-Ming Chou, Cheng-Nan Tsai, Ren-Hau Gu, Chih-Yuan Chuang
  • Patent number: 11026003
    Abstract: Disclosed is an optical network unit (ONU) capable of reporting current Dynamic Bandwidth Report upstream (DBRu) information to an optical line terminal (OLT) according to the amount variation of to-be-transmitted upstream data in a buffer. The ONU includes: the buffer temporarily storing the to-be-transmitted upstream data; a register circuit recording previous data amount information related to the previous data amount of the buffer at a previous time point earlier than a current time point; a DBRu information generating circuit generating the current DBRu information according to an amount difference and a current data amount of the buffer at the current time point, wherein the amount difference is dependent on the difference between the previous data amount information and current data amount information that is dependent on the current data amount; and a transmitting circuit transmitting the current DBRu information to the OLT.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: June 1, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hung-Wen Lin, Mu-Jung Hsu
  • Publication number: 20210160259
    Abstract: Systems and methods are provided for generating samples of network traffic and characterizing the samples to easily identify exploits. A first embodiment of the present disclosure can generate traffic between a sample generator and the target computing device based on a particular exploit. The traffic can be a plurality of samples of the exploit using an exploit script. The method can provide for collecting and storing the plurality of samples. These samples can then be used to characterize the exploit by identifying invariant portions and variable portions of the samples. The method can further provide for removing any artifacts from the samples. Regular expressions can be constructed based on the samples. Each regular expression can be tested and ranked according to metrics of efficiency and accuracy.
    Type: Application
    Filed: February 2, 2021
    Publication date: May 27, 2021
    Inventors: Victor C. VALGENTI, Ya-Wen LIN, Atsuhiro SUZUKI, Min Sik KIM
  • Patent number: 11017738
    Abstract: A gate driving circuit which allows narrower framing of a display screen includes cascade-connected gate driving modules. Each gate driving module is electrically coupled to first and second scan lines and outputs scanning signals to the first and the second scan lines in a time-division manner in response to first and second clock signals. Each gate driving module includes an input transistor, and first and second output transistors. The input transistor receives a trigger signal for activating the gate driving module. The input transistor controls the first output transistor to output first scanning signal to first scan line in response to the first clock signal and controls the second output transistor to output second scanning signal to the second scan line in response to the second clock signal.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: May 25, 2021
    Assignee: Century Technology (Shenzhen) Corporation Limited
    Inventors: Qi Xu, Ming-Tsung Wang, Wen-Lin Chen, Jing Zhu
  • Patent number: 11009980
    Abstract: A fingerprint-sensing array on a substrate includes the substrate, scan lines, data lines, readout lines, sub-pixels, and multiple fingerprint recognition units. Areas between adjacent scan lines and adjacent data lines define one sub-pixel with pixel electrode and a first transistor. Of the first transistor, drain electrode connects to the pixel electrode, source electrode connects to one data line and gate electrode connects to one scan line. Thus some of the sub-pixels contain fingerprint recognition units, these being a photodiode electrically connected to one readout line. The readout line passes signals generated by the photodiode to achieve fingerprint recognition function. A display panel using the array on the substrate and a display device using the display panel are also provided.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: May 18, 2021
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chien-Wen Lin, Yu-Fu Weng, Chia-Lin Liu
  • Publication number: 20210129002
    Abstract: An adjustable attachment structure for a swimming machine is disclosed. The attachment structure is configured to interact with a frame of a pool. A user may interact with a locking switch to transition the attachment structure between a locked and an unlocked state. In the unlocked state, the swimming machine may be rotated about an axis to direct a generated current in a number of directions.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 6, 2021
    Inventors: Zhi Xiong Huang, Ying Biao Zhang, Zheng Wen Lin
  • Patent number: 10998163
    Abstract: The disclosure describes various aspects of a cryogenic trapped-ion system. In an aspect, a method is described that includes bringing a chain of ions in a trap at a cryogenic temperature, the trap being a micro-fabricated trap, and performing quantum computations, simulations, or both using the chain of ions in the trap at the cryogenic temperature. In another aspect, a method is described that includes establishing a zig-zag ion chain in the cryogenic trapped-ion system, detecting a change in a configuration of the zig-zag ion chain, and determining a measurement of the pressure based on the detection in the change in configuration. In another aspect, a method is described that includes measuring a low frequency vibration, generating a control signal based on the measurement to adjust one or more optical components, and controlling the one or more optical components using the control signal.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: May 4, 2021
    Assignee: UNIVERSITY OF MARYLAND, COLLEGE PARK
    Inventors: Christopher Monroe, Guido Pagano, Paul W. Hess, Harvey B. Kaplan, Wen Lin Tan, Philip J. Richerme
  • Patent number: 10999126
    Abstract: Techniques are described for avoiding traffic black-holing in a multi-homed Ethernet virtual private networks (EVPNs) in which a customer device (CE) is multi-homed to a plurality of multi-homing provider edge devices (PEs) via respective links of an Ethernet segment. An overlay network is created over the Ethernet segment, and the multi-homing PEs of the EVPN are configured with a common anycast IP address for respective virtual network interfaces. Upon election as active designated forwarder (DF) for the EVPN, the DF PE of the multi-homing PEs advertises toward the customer network an IGP metric for the anycast IP address that is lower than the IGP metric(s) advertised by any of the non-DF standby PE routers segment to direct the CE to forward network packets from the customer network to the DF PE over the respective link of the Ethernet segment.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: May 4, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Tapraj Singh, Wen Lin, SelvaKumar Sivaraj, Rukesh Dorai, Sunesh Rustagi
  • Publication number: 20210125552
    Abstract: A method for driving a high-frequency display applied in a display apparatus with a border of reduced size selects one horizontal scan line for scanning during a selecting period. The signals of the selected horizontal scan line and two following horizontal lines adjacent to the selected horizontal scan line are made effective during a first sub-period. The signals of the selected horizontal scan line and a following horizontal scan line adjacent to the selected horizontal scan line are made effective during a second sub-period following. The signals of the selected horizontal scan line are made effective during a third sub-period following the second.
    Type: Application
    Filed: December 10, 2020
    Publication date: April 29, 2021
    Inventors: YU-FU WENG, CHIEN-WEN LIN, TZU-YU CHENG
  • Publication number: 20210116794
    Abstract: A heat dissipation module includes a base, a cover and a plurality of heat dissipation fins. The cover is disposed on the base and forms an accommodation space with the base. The plurality of heat dissipation fins is disposed in the accommodation space. The cover includes a top, at least one side wall, a first opening and a second opening. The first opening and the second opening are disposed on the top or the at least one side wall. The at least one side wall surrounds the top and is connected to the base. The distances between the plurality of heat dissipation fins and one of the at least one side wall in a first direction are different. A projection apparatus is also provided, which includes a light source module, a light valve, the aforementioned heat dissipation module and a projection lens.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 22, 2021
    Inventors: SHI-WEN LIN, WEI-CHI LIU, TSUNG-CHING LIN
  • Publication number: 20210118785
    Abstract: Techniques directed to forming and using coupling mechanisms for substrates, semiconductor packages, and/or printed circuit boards are described. One technique includes forming a substrate (205) comprising: first and second interconnect pads (213A, 213B) in or on a build-up layer (203); and first and second interconnects (211A, 211B) on the first and second interconnect pads (213A, 213B). The first interconnect pad (213A) can be located at a lower position than the second interconnect pad (213B) with regard to a z-position. The techniques described herein can assist with minimizing or eliminating solder ball bridge defects (SBBDs) that may be creating during performance of coupling technique (e.g., a reflow process, etc.).
    Type: Application
    Filed: June 29, 2018
    Publication date: April 22, 2021
    Inventor: Si Wen LIN
  • Publication number: 20210118764
    Abstract: An assembly comprising a substrate, a first integrated device coupled to the substrate, a second integrated device coupled to the substrate, a frame coupled to the substrate such that the frame at least partially surrounds the first integrated device and the second integrated device, and a step heat sink coupled to the frame, such that the step heat sink is located over the first integrated device and the second integrated device. The assembly may further include a shield coupled to the frame such that the shield is located between the frame and the step heat sink. The shield may include a step shield. The assembly may further include a heat pipe coupled to the step heat sink.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 22, 2021
    Inventors: Hung-Wen LIN, Sin-Shong WANG, Jen-Chun CHANG, Ajit Kumar VALLABHANENI, Keith WANG
  • Patent number: 10976116
    Abstract: A liquid cooled heat dissipation device including a housing, at least two cooling fin modules, an input pipe, and an output pipe is provided. The housing has an accommodation space. The at least two cooling fin modules are disposed in the accommodation space. The input pipe is disposed on the top plate, the front plate, the rear plate, or one of the side plates of the housing and communicates with the accommodation space. The output pipe is disposed on the top plate, the front plate, the rear plate, or the other one of the side plates of the housing and communicates with the accommodation space. The at least two cooling fin modules have different arrangement densities and different fin thicknesses.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: April 13, 2021
    Assignee: Coretronic Corporation
    Inventors: Wei-Chi Liu, Tsung-Ching Lin, Shi-Wen Lin, Chi-Chuan Wang, Yong-Dong Zhang
  • Patent number: 10971110
    Abstract: A circuit for use in a first display device to facilitate communication with a second display device is provided. The first display device and the second display device each include a connector compliant with a digital display interface standard. The circuit includes a digital display interface circuit and a control unit. The digital display interface circuit is used for transmission or receiving of video data according to the digital display interface standard, the digital display interface circuit for being connected to the connector of the first display device. The control unit is configured to transmit at least one first communication signal through at least one first pin of the connector of the first display device to communicate with the second display device, wherein the at least one first communication signal is non-standard with respect to the digital display interface standard.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: April 6, 2021
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Chih-Peng Nien, Chien-Wen Lin
  • Patent number: 10964285
    Abstract: The present invention provides a driver chip comprising a gate driving module and a source driving module both coupled to a display panel. A plurality of scan lines and a plurality of data line of the display panel scan and drive the display panel for displaying a frame. The source driving module is coupled to the mainboard and receives the positive and negative voltage of the mainboard for generating a source signal to the display panel.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: March 30, 2021
    Assignee: Forcelead Technologies Corp.
    Inventors: Chih-Lung Kuo, Wen-Lin Yang
  • Patent number: 10958817
    Abstract: A method for determining camera module assembling quality is provided. The method includes a step of determining whether the shooting position and the shooting posture of and under-test camera module are correct according to a result of judging whether a relationship between the world coordinate of at least one chart characteristic point of a reference chart and the image coordinate of a corresponding image characteristic point of an image plane coordinate system complies with a standard relationship. Then, the under-test camera module at the correct shooting position and with the correct shooting posture is used to shoot the reference chart. Consequently, an assembling information of the under-test camera module is obtained.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: March 23, 2021
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Hsiu-Wen Wang, Chih-Wen Lin
  • Patent number: 10955703
    Abstract: A polarizer component has an optical film to receive excitation light, a light re-emitting layer and a polarizing layer. The light re-emitting layer has quantum dots that re-emit red light and quantum dots that re-emit green light in response to the excitation light. The re-emitted red light is provided to a red sub-pixel to be filtered by a red color filter, and the re-emitting green light is provided to a green sub-pixel to be filtered by a green color filter. The excitation light can be blue or ultra violet and part of the excitation light is provided to a blue sub-pixel. The polarizing layer can be a reflective polarizing layer and the optical film can be a wavelength selecting layer. The light re-emitting layer may contain scattering particles to diffuse the excitation light provided to a blue sub-pixel.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: March 23, 2021
    Assignee: A.U. VISTA, INC.
    Inventors: Yi-Wen Lin, Adiel Abileah, Willem Den Boer, Fang-Chen Luo, Shu-Han Wang, Chih-Kang Wu
  • Patent number: 10950502
    Abstract: A method for manufacturing chip package is disclosed. The method includes providing a wafer having conductive bumps disposed on a first surface; forming a first adhesion layer and a first carrier board; thinning the wafer; forming a first insulating layer; forming a second adhesion layer and a second carrier board; heating the first adhesion layer to a first temperature to remove the first carrier board and the first adhesion layer; forming trenches; forming a third adhesion layer and a third carrier board; heating the second adhesion layer to a second temperature to remove the second carrier board and the second adhesion layer; forming a second insulating layer filling the trenches; heating the third adhesion layer to a third temperature to remove the third carrier board and the third adhesion layer; and dicing the first insulating layer and the second insulating layer along each trench.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: March 16, 2021
    Assignee: Comchip Technology Co., Ltd.
    Inventors: Chien-Chih Lai, Hung-Wen Lin
  • Publication number: 20210072196
    Abstract: Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.
    Type: Application
    Filed: November 23, 2020
    Publication date: March 11, 2021
    Inventors: Jun-Hao Deng, Kuan-Wen Lin, Sheng-Chi Chin, Yu-Ching Lee
  • Patent number: 10944768
    Abstract: Systems and methods are provided for generating samples of network traffic and characterizing the samples to easily identify exploits. A first embodiment of the present disclosure can generate traffic between a sample generator and the target computing device based on a particular exploit. The traffic can be a plurality of samples of the exploit using an exploit script. The method can provide for collecting and storing the plurality of samples. These samples can then be used to characterize the exploit by identifying invariant portions and variable portions of the samples. The method can further provide for removing any artifacts from the samples. Regular expressions can be constructed based on the samples. Each regular expression can be tested and ranked according to metrics of efficiency and accuracy.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: March 9, 2021
    Assignee: PETABI, INC.
    Inventors: Victor C. Valgenti, Ya-Wen Lin, Atsuhiro Suzuki, Min Sik Kim