Abstract: The invention provides modified Transferrin (Tf) molecules and conjugates of the Tf molecules with a therapeutic agent. The invention also provides methods of treating cancer wherein the therapeutic agents are chemotherapeutic agents. The modified Tf molecules improve the delivery of the conjugated agent to a target tissue. In some embodiments, the modified Tf molecule has a mutation which decreases the release of bound iron from a Tf complex. The complex can also contain, for instance, a carbonate, oxalate, or other anion to stabilize the Tf iron complex.

Abstract: An apparatus includes a substrate having a strained channel region, a dielectric layer over the channel region, first and second conductive layers over the dielectric layer having a characteristic with a first value, and a strain-inducing conductive layer between the conductive layers having the characteristic with a second value different from the first value. A different aspect involves an apparatus that includes a substrate, first and second projections extending from the substrate, the first projection having a tensile-strained first channel region and the second projection having a compression-strained second channel region, and first and second gate structures engaging the first and second projections, respectively. The first gate structure includes a dielectric layer, first and second conductive layers over the dielectric layer, and a strain-inducing conductive layer between the conductive layers.

Abstract: A semiconductor device and its method of manufacture are provided. Embodiments forming an active region in a semiconductor substrate, wherein the active region is bounded by an isolation region; forming a first doped region within the active region; forming a gate electrode over the active region, wherein the gate electrode overlies a portion of the first doped region; forming at least one dielectric layer over sidewalls of the gate electrode; forming a pair of spacers on the dielectric layer; and forming a second doped region substantially within the portion of the first doped region adjacent the one of the spacers and spaced apart from the one of the spacers. The first and second doped regions may form a double diffused drain structure as in an HVMOS transistor.

Abstract: An electronic reading apparatus includes a cover, a writing portion and a displaying portion. The cover defines a first side and a second side. The writing portion is arranged at the first side of the cover, and includes a touch input device and a writing unit. The writing unit is configured to create a content of a note by receiving inputs for the content of the note, and the touch input device detects a touch signal for generating an electronic note file in accordance with the touch signal. The displaying portion is arranged at the second side of the cover; and includes a first display unit for displaying a first content.

Abstract: A flat display structure including a substrate, a pixel matrix, a driving circuit and several voltage adapting devices and driving method thereof are provided. Each of voltage adapting devices includes an input terminal, a first control terminal and an output terminal. The input terminal is electrically connected to the i-th gate line Gi corresponding to the i-th pixel row Ri. The first control terminal is adapted to receive a first control signal. The output terminal is adapted to receive a working voltage.

Abstract: A method of load balancing network access requests comprises receiving a network access request from a serving node linked to a radio access network. The network access request identifies a mobile node receiving wireless service from the radio access network and identifies a data network to which the mobile node has requested access. The network access request requests a communication channel with the serving node for transporting data communications between the mobile node and the data network. The method further comprising determining one or more gateways providing access to the data network, selecting one of the gateways, and forwarding the network access request to the selected gateway.

Abstract: A backlight module includes a light guide plate, a back plate, a heat-dissipating element, a light-emitting element, and at least one high-performance heat sink. The heat-dissipating element is disposed adjacent to a light incident surface of the light guide plate, and the heat-dissipating element has a bottom portion and a side portion forming an angle with the bottom portion. The light-emitting element is disposed on one side of the heat-dissipating element facing the light guide plate. The high-performance heat sink is disposed on the back plate, one end of the high-performance heat sink overlaps the heat-dissipating element, and another end of the high-performance heat sink extends away from the light-emitting element.

Abstract: An integrated circuit device and method for manufacturing the integrated circuit device are disclosed. An exemplary method includes providing a substrate; forming a first gate over the substrate for a first device having a first threshold voltage characteristic, the first gate including a first material having a first-type work function; forming a second gate over the substrate for a second device having a second threshold voltage characteristic that is greater than the first threshold voltage characteristic, the second gate including a second material having a second-type work function that is opposite the first-type work function; and configuring the first device and the second device as a same channel type device.

Abstract: An embodiment is a semiconductor device. The semiconductor device comprises a substrate, an electrode over the substrate, and a piezoelectric layer disposed between the substrate and the electrode. The piezoelectric layer causes a strain in the substrate when an electric field is generated by the electrode.

Abstract: The disclosure provides a unit with a sound isolation/vibration isolation structure, an array employing the same, and a method for fabricating the same. The unit with a sound isolation/vibration isolation structure includes: a hollow frame surrounding an inside space; a film disposed within the inside space, vertically contacting an inside wall of the hollow frame; and a body mass disposed on a top surface of the film. Particularly, the horizontal area of the inside space is larger than the area of the top surface of the film.

Abstract: A backlight module includes a heat-dissipating element, at least one light-emitting element disposed on a first side of the heat-dissipating element, a back plate, and a heat-insulation element. The back plate has at least one opening and is disposed on the first side of the heat-dissipating element, and the back plate is not overlapped with the light-emitting element. The heat-insulation element is disposed between the back plate and the heat-dissipating element for reducing heat conduction between the back plate and the heat-dissipating element so as to prevent the heat generated by the light-emitting element from being conducted to the back plate.

Abstract: A method of forming a semiconductor structure includes providing a substrate including a fin at a surface of the substrate, and forming a fin field-effect transistor (FinFET), which further includes forming a gate stack on the fin; forming a thin spacer on a sidewall of the gate stack; and epitaxially growing a epitaxy region starting from the fin. After the step of epitaxially growing the epitaxy region, a main spacer is formed on an outer edge of the thin spacer. After the step of forming the main spacer, a deep source/drain implantation is performed to form a deep source/drain region for the FinFET.

Abstract: The present invention relates to a built-in lamp wireless dimmer device, the wireless dimmer device being built into a light-emitting component, and a remote control and a switching element are used to implement a dimming function. The wireless dimmer device is primarily structured from a decoder unit and a RF (radio frequency) wireless receiver unit. Accordingly, the remote control is used to transmit a RF signal to the dimmer device to implement wireless dimming and stepless light source transformation of the light-emitting component.

Abstract: The present invention provides methods of screening an agent for an activity in an isolated organ, e.g., eye, from a teleost, e.g., zebrafish. Methods of isolating eyes from zebrafish are provided. Methods of screening an agent for an ocular activity in the isolated eye are provided. Methods of screening an agent for an ocular activity in a model of ocular disease or disorder are provided. Methods of screening an agent for an ocular activity in the isolated eye and for screening the agent for cell death and/or toxic activity in the eye or other organ or tissue are provided. The invention further provides high throughput methods of screening agents for an activity in isolated eyes of zebrafish in multi-well plates.

Abstract: Intervertebral implant system for intervertebral implantation, are disclosed. An intervertebral implant system according to the present disclosure includes a frame having a peripheral wall defining a space therein, and a settable material introducible into the space of the frame. The settable material is a biocompatible load bearing material including and not limited to bone, composites, polymers of bone growth material, collagen, and insoluble collagen derivatives. The settable material is injectable into the space defined by the frame. The settable material may have an initial fluid condition wherein the fluid settable material cures to a hardened condition.

Abstract: A backlight module includes a light guide plate having a light incident surface, a light source module, at least one catch member, and a cushion member. The light source module is disposed adjacent to the light incident surface and has at least one light-emitting element, wherein a light beam emitted by the light-emitting element is capable of entering the light guide plate through the light incident surface. The catch member engages with one end of the light source module, wherein the catch member has at least one extension part extending towards the light incident surface of the light guide plate, and the extension part has an end surface facing the light incident surface. The cushion member is disposed between the light guide plate and the light source module and is adjacent to the light incident surface of the light guide plate and the end surface of the catch member.

Abstract: A method of forming an integrated circuit includes providing a semiconductor wafer including a semiconductor fin dispatched on a surface of the semiconductor wafer; forming a dopant-rich layer having an impurity on a top surface and sidewalls of the semiconductor fin, wherein the impurity is of n-type or p-type; performing a knock-on implantation to drive the impurity into the semiconductor fin; and removing the dopant-rich layer.

Abstract: A semiconductor device and its method of manufacture are provided. Embodiments include forming a first doped region and a second doped region. The first and second doped regions may form a double diffused drain structure as in an HVMOS transistor. A gate-side boundary of the first doped region underlies part of the gate electrode. The second doped region is formed within the first doped region adjacent the gate electrode. A gate-side boundary of the second doped region is separated from a closest edge of a gate electrode spacer by a first distance. An isolation region-side boundary of the second doped region is separated from a closest edge of a nearest isolation region by a second distance.

Abstract: A method of forming ultra-shallow p-type lightly doped drain (LDD) regions of a PMOS transistor in a surface of a substrate includes the steps of providing a gaseous mixture of an inert gas, a boron-containing source, and an optional carbon-containing source, wherein the concentration of the gaseous mixture is at least 99.5% dilute with the inert gas and the optional carbon-containing source, if present, forming the gaseous mixture into a plasma, and forming the LDD regions, wherein the forming step includes plasma-doping the boron into the substrate using the plasma. N-type pocket regions are formed in the substrate underneath and adjacent to the LDD regions, wherein for a PMOS transistor having a threshold voltage of 100 mV, the n-type pocket regions include phosphorous impurities at a dopant concentration of less than 6.0×1018 atoms/cm3 or a proportionately lower/higher dopant concentration for a lower/higher threshold voltage.