Abstract: The present disclosure provides a high surface dopant concentration semiconductor device and method of fabricating. In an embodiment, a method of forming the semiconductor device includes providing a substrate, forming a doped region in the substrate, forming a stressing layer over the doped region, performing a boron (B) doping implant to the stressing layer, annealing the B doping implant, and after annealing the B doping implant, forming a silicide layer over the stressing layer.

Abstract: A semiconductor device and its method of manufacture are provided. Embodiments forming an active region in a semiconductor substrate, wherein the active region is bounded by an isolation region; forming a first doped region within the active region; forming a gate electrode over the active region, wherein the gate electrode overlies a portion of the first doped region; forming at least one dielectric layer over sidewalls of the gate electrode; forming a pair of spacers on the dielectric layer; and forming a second doped region substantially within the portion of the first doped region adjacent the one of the spacers and spaced apart from the one of the spacers. The first and second doped regions may form a double diffused drain structure as in an HVMOS transistor.

Abstract: The present invention relates to chiral binaphthyl compounds having good solubility and high helical twisting power. The chiral binaphthyl compounds as dopants in the liquid crystal compositions can help enhance the display quality of the liquid crystal panels.

Abstract: A specialized processing block for a programmable logic device incorporates a fundamental processing unit that performs a sum of two multiplications, adding the partial products of both multiplications without computing the individual multiplications. Such fundamental processing units consume less area than conventional separate multipliers and adders. The specialized processing block further has input and output stages, as well as a loopback function, to allow the block to be configured for various digital signal processing operations.

Abstract: A specialized processing block for a programmable logic device includes circuitry for performing multiplications and sums thereof, as well as circuitry for rounding the result. The rounding circuitry can selectably perform round-to-nearest and round-to-nearest-even operations. In addition, the bit position at which rounding occurs is preferably selectable. The specialized processing block preferably also includes saturation circuitry to prevent overflows and underflows, and the bit position at which saturation occurs also preferably is selectable. The selectability of both the rounding and saturation positions provides control of the output data word width. The rounding and saturation circuitry may be selectably located in different positions based on timing needs. Similarly, rounding may be speeded up using a look-ahead mode in which both rounded and unrounded results are computed in parallel, with the rounding logic selecting between those results.

Abstract: A compensation method for a light emitting diode (LED) circuit including a first transistor, a second transistor, a capacitor, and a LED is illustrated. A first end as a control end of the first transistor is connected to one end of the second transistor and the capacitor, and a second end of the first transistor is connected to the LED. A width to length (W/L) ratio of the second transistor is less than one. An initial control voltage is applied to a control end of the second transistor, and the current output voltage of the LED is correspondingly measured. If a difference between the current output voltage and an initial output voltage exceeds a predetermined value, a compensation voltage, which is a summation of the initial control voltage and the difference, is applied to the control end of the second transistor.

Abstract: Developed here is a mitotic network comprising a signature of up to 54 genes, and including also sub-sets of genes within the signature, which can identify members by requiring higher correlation values for a signature gene. The present mitotic network provides for methods for prognosis and diagnosis of various cancers. The mitotic network is conserved across cancers exhibiting aberrant mitotic activity and several genes in the network act as therapeutic targets. Development of other inhibitors of mitosis can apply expression values of the genes in the mitotic network from patient tissue to select patients during clinical validation of the new drugs.

Abstract: Herein is described the use of a collection of 50 breast cancer cell lines to match responses to 77 conventional and experimental therapeutic agents with transcriptional, proteomic and genomic subtypes found in primary tumors. Almost all compounds produced strong differential responses across the cell lines produced responses that were associated with transcriptional and proteomic subtypes and produced responses that were associated with recurrent genome copy number abnormalities. These associations can now be incorporated into clinical trials that test subtype markers and clinical responses simultaneously.

Abstract: A backlight module includes a panel, a base, at least a light-emitting element, a heat-dissipating board and at least a circuit board. The base is connected to the panel to form an accommodating space. The light-emitting element is disposed in the accommodating space. The heat-dissipating board is disposed on the base and connected to the base. The heat-dissipating board includes at least two connecting portions and a top portion. The connecting portions are respectively connected to two ends of the top portion and the base to separate the top portion from the base for forming a heat-dissipating space therebetween. The circuit board is disposed on an outer surface of the top portion far away from the base.

Abstract: A method for fabricating a semiconductor lighting chip includes steps: providing a substrate with an epitaxial layer, the epitaxial layer comprising a first semiconductor layer, a second semiconductor layer and an active layer located between the first semiconductor layer and the second semiconductor layer; dipping the epitaxial layer into an electrolyte to etch surfaces of the epitaxial layer and form a number of holes on the epitaxial layer; and forming electrodes on the epitaxial layer.

Abstract: A metal oxide semiconductor structure and a production method thereof, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.

Abstract: An exemplary LED includes an electrode layer, an LED die, a transparent electrically conductive layer, and an electrically insulating layer. The electrode layer includes a first section and a second section electrically insulated from the first section. The LED die is arranged on and electrically connected to the second section of the electrode layer. The transparent electrically conductive layer is formed on the LED die and electrically connects the LED die to the first section of the electrode layer. The electrically insulating layer is located between the LED die and the transparent electrically conductive layer to insulate the transparent electrically conductive layer from the second section of the electrode layer.

Abstract: An LED comprises an electrode layer comprising a first a second sections electrically insulated from each other; an electrically conductive layer on the second section, an electrically conductive pole protruding from the electrically conductive layer; an LED die comprising an electrically insulating substrate on the electrically conductive layer, and a P-N junction on the electrically insulating substrate, the P-N junction comprising a first electrode and a second electrode, the electrically conductive pole extending through the electrically insulating substrate to electrically connect the first electrode to the second section; a transparent electrically conducting layer on the LED die, the transparent electrically conducting layer electrically connecting the second electrode to the first section; and an electrically insulating layer between the LED die, the electrically conductive layer, and the transparent electrically conducting layer, wherein the electrically insulating layer insulates the transparent ele

Abstract: A method for making device housing comprises: providing a transparent film; forming a coating on one surface of the film by printing ink containing metal powder on the film and ultrasonically treating the coating; and molding a substrate onto the coating.

Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.

Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate with a first block layer dividing an upper surface of the substrate into a plurality of epitaxial regions; forming a first semiconductor layer on the epitaxial regions; forming a second block layer partly covering the first semiconductor layer; forming a lighting structure on an uncovered portion of the first semiconductor layer; removing the first and the second block layers thereby defining clearances at the bottom surfaces of the first semiconductor layer and the lighting structure; and permeating etching solution into the first and second clearances to etch the first semiconductor layer and the lighting structure, thereby to form each of the first semiconductor layer and the lighting structure with an inverted frustum-shaped structure.

Abstract: The present invention relates to chiral binaphthyl compounds having good solubility and high helical twisting power. The chiral binaphthyl compounds as dopants in the liquid crystal compositions can help enhance the display quality of the liquid crystal panels.

Abstract: An epitaxial structure of a light emitting diode (LED) includes a substrate, an epitaxial layer, and a light capturing microstructure. The substrate has a top surface. The epitaxial layer is grown on the top surface of the substrate and has a P-type semiconductor layer, an active layer, and an N-type semiconductor layer in sequence. The light capturing microstructure is positioned on an upper portion of the epitaxial layer which is distant from the substrate. A manufacturing method of an epitaxial structure of an LED is also disclosed. The light capturing microstructure includes at least a concave and an insulating material filled in the at least a concave.