Abstract: The present invention relates to a steam powered nailing gun. In certain embodiments, the steam powered nailing gun includes a handle, a casing, a high pressure water pump, a piston mechanism, a nailing gun base, and a nail magazine. The piston mechanism is connected to the casing. One end of the piston mechanism is connected to the high pressure water pump, and another end is connected to nailing gun base. The nail magazine is disposed at a position corresponding to piston mechanism on the nailing gun base. A phase transition thermal storage device and a steam power generator are positioned inside casing having steam power generator inside phase transition thermal storage device. The steam power generator is connected to high pressure water pump and piston mechanism. The high pressure water pump is further connected to a water supply device 11 on the handle through a second water supply pipe.

Abstract: A semiconductor device includes a nanowire structure and a stressor. The nanowire structure includes a first channel section and a second channel section. The stressor subjects the first channel section to a first strain level and the second channel section to a second strain level greater than the first strain level. The difference between the second strain level and the first strain level is less than the second strain level.

Abstract: A semiconductor device includes a semiconductor substrate comprising a contact region, a silicide present on the contact region, a dielectric layer present on the semiconductor substrate, the dielectric layer comprising an opening to expose a portion of the contact region, a conductor present in the opening, a barrier layer present between the conductor and the dielectric layer, and a metal layer present between the barrier layer and the dielectric layer, wherein a Si concentration of the silicide is varied along a height of the silicide.

Abstract: A semiconductor device includes a substrate, at least one active semiconductor fin, at least one first dummy semiconductor fin, and at least one second dummy semiconductor fin. The active semiconductor fin is disposed on the substrate. The first dummy semiconductor fin is disposed on the substrate. The second dummy semiconductor fin is disposed on the substrate and between the active semiconductor fin and the first dummy semiconductor fin. A top surface of the first dummy semiconductor fin and a top surface of the second dummy semiconductor fin are curved in different directions.

Abstract: A semiconductor device includes a n-type gate structure over a first semiconductor fin, in which the n-type gate structure includes a n-type work function metal layer overlying the first high-k dielectric layer. The n-type work function metal layer includes a TiAl (titanium aluminum) alloy, in which an atom ratio of Ti (titanium) to Al (aluminum) is in a range substantially from 1 to 3. The semiconductor device further includes a p-type gate structure over a second semiconductor fin, in which the p-type gate structure includes a p-type work function metal layer overlying the second high-k dielectric layer. The p-type work function metal layer includes titanium nitride (TiN), in which an atom ratio of Ti to N (nitrogen) is in a range substantially from 1:0.9 to 1:1.1.

Abstract: A method of searching an image, which is disclosed in the present invention, includes selecting a first timing and a second timing to generate a first period, obtaining a plurality of first images from a first video streaming within the first period, and setting a second period according to at least one first image so as to obtain a plurality of second images from the first video streaming within the second period. The method of searching the image further includes simultaneously displaying a plurality of third image from a second video streaming within the second period, enlarging a selected image of the second images or the third images, and simultaneously enlarging another image that is captured at the same time as the time when the enlarging selected image is captured. The two enlarging images respectively belong to the first video streaming and the second video streaming.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a fin active region formed on a semiconductor substrate and spanning between a first sidewall of a first shallow trench isolation (STI) feature and a second sidewall of a second STI feature; an anti-punch through (APT) feature of a first type conductivity; and a channel material layer of the first type conductivity, disposed on the APT feature and having a second doping concentration less than the first doping concentration. The APT feature is formed on the fin active region, spans between the first sidewall and the second sidewall, and has a first doping concentration.

Abstract: A semiconductor device and method of forming the same are described. A semiconductor device includes an active area adjacent a channel in a semiconductor composite. The active area includes a first active area layer having a first dopant concentration, a second active area layer having a second dopant concentration over the first active area layer, and a third active area layer having a third dopant concentration, over the second active area. The third dopant concentration is greater than the second dopant concentration, and the second dopant concentration is greater than the first dopant concentration. The channel includes a second channel layer comprising carbon over a first channel layer and a third channel layer over the second channel layer. The active area configuration improves drive current and reduces contact resistance, and the channel configuration increases short channel control, as compared to a semiconductor device without the active area and channel configuration.

Abstract: An embodiment package includes a first package; a thermal interface material (TIM) contacting a top surface of the first package, and a second package bonded to the first package. The second package includes a first semiconductor die, and the TIM contacts a bottom surface of the first semiconductor die. The package further includes a heat spreader disposed on an opposing surface of the second package as the first package.

Abstract: The invention relates to a cylinder cover for a cylinder of a piston mechanism. In certain embodiments, the cylinder cover includes a cylinder cover body, a valve plate, and a one-directional valve. The cylinder cover body has an exhaust port, and an oil intake. The exhaust port and oil intake are disposed on outer circumference of the cylinder cover body. The one directional oil valve is formed by a compression spring and a ball. An inner end of the oil intake is connected to the compression spring through the ball and the ball is disposed between one end of the compression spring and the inner end of the oil intake. The valve plate is retained on an inner wall of the cylinder cover body by a retaining nut. The cylinder cover further has an auxiliary heating rod inside cylinder cover body for pre-heating cylinder cover to a predetermined temperature.

Abstract: A semiconductor device includes a substrate, a pair of source/drain units, and a semiconductor sheet unit. The substrate includes a well region. The source/drain units are disposed above the well region. The semiconductor sheet unit is disposed substantially vertically, interconnects the source/drain units, and defines a cross-sectional shape unit in a top view. The cross-sectional shape unit includes a plurality of cross-sections that have substantially the same shape and different sizes.

Abstract: A method and structure for providing a GAA device. In some embodiments, a substrate including an insulating layer disposed thereon is provided. By way of example, a first metal portion is formed within the insulating layer. In various embodiments, a first lateral surface of the first metal portion is exposed. After exposure of the first lateral surface of the first metal portion, a first graphene layer is formed on the exposed first lateral surface. In some embodiments, the first graphene layer defines a first vertical plane parallel to the exposed first lateral surface. Thereafter, in some embodiments, a first nanobar is formed on the first graphene layer, where the first nanobar extends in a first direction normal to the first vertical plane defined by the first graphene layer.

Abstract: A fin structure on a substrate can have a lower portion formed from the substrate, a middle portion, and an upper portion. The middle portion can include a dielectric region having a dielectric composition and a concentrated region of a first material. The first material can be an element of the dielectric composition. The concentrated region can be located at an interface of the middle portion and lower portion. The structure can also include isolation regions in the substrate on opposing sides of the fin. The structure can also include a gate structure over the upper portion of the fin that are exposed from the isolation regions. The gate structure can include a gate dielectric and gate material over the gate dielectric. The structure can also include source/drain regions extending laterally from the upper portion and the middle portion of the fin.

Abstract: A transistor based on topological insulators is provided. In an embodiment a topological insulator is used to form both the channel as well as the source/drain regions, wherein the channel has a first thickness such that the topological insulator material has properties of a semiconductor material and the source/drain regions have a second thickness such that the topological insulator has properties of a conductive material.

Abstract: Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die and a package layer partially or completely encapsulating the semiconductor die. The chip package also includes a conductive feature penetrating through the package layer. The chip package further includes an interfacial layer the interfacial layer continuously surrounds the conductive feature. The interfacial layer is between the conductive feature and the package layer, and the interfacial layer is made of a metal oxide material.

Abstract: A portable electronic apparatus assembly includes a tabular electronic device and a supporting device. The supporting device includes a base, a connecting member pivotally connected to the base, and a supporting member pivotally connected to the connecting member. The connecting member can rotate about a first rotation axis relative to the base. The supporting member can rotate about a second rotation axis relative to the connecting member. The first rotation axis and the second rotation axis are nonparallel. The supporting device can support the tabular electronic device by accommodating the tabular electronic device in an accommodating slot of the supporting member. Thereby, unfolding and folding of the supporting member relative to the base is more flexible. The whole thickness of the supporting device after folded can avoid being restrained by the thickness of the tabular electronic device.

Abstract: The disclosure relates to a semiconductor device and methods of forming same. A representative structure for a semiconductor device comprises a substrate; a nanowire structure protruding from the substrate having a channel region disposed between a source region and a drain region; a pair of silicide regions extending into opposite sides of the source region, wherein each of the pair of silicide regions comprise a vertical portion adjacent to the source region and a horizontal portion adjacent to the substrate; and a metal gate surrounding a portion the channel region.

Abstract: A device includes isolation regions extending into a semiconductor substrate, with a substrate strip between opposite portions of the isolation regions having a first width. A source/drain region has a portion overlapping the substrate strip, wherein an upper portion of the source/drain region has a second width greater than the first width. The upper portion of the source/drain region has substantially vertical sidewalls. A source/drain silicide region has inner sidewalls contacting the vertical sidewalls of the source/drain region.

Abstract: A device includes a substrate and insulation regions over a portion of the substrate. A first semiconductor region is between the insulation regions and having a first conduction band. A second semiconductor region is over and adjoining the first semiconductor region, wherein the second semiconductor region includes an upper portion higher than top surfaces of the insulation regions to form a semiconductor fin. The second semiconductor region also includes a wide portion and a narrow portion over the wide portion, wherein the narrow portion is narrower than the wide portion. The semiconductor fin has a tensile strain and has a second conduction band lower than the first conduction band. A third semiconductor region is over and adjoining a top surface and sidewalls of the semiconductor fin, wherein the third semiconductor region has a third conduction band higher than the second conduction band.

Abstract: A trimmer head having at least two pivoting line holders for holding multiple folded strips of trimming line is presented wherein said pivoting line holders are retained within said housing between said housing and said cover and extend upward through apertures in said cover, said line holders being capable of movement around a vertical axis of rotation, at least three embodiments are disclosed which provide a rounded landing for supporting the inner radius of a folded strip of trimming line, the rounded geometry of the landing prevents line stress and breakage, the various embodiments include a pivot post having two parallel straight through holes with a rounded vertical wall between the through holes, a single open passageway having a center metal post, and a single open passageway having a series of at least two metal pins through the center of the passageway.