Patents by Inventor Wen LONG

Wen LONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD OF CONTROLLING AN ADJUSTABLE NOZZLE AND METHOD OF MAKING A SEMICONDUCTOR DEVICE
    Publication number: 20180226224
    Abstract: A method of controlling a position of an adjustable nozzle includes depositing a film on a surface of a wafer. The method includes measuring a thickness profile of the surface of the wafer. The method includes comparing the measurement of the thickness profile with a reference value using a control unit. The method includes transmitting a control signal to the adjustable nozzle to alter the position of the adjustable nozzle based on the result of the comparison. The adjustable nozzle includes a base having a hollow center portion for conducting gas, the base configured for connection to a gas source. The adjust nozzle includes a tip coupled to the base and having an opening for conducting gas from the base to the exterior of the nozzle, wherein the base is configured for pivoting about a longitudinal axis of the base in response to the control signal.
    Type: Application
    Filed: April 9, 2018
    Publication date: August 9, 2018
    Inventors: Wei-Ching WU, Wen-Long LEE, Ding-I LIU
  • SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PROCESS FOR MANUFACTURING THE SAME
    Publication number: 20180174981
    Abstract: A semiconductor package includes a substrate, a dielectric layer, at least one conductive pillar and an electrical device. The dielectric layer is disposed on the substrate and defines at least one through hole corresponding to the respective first pad of the substrate. The conductive pillar is disposed in the respective through hole. The conductive pillar includes a body portion and a cap portion. The body portion is physically connected to the cap portion, and the cap portion is electrically connected to the first pad. A maximum width of the cap portion is greater than a maximum width of the body portion. The electrical device is disposed on the dielectric layer and electrically connected to the body portion of the conductive pillar.
    Type: Application
    Filed: December 16, 2016
    Publication date: June 21, 2018
    Inventor: Wen-Long LU
  • WIRING STRUCTURE, SEMICONDUCTOR PACKAGE STRUCTURE AND SEMICONDUCTOR PROCESS
    Publication number: 20180174954
    Abstract: A wiring structure includes a main body, a first dielectric layer, a first circuit layer and a second dielectric layer. The first dielectric layer is disposed on the main body, and defines a plurality of first grooves and at least one receiving portion between two first grooves. The first circuit layer is disposed on the first dielectric layer, and includes at least one first conductive trace disposed on the receiving portion. A width of the first conductive trace is less than a width of the receiving portion. A second dielectric layer disposed on the first dielectric layer, and extends into the first grooves.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 21, 2018
    Inventors: Wen-Long LU, Ching Kuo HSU
  • Semiconductor package structure and method for manufacturing the same
    Patent number: 10002849
    Abstract: A method for manufacturing a semiconductor package structure includes: (a) disposing at least one semiconductor element on a conductive structure, wherein the conductive structure includes at least one insulation layer and at least one circuit layer; (b) disposing an encapsulant on the conductive structure to cover the semiconductor element; (c) attaching a supporting structure on the conductive structure to surround the semiconductor element; and (d) disposing an upper element on the encapsulant, wherein a coefficient of thermal expansion of the upper element is in a range of variation less than or equal to about ±20% of a coefficient of thermal expansion of the circuit layer, and a bending modulus of the upper element is in a range of variation less than or equal to about ±35% of a bending modulus of the circuit layer.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: June 19, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • SERVER
    Publication number: 20180168067
    Abstract: A server includes a motherboard, a base, a back plate, a hard disk and a fan module. The base is fixed on the motherboard. The back plate is placed upright on the base. The back plate and the base jointly form a fan accommodating space and a hard disk accommodating space. The back plate has a first side face and a second side face. The first side face faces the fan accommodating space. The second side face faces the hard disk accommodating space. The back plate is electrically connected to the motherboard. The hard disk is located in the hard disk accommodating space and electrically connected to the back plate. The fan module is located in the fan accommodating space and electrically connected to the back plate. The fan module is electrically connected to the motherboard via the back plate.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 14, 2018
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Ping-Wei PENG, Wen-Long HUANG
  • Server
    Patent number: 9999153
    Abstract: A server includes a motherboard, a base, a back plate, a hard disk and a fan module. The base is fixed on the motherboard. The back plate is placed upright on the base. The back plate and the base jointly form a fan accommodating space and a hard disk accommodating space. The back plate has a first side face and a second side face. The first side face faces the fan accommodating space. The second side face faces the hard disk accommodating space. The back plate is electrically connected to the motherboard. The hard disk is located in the hard disk accommodating space and electrically connected to the back plate. The fan module is located in the fan accommodating space and electrically connected to the back plate. The fan module is electrically connected to the motherboard via the back plate.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: June 12, 2018
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Ping-Wei Peng, Wen-Long Huang
  • SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20180138115
    Abstract: A semiconductor package structure includes a dielectric structure defining a plurality of through holes, wherein each of the through holes includes a first portion defined by a first sidewall portion and a second portion defined by a second sidewall portion substantially coplanar with the first sidewall portion.
    Type: Application
    Filed: November 11, 2016
    Publication date: May 17, 2018
    Inventor: Wen-Long LU
  • SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20180122750
    Abstract: Various embodiments relate to a semiconductor package structure. The semiconductor package structure includes a first chip having a first surface and a second surface opposite the first surface. The semiconductor package structure further includes a supporter surrounding an edge of the first chip, and the supporter includes a recessed portion. The semiconductor package structure further includes a conductive layer disposed over the first surface of the first chip and electrically connected to the first chip. The semiconductor package structure further includes an insulation layer disposed over the first surface of the first chip. The semiconductor package structure further includes an encapsulant between the first chip and the supporter and surrounding at least the edge of the first chip.
    Type: Application
    Filed: October 24, 2017
    Publication date: May 3, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • SERVER
    Publication number: 20180124947
    Abstract: A server includes a casing, a fan module, at least two processor holders and an air baffle. The casing has an accommodating space. The fan module is located in the accommodating space. The processor holders are located in the accommodating space. The air baffle includes a base and an airflow guiding member. The airflow guiding member is pivoted on the base. The airflow guiding member is shiftable among a plurality of air guiding positions. A processor module is mounted on one of the processor holders, and the base is mounted on the other processor holder. The airflow guiding member is at one of the air guiding positions in order to guide airflow from an air outlet side of the fan module.
    Type: Application
    Filed: February 16, 2017
    Publication date: May 3, 2018
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Ping-Wei PENG, Wen-Long HUANG
  • Server
    Patent number: 9961796
    Abstract: A server includes a casing, a fan module, at least two processor holders and an air baffle. The casing has an accommodating space. The fan module is located in the accommodating space. The processor holders are located in the accommodating space. The air baffle includes a base and an airflow guiding member. The airflow guiding member is pivoted on the base. The airflow guiding member is shiftable among a plurality of air guiding positions. A processor module is mounted on one of the processor holders, and the base is mounted on the other processor holder. The airflow guiding member is at one of the air guiding positions in order to guide airflow from an air outlet side of the fan module.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: May 1, 2018
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Ping-Wei Peng, Wen-Long Huang
  • SEMICONDUCTOR PACKAGE, INTERPOSER AND SEMICONDUCTOR PROCESS FOR MANUFACTURING THE SAME
    Publication number: 20180108634
    Abstract: A semiconductor package includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first main body, at least one first columnar portion and at least one first conductive layer. The first columnar portion protrudes from a bottom surface of the first main body. The first conductive layer is disposed on a side surface of the first columnar portion. The second semiconductor device includes a second main body, at least one second columnar portion and at least one second conductive layer. The second columnar portion protrudes from a top surface of the second main body. The second conductive layer is disposed on a side surface of the second columnar portion. The first conductive layer is electrically coupled to the second conductive layer.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 19, 2018
    Inventors: Wen-Long LU, Yuan-Feng Chiang, Chi-Chang Lee, Chung-Hsi Wu
  • Semiconductor package, interposer and semiconductor process for manufacturing the same
    Patent number: 9947635
    Abstract: A semiconductor package includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first main body, at least one first columnar portion and at least one first conductive layer. The first columnar portion protrudes from a bottom surface of the first main body. The first conductive layer is disposed on a side surface of the first columnar portion. The second semiconductor device includes a second main body, at least one second columnar portion and at least one second conductive layer. The second columnar portion protrudes from a top surface of the second main body. The second conductive layer is disposed on a side surface of the second columnar portion. The first conductive layer is electrically coupled to the second conductive layer.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: April 17, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wen-Long Lu, Yuan-Feng Chiang, Chi-Chang Lee, Chung-Hsi Wu
  • Fan module
    Patent number: 9938987
    Abstract: A fan module comprises a frame and at least one filling component. The frame comprises a base plate and a plurality of partition plates. A plurality of air flow channels are formed by the base plate and the plurality of partition plates. Each partition plate has a first fixing slot, a second fixing slot, a third fixing slot and a fourth fixing slot that are located at a side away from the base plate in sequence. The first fixing slot has a first width. The second fixing slot has a second width. The third fixing slot has a third width, and the fourth fixing slot has a fourth width. The filling component is filled in the air flow channels. The first width is the same as the third width. The first width, the second width and the fourth width are different from one another.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: April 10, 2018
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Wen-Long Huang
  • Adjustable nozzle for plasma deposition and a method of controlling the adjustable nozzle
    Patent number: 9941100
    Abstract: The description relates to an adjustable nozzle capable of pivoting about an axis of the nozzle and translating along the axis of the nozzle. A high density plasma chemical vapor deposition (HDP CVD) chamber houses a plurality of adjustable nozzles. A feedback control system includes a control unit coupled to the adjustable nozzle and the HDP CVD chamber to form a more uniform thickness profile of films deposited on a wafer in the HDP CVD chamber.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: April 10, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Ching Wu, Wen-Long Lee, Ding-I Liu
  • Semiconductor package structure and method for manufacturing the same
    Patent number: 9929078
    Abstract: A semiconductor package structure includes a conductive structure, at least two semiconductor elements and an encapsulant. The conductive structure has a first surface and a second surface opposite the first surface. The semiconductor elements are disposed on and electrically connected to the first surface of the conductive structure. The encapsulant covers the semiconductor elements and the first surface of the conductive structure. The encapsulant has a width ‘L’ and defines at least one notch portion. A minimum distance ‘d’ is between a bottom surface of the notch portion and the second surface of the conductive structure. The encapsulant has a Young's modulus ‘E’ and a rupture strength ‘Sr’, and L/(K×d)>E/Sr, wherein ‘K’ is a stress concentration factor with a value of greater than 1.2.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: March 27, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wen-Long Lu, Chi-Chang Lee, Wei-Min Hsiao, Yuan-Feng Chiang
  • SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20180076177
    Abstract: A method for manufacturing a semiconductor package structure includes: (a) disposing at least one semiconductor element on a conductive structure, wherein the conductive structure includes at least one insulation layer and at least one circuit layer; (b) disposing an encapsulant on the conductive structure to cover the semiconductor element; (c) attaching a supporting structure on the conductive structure to surround the semiconductor element; and (d) disposing an upper element on the encapsulant, wherein a coefficient of thermal expansion of the upper element is in a range of variation less than or equal to about ±20% of a coefficient of thermal expansion of the circuit layer, and a bending modulus of the upper element is in a range of variation less than or equal to about ±35% of a bending modulus of the circuit layer.
    Type: Application
    Filed: November 16, 2017
    Publication date: March 15, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • INTERPOSER, SEMICONDUCTOR PACKAGE STRUCTURE, AND SEMICONDUCTOR PROCESS
    Publication number: 20180076122
    Abstract: A semiconductor process includes: (a) attaching a metal layer on a carrier; (b) removing a portion of the metal layer to form a through hole and at least one metal via, wherein the at least one metal via is disposed in the through hole, and the at least one metal via is separated from a side wall of the through hole by a space; and (c) forming a redistribution layer on the metal layer, wherein the redistribution layer is electrically connected to the at least one metal via.
    Type: Application
    Filed: November 20, 2017
    Publication date: March 15, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen-Long LU, Min Lung HUANG
  • MEMORY ACCESS MODULE FOR PERFORMING MEMORY ACCESS MANAGEMENT
    Publication number: 20180012651
    Abstract: A memory access module for performing memory access management of a storage device includes a plurality of storage cells. Each storage cell has a number of possible bit(s) directly corresponding to possible states of the storage cell. The memory access module further includes: sensing means for performing a plurality of sensing operations, wherein a first sensing operation corresponds to a first sensing voltage, and each subsequent sensing operation corresponds to a sensing voltage determined according to a result of the previous sensing operation; generating means for using the plurality of sensing operations to generate a first digital value and a second digital value of a storage cell; processing means for using the first and the second digital value to obtain soft information of a same bit stored in the storage cell; and decoding means for using the soft information to perform soft decoding.
    Type: Application
    Filed: August 17, 2017
    Publication date: January 11, 2018
    Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang
  • Substrate heat treatment apparatus and heat treatment method
    Patent number: 9859137
    Abstract: A method for forming a semiconductor device structure and an apparatus for heating a semiconductor substrate are provided. The method includes spin coating a material layer over a semiconductor substrate. The method also includes heating the material layer by using a first heater above the semiconductor substrate and a second heater below the semiconductor substrate.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: January 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chun-Cha Kuo, Wen-Long Lee, Tzu-Chien Cheng, Ding-I Liu
  • Memory access module for performing sensing operations on storage cells of a storage device to obtain soft information and executing a program mode to control access to the storage device
    Patent number: 9858996
    Abstract: A memory access module for performing memory access management of a storage device including a plurality of storage cells includes: sensing means for performing a plurality of sensing operations respectively corresponding to a plurality of different sensing voltages in order to generate a first digital value and a second digital value of a storage cell; processing means for using the first digital value and the second digital value to obtain soft information of a same bit stored in the storage cell; decoding means for using the soft information to perform soft decoding; and controlling means for accessing the storage device. The controlling means includes: storage means for storing a program code; and processing means for executing a program code to control access to the storage device and manage the plurality of storage cells.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: January 2, 2018
    Assignee: Silicon Motion Inc.
    Inventors: Tsung-Chieh Yang, Hsiao-Te Chang, Wen-Long Wang