Abstract: A chip package includes a chip, an insulating layer and a conductive layer. The chip includes a substrate, an epitaxy layer, a device region and a conductive pad. The epitaxy layer is disposed on the substrate, and the device region and the conductive pad are disposed on the epitaxy layer. The conductive pad is at a side of the device region and connected to the device region. The conductive pad protrudes out of a side surface of the epitaxy layer. The insulating layer is disposed below the substrate and extended to cover the side surface of the epitaxy layer. The conductive layer is disposed below the insulating layer and extended to contact the conductive pad. The conductive layer and the side surface of the epitaxy layer are separated by a first distance.

Abstract: An interposer includes an interconnection structure and a redistribution layer. The interconnection structure includes a metal layer, at least one metal via and an isolation material. The metal layer defines at least one through hole having a side wall. The at least one metal via is disposed in the through hole. A space is defined between the at least one metal via and the side wall of the through hole, and the isolation material fills the space. The redistribution layer is disposed on a surface of the interconnection structure and is electrically connected to the metal via.

Abstract: A semiconductor package structure includes a conductive structure, a semiconductor element disposed on and electrically connected to the conductive structure, a supporting structure, an encapsulant, and a metal layer. The supporting structure is disposed on the conductive structure and surrounds the semiconductor element. The encapsulant covers the semiconductor element. The metal layer is disposed on or embedded in the encapsulant.

Abstract: An interposer includes an interconnection structure and a redistribution layer. The interconnection structure includes a metal layer, at least one metal via and an isolation material. The metal layer defines at least one through hole having a side wall. The at least one metal via is disposed in the through hole. A space is defined between the at least one metal via and the side wall of the through hole, and the isolation material fills the space. The redistribution layer is disposed on a surface of the interconnection structure and is electrically connected to the metal via.

Abstract: Various embodiments relate to a semiconductor package structure. The semiconductor package structure includes a first chip having a first surface and a second surface opposite the first surface. The semiconductor package structure further includes a supporter surrounding an edge of the first chip. The semiconductor package structure further includes a conductive layer disposed over the first surface of the first chip and electrically connected to the first chip. The semiconductor package structure further includes an insulation layer disposed over the first surface of the first chip, wherein the insulation layer extends toward and overlaps the supporter in a vertical projection direction. The semiconductor package structure further includes an encapsulant between the first chip and the supporter and surrounding at least the edge of the first chip.

Abstract: A semiconductor package structure includes a conductive structure, a semiconductor element disposed on and electrically connected to the conductive structure, a supporting structure, an encapsulant, and a metal layer. The supporting structure is disposed on the conductive structure and surrounds the semiconductor element. The encapsulant covers the semiconductor element. The metal layer is disposed on or embedded in the encapsulant.

Abstract: A novel magnetic switch, comprising a housing, a terminal A and a terminal B, wherein an inner cavity of the housing is internally provided with a magnetic body and a tongue plate, one end of the tongue plate is movably connected to the upper end of the terminal B, the magnetic body, which is integrally linked to the tongue plate, is capable of being raised thereon; the other end of the tongue plate is disposed above the terminal A; the upper end of the terminal A is provided with an arc-removing apparatus, the arc-removing apparatus is provided with a stationary contact, and the other end of the tongue plate is provided with a movable contact. The magnetic switch has an effective structure, thus improving the work stability and prolonging the service life of the switch.

Abstract: The present disclosure provides a method of making an integrated circuit. The method includes forming a gate stack on a semiconductor substrate; forming a stressed contact etch stop layer (CESL) on the gate stack and on the semiconductor substrate; forming a first dielectric material layer on the stressed CESL using a high aspect ratio process (HARP) at a deposition temperature greater than about 440 C to drive out hydroxide (OH) group; forming a second dielectric material layer on the first dielectric material layer; etching to form contact holes in the first and second dielectric material layers; filling the contact holes with a conductive material; and performing a chemical mechanical polishing (CMP) process.

Abstract: A semiconductor package structure includes a conductive structure, at least two semiconductor elements and an encapsulant. The conductive structure has a first surface and a second surface opposite the first surface. The semiconductor elements are disposed on and electrically connected to the first surface of the conductive structure. The encapsulant covers the semiconductor elements and the first surface of the conductive structure. The encapsulant has a width ‘L’ and defines at least one notch portion. A minimum distance ‘d’ is between a bottom surface of the notch portion and the second surface of the conductive structure. The encapsulant has a Young's modulus ‘E’ and a rupture strength ‘Sr’, and L/(K×d)>E/Sr, wherein ‘K’ is a stress concentration factor with a value of greater than 1.2.

Abstract: A chip package includes a chip, an insulating layer and a conductive layer. The chip includes a substrate, an epitaxy layer, a device region and a conductive pad. The epitaxy layer is disposed on the substrate, and the device region and the conductive pad are disposed on the epitaxy layer. The conductive pad is at a side of the device region and connected to the device region. The conductive pad protrudes out of a side surface of the epitaxy layer. The insulating layer is disposed below the substrate and extended to cover the side surface of the epitaxy layer. The conductive layer is disposed below the insulating layer and extended to contact the conductive pad. The conductive layer and the side surface of the epitaxy layer are separated by a first distance.

Abstract: A memory access module for performing memory access management of a storage device including a plurality of storage cells includes: sensing means for performing a plurality of sensing operations respectively corresponding to a plurality of different sensing voltages in order to generate a first digital value and a second digital value of a storage cell; processing means for using the first digital value and the second digital value to obtain soft information of a same bit stored in the storage cell; decoding means for using the soft information to perform soft decoding; and controlling means for accessing the storage device. The controlling means includes: storage means for storing a program code; and processing means for executing a program code to control access to the storage device and manage the plurality of storage cells.

Abstract: A memory access module for performing memory access management of a storage device including a plurality of storage cells includes: sensing means for performing a plurality of sensing operations respectively corresponding to a plurality of different sensing voltages in order to generate at least a first digital value of a storage cell, wherein each subsequent sensing operation corresponds to a sensing voltage which is determined according to a result of the previous sensing operation; processing means for using the first digital value to obtain soft information of a bit stored in the storage cell; and decoding means for using the soft information to perform soft decoding.

Abstract: A spraying system includes a spraying device, a toasting device, a conveyor line, and a turning device. The spraying device is configured to spray a workpiece. The toasting device is configured to toast the workpiece. The conveyor line passes through the spraying device and the toasting device and is configured to convey the workpiece. The turning device is coupled to the conveyor line and includes a first fixing frame across the conveyor line, a turning mechanism, and a blocking member. The turning mechanism includes a bearing frame detachably coupled to the conveyor line, a rotation shaft rotatably coupled to the bearing frame; a rotatable member coupled to the rotation shaft; and a positioning member coupled to the rotation shaft and configured to couple the workpiece. The blocking member is coupled to the fixing frame and configured to block the rotatable member to rotate the rotation shaft, the positioning member.

Abstract: An electronic device includes a case, a mother board disposed on the case and a fan module disposed on the case. The fan module includes a frame, adapters and a transmission assembly. The frame has an air path. The adapters are mounted on the frame. Each adapter includes a first connector and a second connector. The first connector is attached to the frame. The second connector is inserted into the frame and located within the air path. The transmission assembly includes third connectors, a fourth connector, a fifth connector and a cable set, the cable set connected to the third connectors, the fourth connector and the fifth connector. The third connectors are detachably plugged into the first connector. The fourth connector and the fifth connector are plugged into the mother board. Each fan unit has a sixth connector which is plugged into the second connector.

Abstract: An electronic device includes a case, a mother board disposed on the case and a fan module disposed on the case. The fan module includes a frame, adapters and a transmission assembly. The frame has an air path. The adapters are mounted on the frame. Each adapter includes a first connector and a second connector. The first connector is attached to the frame. The second connector is inserted into the frame and located within the air path. The transmission assembly includes third connectors, a fourth connector, a fifth connector and a cable set, the cable set connected to the third connectors, the fourth connector and the fifth connector. The third connectors are detachably plugged into the first connector. The fourth connector and the fifth connector are plugged into the mother board. Each fan unit has a sixth connector which is plugged into the second connector.

Abstract: A method for performing memory access includes: performing a plurality of sensing operations respectively corresponding to a plurality of different sensing voltages to generate a first digital value of a Flash cell of a Flash memory and a second digital value of the Flash cell of the Flash memory; using the first digital value and the second digital value to obtain soft information of a bit stored in the Flash cell; and using the soft information to perform soft decoding.

Abstract: A memory access module for performing memory access management of a storage device including a plurality of storage cells includes: sensing means for performing a plurality of sensing operations respectively corresponding to a plurality of different sensing voltages in order to generate at least a first digital value of a storage cell, wherein each subsequent sensing operation corresponds to a sensing voltage which is determined according to a result of the previous sensing operation; processing means for using the first digital value to obtain soft information of a bit stored in the storage cell; and decoding means for using the soft information to perform soft decoding.

Abstract: A fan module comprises a frame and at least one filling component. The frame comprises a base plate and a plurality of partition plates. A plurality of air flow channels are formed by the base plate and the plurality of partition plates. Each partition plate has a first fixing slot, a second fixing slot, a third fixing slot and a fourth fixing slot that are located at a side away from the base plate in sequence. The first fixing slot has a first width. The second fixing slot has a second width. The third fixing slot has a third width, and the fourth fixing slot has a fourth width. The filling component is filled in the air flow channels. The first width is the same as the third width. The first width, the second width and the fourth width are different from one another.

Abstract: A method for operating an electronic device, and an electronic device, are provided. In the normal operation state of the electronic device, data which is stored in the main storage device of the electronic device is encrypted by a first encryption algorithm prior to being stored in a non-volatile storage device of the electronic device. The method includes the steps of generating snapshot data in the main storage device when the electronic device is entering a hibernation state, allocating space in the non-volatile storage device for storing the snapshot data, and storing the snapshot data in the space without encrypting the snapshot data using the first encryption algorithm.