Patents by Inventor Wen Wu

Wen Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180033140
    Abstract: A method for detecting properties of sample tubes is provided that includes extracting image patches substantially centered on a tube slot of a tray or a tube top in a slot. For each image patch, the method may include assigning a first location group defining whether the image patch is an image center, a corner of an image or a middle edge of an image, selecting a trained classifier based on the first location group and determining whether each tube slot contains a tube. The method may also include assigning a second location group defining whether the image patch is from an image center, a left corner of the image, a right corner of the image, a left middle of the image; a center middle of the image or a right middle of the image, selecting a trained classifier based on the second location group and determining a tube property.
    Type: Application
    Filed: February 16, 2016
    Publication date: February 1, 2018
    Applicant: Siemens Healthcare Diagnostics Inc.
    Inventors: Wen Wu, Benjamin Pollack, Yao-Jen Chang, Guillaume Dumont, Terrence Chen
  • Publication number: 20180023892
    Abstract: The present invention is related to an UV LED curing apparatus, and more particularly, to an UV LED curing apparatus with improved housing and switch controller. The light reflective inner casing is preferably provided as an effective UV light reflector and as a supporting substrate of the UV LED light source while being capable of transmitting heat from the UV LED light source away for further heat dissipation to the ambient by the outer casing. The outer casing is detachably attached to the inner casing and allows a greater user interaction for decorative and entertainment purposes while also being a protective and heat dissipation means.
    Type: Application
    Filed: September 19, 2017
    Publication date: January 25, 2018
    Inventors: Danny Lee Haile, Kuo-Chang Cheng, Yu-Jen Li, Ya-Wen Wu, Pei-Chen Yang
  • Patent number: 9871009
    Abstract: A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: January 16, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Ming-Che Ho, Hung-Jui Kuo, Yi-Wen Wu, Tzung-Hui Lee
  • Publication number: 20180012807
    Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.
    Type: Application
    Filed: September 1, 2017
    Publication date: January 11, 2018
    Inventors: I-Wen WU, Hsien-Cheng Wang, Mei-Yun Wang, Shih-Wen Liu, Chao-Hsun Wang, Yun Lee
  • Patent number: 9859727
    Abstract: Embodiments of a battery charger and methods for operating same are disclosed. The charger has a plurality of charging pins, and a device to be charged may be plugged into the charger in multiple orientations. The charger detects the device's orientation and sets the states of its charging pins appropriately to charge the device. Optionally, the charger may have additional pins, likewise settable according to a device's orientation, for supplying power and/or communications to the device during charging.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: January 2, 2018
    Assignee: Adonit Co., Ltd.
    Inventors: Justin Tseng, Ben Lin, Zachary Joseph Zeliff, Yueh Hua Li, Dyson Lin, Simon Ho, Tk Kao, Wen Wu
  • Patent number: 9859242
    Abstract: A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the dielectric layer and patterned with an opening to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is then removed to expose a portion of the PPI structure. A solder bump is then formed over and electrically connected to the first portion of the PPI structure.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: January 2, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Yi-Wen Wu
  • Publication number: 20170371492
    Abstract: A software-defined sensing system capable of responding to CPU commands, including: at least one input operation sensing module; at least one driving unit for driving the at least one input operation sensing module via at least one first interface; at least one control unit for receiving at least one sensors-configuration command via at least one second interface to control the at least one driving unit; at least one central processing unit, having at least one first function library to provide at least one sensors-configuration setting function for determining the sensors-configuration command; and at least one application program having at least one sensors-configuration function call instruction for generating the sensors-configuration command to provide at least one input sensing function.
    Type: Application
    Filed: August 28, 2017
    Publication date: December 28, 2017
    Inventors: Han-Chang CHEN, Chung-Lin CHIA, Chih-Wen WU, Yen-Hung TU, Jen-Chieh CHANG
  • Publication number: 20170365564
    Abstract: A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.
    Type: Application
    Filed: June 15, 2016
    Publication date: December 21, 2017
    Inventors: Chen-Hua Yu, Ming-Che Ho, Hung-Jui Kuo, Yi-Wen Wu, Tzung-Hui Lee
  • Publication number: 20170364205
    Abstract: An intelligent hybrid touch display device, including: a touch display unit; a rotary mechanical switch, being integrated with the touch display unit in a body; and a control unit, located in the body and including: a first interface for driving the touch display unit; a second interface coupled with the rotary mechanical switch; a touch and switch detection unit coupled with the first interface and the second interface; a transmission interface for communicating with at least one external device; and a processor and an operating system stored in a memory, the processor being coupled with the touch and switch detection unit and the transmission interface, and being used for executing a control program with a support of the operating system, so that the touch display unit and the rotary mechanical switch can cooperate to provide a hybrid operation for selecting, changing or activating function options.
    Type: Application
    Filed: September 1, 2017
    Publication date: December 21, 2017
    Inventors: Jen-Chieh CHANG, Chung-Lin CHIA, Han-Chang CHEN, Yen-Hung TU, Chih-Wen WU
  • Patent number: 9837306
    Abstract: An interconnection structure includes a first dielectric layer, a bottom conductive feature present in the first dielectric layer, a second dielectric layer present on the first dielectric layer, an aluminum-containing etch stop layer present between the first dielectric layer and the second dielectric layer, an upper conductive via present at least in the second dielectric layer and electrically connected to the bottom conductive feature, and at least one aluminum-containing fragment present at least at a bottom corner of the upper conductive via.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: December 5, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Wen Wu, Shiu-Ko Jangjian, Chien-Wen Chiu, Chien-Chung Chen
  • Publication number: 20170323688
    Abstract: A method for screening bad columns applicable to a data storage medium is disclosed. The method for screening bad columns includes steps of: reading out written data of at least one of the data pages of at least one of the data blocks; comparing the written data with predetermined data to obtain a number of error bits in each of the columns in each of the segments in the at least one of the data pages, and accordingly calculating a total number of error bits in each of the segments; determining a segments having a largest total number of error bits from the segments, and determining and recording a columns having a largest number of error bits from the segment having the largest total number of error bits as a bad column. A data storage device saving a bad column summary table is also disclosed.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 9, 2017
    Inventors: Sheng-Yuan Huang, Wen-Wu Tseng
  • Publication number: 20170323853
    Abstract: An integrated fan-out package including an integrated circuit, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit includes an active surface, a plurality of sidewalls connected to the active surface, and a plurality of pads distributed on the active surface. The insulating encapsulation encapsulates the active surface and the sidewalls of the integrated circuit. The insulating encapsulation includes a plurality of first contact openings and a plurality of through holes, and the pads are exposed by the first contact openings. The redistribution circuit structure includes a redistribution conductive layer, wherein the redistribution conductive layer is disposed on the insulating encapsulation and is distributed in the first contact openings and the through holes. The redistribution conductive layer is electrically connected to the pads through the first contact openings. A method of fabricating the integrated fan-out package is also provided.
    Type: Application
    Filed: May 5, 2016
    Publication date: November 9, 2017
    Inventors: Yu-Hsiang Hu, Hung-Jui Kuo, Yi-Wen Wu
  • Patent number: 9810479
    Abstract: The present invention is related to an UV LED curing apparatus, and more particularly, to an UV LED curing apparatus with improved housing and switch controller. The light reflective inner casing is preferably provided as an effective UV light reflector and as a supporting substrate of the UV LED light source while being capable of transmitting heat from the UV LED light source away for further heat dissipation to the ambient by the outer casing. The outer casing is detachably attached to the inner casing and allows a greater user interaction for decorative and entertainment purposes while also being a protective and heat dissipation means.
    Type: Grant
    Filed: May 28, 2016
    Date of Patent: November 7, 2017
    Assignee: Nail Alliance, LLC
    Inventors: Danny Lee Haile, Kuo-Chang Cheng, Yu-Jen Li, Ya-Wen Wu, Pei-Chen Yang
  • Publication number: 20170294402
    Abstract: A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer bonds the first electrical connector to the second electrical connector.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 12, 2017
    Inventors: Zheng-Yi Lim, Yi-Wen Wu, Tzong-Hann Yang, Ming-Che Ho, Chung-Shi Liu
  • Patent number: 9787307
    Abstract: A hybrid touch button, including: a touch display unit having a touch display area; a mechanical switch having a plurality of conductive contacts; and a control unit, having a power interface for coupling with a power source, a first interface coupled with the touch display area, a second interface coupled with the plurality of conductive contacts, and an output interface, wherein the control unit derives first input information from the first interface and second input information from the second interface, and determines an output configuration of the output interface according to the first input information and the second input information.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: October 10, 2017
    Assignee: YICHENG PRECISION INC.
    Inventors: Jen-Chieh Chang, Chung-Lin Chia, Han-Chang Chen, Yen-Hung Tu, Chih-Wen Wu
  • Patent number: 9778784
    Abstract: A touch display driving circuit capable of responding to CPU commands, including: a first interface receiving touch configuration data from a CPU and outputting touch report data to the CPU; a second interface coupling with a touch display module; a control unit executing a touch detection procedure on the touch display module via the second interface to derive touch detected data, and processing the touch detected data to generate the touch report data, wherein the touch detection procedure is determined according to the touch configuration data determining a connection configuration of at least one multiplexer and a weighting configuration of at least one touch point, and the content of the touch report data include a sensed pressure profile, a finger print, a palm print, an ear image, characteristics of a finger print, characteristics of a palm print, or characteristics of an ear image.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: October 3, 2017
    Assignee: RICH IP TECHNOLOGY INC.
    Inventors: Han-Chang Chen, Chung-Lin Chia, Chih-Wen Wu, Yen-Hung Tu, Jen-Chieh Chang
  • Patent number: 9768757
    Abstract: Integrated circuits having flip-flops with asynchronous reset capabilities are provided. The flip-flops may be single event upset (SEU) hardened registers implemented using dual-interlocked cell (DICE) latch circuits. A logic gate may be inserted at the data input of each flip-flop. A multiplexer may be inserted at the input of the clock tree that is being used to feed clock signals to each of the flip-flops. Both the logic gate and the multiplexer may receive an asynchronous reset signal. The multiplexer may also receive a normal clock signal and a delayed clock pulse signal that is triggered in response to detecting assertion of the reset signal.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: September 19, 2017
    Assignee: Altera Corporation
    Inventors: Nelson Joseph Gaspard, Wen Wu, Yanzhong Xu
  • Patent number: 9754838
    Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: September 5, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: I-Wen Wu, Hsien-Cheng Wang, Mei-Yun Wang, Shih-Wen Liu, Chao-Hsun Wang, Yun Lee
  • Publication number: 20170250129
    Abstract: A method of manufacturing a packaging device may include: forming a plurality of through-substrate vias (TSVs) in a substrate, wherein each of the plurality of TSVs has a protruding portion extending away from a major surface of the substrate. A seed layer may be forming over the protruding portions of the plurality of TSVs, and a conductive ball may be coupled to the seed layer and the protruding portion of each of the plurality of TSVs. The seed layer and the protruding portion of each of the plurality of TSVs may extend into an interior region of the conductive ball.
    Type: Application
    Filed: May 16, 2017
    Publication date: August 31, 2017
    Inventors: Shih-Wei Liang, Kai-Chiang Wu, Ming-Che Ho, Yi-Wen Wu
  • Patent number: 9733753
    Abstract: A flat self-luminous touch switch, including: a self-luminous touch unit, including at least one flat self-luminous pixel and a pixel driving interface; and a switch control unit, including a first driving interface and a second driving interface, wherein, the first driving interface is coupled with the pixel driving interface to provide at least one pixel driving signal and transmit a touch detection signal; and the second driving interface provides an analog switch channel and/or at least one digital output signal according to a detection result of the touch detection signal.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: August 15, 2017
    Assignee: RICH IP TECHNOLOGY INC.
    Inventors: Han-Chang Chen, Yen-Hung Tu, Chung-Lin Chia, Chih-Wen Wu, Jen-Chieh Chang