Patents by Inventor Wen Yao

Wen Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DISPLAY SCREEN ASSEMBLY HAVING A SELECTIVELY ENGAGEABLE MOUNT ASSEMBLY
    Publication number: 20140268513
    Abstract: A display screen assembly is provided. The display screen defines a channel for allowing selective engagement of the display screen. A mount assembly is provided and includes a base for supporting the display screen assembly about a support surface, and a locking assembly that selectively engages the channel to thereby lock the mount assembly to the display screen.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Toshiba Global Commerce Solutions Holdings Corporation
    Inventors: Chiu-Jung Tsen, Zong-Han You, Cheng-Hong Chen, Wen-Yao Nien, Dean F. Herring, Jeff D. Thomas
  • System and method for improved automated semiconductor wafer manufacturing
    Patent number: 8825191
    Abstract: A method for aligning a photolithographic machine in an automated semiconductor manufacturing system is provided. The method may include identifying a maximum precision degree for a wafer and identifying a maximum overlay correction value. The method may simulate one or more algorithms to determine whether an algorithm aligns a leading lot within alignment specifications. The method may align a photolithography machine using an algorithm selected based on the simulations.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: September 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Yao Hsieh, Che-Yu Chiu, Anwei Peng, Jian-Hung Chen, Hsueh-Chen Wu
  • Mass Spectrometry
    Publication number: 20140222348
    Abstract: The present invention is concerned with methods for the de novo sequencing of polypeptides from data obtained from mass spectrometry devices, particularly from (MS)n devices.
    Type: Application
    Filed: December 30, 2013
    Publication date: August 7, 2014
    Applicant: SHIMADZU RESEARCH LABORATORY (EUROPE) LIMITED
    Inventors: MICHAEL MAY, JING WEN YAO
  • METHOD OF FORMING HIGH VOLTAGE DEVICE
    Publication number: 20140197488
    Abstract: A method of forming a device includes forming a buried well region of a first dopant type in a substrate. A well region of the first dopant type is formed over the buried well region. A first well region of a second dopant type is formed between the well region of the first dopant type and the buried well region of the first dopant type. A second well region of the second dopant type is formed in the well region of the first dopant type. An isolation structure is formed at least partially in the well region of the first dopant type. A first gate electrode is formed over the isolation structure and the second well region of the second dopant type.
    Type: Application
    Filed: March 14, 2014
    Publication date: July 17, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chang CHENG, Ruey-Hsin LIU, Chih-Wen YAO, Chia-Chin SHEN, Eric HUANG, Fu Chin YANG, Chun Lin TSAI, Chin Tuan HSIAO
  • Quasi-vertical structure for high voltage MOS device
    Patent number: 8779505
    Abstract: A semiconductor device which includes a buried layer having a first dopant type disposed in a substrate. The semiconductor device further includes a second layer having the first dopant type over the buried layer, wherein a dopant concentration of the buried layer is higher than a dopant concentration of the second layer. The semiconductor device further includes a first well of a second dopant type disposed in the second layer and a first source region of the first dopant type disposed in the first well and connected to a source contact on one side. The semiconductor device further includes a gate disposed on top of the well and the second layer and a metal electrode extending from the buried layer to a drain contact, wherein the metal electrode is insulated from the second layer and the first well by an insulation layer.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: July 15, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao, Hsiao Chin Tuan
  • Mobile phone search device and search method thereof
    Patent number: 8718597
    Abstract: A mobile phone search device and search method thereof. Firstly, utilize a portable mobile phone detector to transmit a base station signal in its transmission region, and this region covers at least one or more mobile phones. Then, when the mobile phone detects the base station signal, it can log onto a network to establish communication channel with the portable mobile phone detector, and that can assign a communication number to each of the mobile phones, for the mobile phones to communicate in voice signal or short message with the portable mobile phone detector on its own initiative. Through applications of the mobile phone search device and search method thereof, the mobile phone having its communication with the base station disrupted can be detected and communication re-established swiftly, thus locating said trapped person and raising rescue efficiency significantly.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: May 6, 2014
    Assignees: Mobitek Communication Corp., MediaTekSingapore Pte. Ltd.
    Inventors: Chiao-Yen Tai, Chang Wen Yao
  • High voltage devices and methods of forming the high voltage devices
    Patent number: 8704312
    Abstract: A high voltage (HV) device includes a well region of a first dopant type disposed in a substrate. A first well region of a second dopant type is disposed in the well region of the first dopant type. An isolation structure is at least partially disposed in the well region of the first dopant type. A first gate electrode is disposed over the isolation structure and the first well region of the second dopant type. A second well region of the second dopant type is disposed in the well region of the first dopant type. The second well region of the second dopant type is spaced from the first well region of the second dopant type. A second gate electrode is disposed between and over the first well region of the second dopant type and the second well region of the second dopant type.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: April 22, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao, Chia-Chin Shen, Eric Huang, Fu Chin Yang, Chun Lin Tsai, Hsiao-Chin Tuan
  • High Voltage Resistor
    Publication number: 20140057407
    Abstract: Provided is a semiconductor device. The semiconductor device includes a resistor and a voltage protection device. The resistor has a spiral shape. The resistor has a first portion and a second portion. The voltage protection device includes a first doped region that is electrically coupled to the first portion of the resistor. The voltage protection device includes a second doped region that is electrically coupled to the second portion of the resistor. The first and second doped regions have opposite doping polarities.
    Type: Application
    Filed: November 7, 2013
    Publication date: February 27, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao, Ru-Yi Su, Fu-Chih Yang, Chun Lin Tsai
  • Tunable voltage-controlled pseudo-resistor
    Patent number: 8659340
    Abstract: A tunable voltage-controlled pseudo-resistor structure, comprising: a symmetric PMOS transistor circuit and an auto-tuning circuit connected in series. Input of the auto-tuning circuit is connected to a central position Vf of the PMOS transistor circuit having its output Vg, with its purpose of keeping Vg?Vf at a constant value. The PMOS transistor circuit may produce body effect through various different bulk voltages. Through the auto-tuning circuit, Vg and Vf are kept constant to make current of transistor to produce compensation effect, such that regardless of Va>Vb or Va<Vb, a large resistance is maintained. Through utilizing the tunable voltage-controlled pseudo-resistor structure, constant resistance can be maintained under high input voltage, hereby reducing drifting of common-mode voltage, in achieving a superior resistance effect.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: February 25, 2014
    Assignee: National Central University
    Inventors: Muh-Tian Shiue, Kai-Wen Yao, Cihun-Siyong Gong
  • Method, system, and computer program product for determining a putative amino acid sequence
    Patent number: 8620588
    Abstract: The present invention is concerned with methods for the de novo sequencing of polypeptides from data obtained from mass spectrometry devices, particularly from (MS)n devices.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: December 31, 2013
    Assignee: Shimadzu Research Laboratory (Europe) Limited
    Inventors: Michael May, Jing Wen Yao
  • CONFIGURING PROCESS VARIANTS FOR ON-BOARDING CUSTOMERS FOR INFORMATION TECHNOLOGY (IT) OUTSOURCING
    Publication number: 20130346339
    Abstract: Systems and methods of configuring process variants for on-boarding customers for information technology (IT) outsourcing are provided. An example method includes modeling roles, responsibilities, and business context for a standard process template. The method also includes developing cause-and-effect rules affecting outcome of the standard process template. The method also includes adjusting the standard process template for process variants across different customer on-boarding scenarios.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 26, 2013
    Inventors: Wen Yao, Sujoy Basu, Jun Li, Bryan Stephenson, Sharad Singhai
  • Method and Apparatus for Forming a Semiconductor Gate
    Publication number: 20130337644
    Abstract: The present disclosure provides an apparatus and method for fabricating a semiconductor gate. The apparatus includes, a substrate having an active region and a dielectric region that forms an interface with the active region; a gate electrode located above a portion of the active region and a portion of the dielectric region; and a dielectric material disposed within the gate electrode, the dielectric material being disposed near the interface between the active region and the dielectric region. The method includes, providing a substrate having an active region and a dielectric region that forms an interface with the active region; forming a gate electrode over the substrate, the gate electrode having an opening near a region of the gate electrode that is above the interface; and filling the opening with a dielectric material.
    Type: Application
    Filed: August 16, 2013
    Publication date: December 19, 2013
    Inventors: Chen-Liang Chu, Fei-Yuh Chen, Chih-Wen Yao
  • Service providing apparatus, service consuming apparatus, and service transmitting method
    Patent number: 8611909
    Abstract: A service providing apparatus, a service consuming apparatus, and a service transmitting method are provided. The service providing apparatus is adapted to connect with the service consuming apparatus via a wireless network. Within a control channel period, the service providing apparatus schedules the services with the service consuming apparatus. Within a service channel period, the service providing apparatus provides a service resource to the service consuming apparatus according to the result of scheduling the services. If the service consuming apparatus does not send a service request signal to the service providing apparatus within the control channel period, the service consuming apparatus has to remain silent within the service control channel. By the arrangement, the problems caused from the characteristic of the link asymmetry of the wireless network can be solved.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: December 17, 2013
    Assignee: Institute for Information Industry
    Inventors: Yen-Chich Cheng, Chih-Hsun Chou, Wen-Yao Chang
  • TILT ASSEMBLY FOR USE WITH A DISPLAY SCREEN
    Publication number: 20130320177
    Abstract: A tilt assembly for a display screen is provided. The tilt assembly includes a base assembly that includes a base casing configured to engage with a proximally positioned surface and a base plate configured to cooperatively form the tilt assembly with the base casing. The base plate is configured to translate aft and fore and impart a pivot to the display screen.
    Type: Application
    Filed: May 29, 2012
    Publication date: December 5, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cheng-Hong Chen, Dean F. Herring, Brad M. Johnson, Wen-Yao Nien, William L. Talley, Chiu-Jung Tsen, Zong-Han You
  • TOTAL-SKY LIGHTNING EVENT OBSERVATION SYSTEM AND METHOD
    Publication number: 20130286203
    Abstract: A total-sky lightning event observation system and method may include a photographing device, a housing, a temperature control device, a light shielding device, a control module, a power supply module, a corona current sensor, a data acquisition device, a GPS antenna, a GPS timing module and a processing unit. The photographing device can capture total-sky digital images and transmit the images directly to the processing unit. The processing unit consecutively acquire corona current via the data acquisition device and judges whether there exists thunderstorm activity within the observed range; if there exists thunderstorm activity, the light shielding device is opened so as to enter a lightning observation mode, and the light shielding device is closed after the observation is finished so as to protect the photographing device in non-thunderstorm weather.
    Type: Application
    Filed: March 15, 2012
    Publication date: October 31, 2013
    Applicant: Chinese Academy of Meteorological Sciences
    Inventors: Weitao Lv, Ying Ma, Yang Zhang, Jun Yang, Wen Yao, Dong Zheng, Qing Meng, Yijun Zhang
  • MOBILE PHONE SEARCH DEVICE AND SEARCH METHOD THEREOF
    Publication number: 20130237180
    Abstract: A mobile phone search device and search method thereof. Firstly, utilize a portable mobile phone detector to transmit a base station signal in its transmission region, and this region covers at least one or more mobile phones. Then, when the mobile phone detects the base station signal, it can log onto a network to establish communication channel with the portable mobile phone detector, and that can assign a communication number to each of the mobile phones, for the mobile phones to communicate in voice signal or short message with the portable mobile phone detector on its own initiative. Through applications of the mobile phone search device and search method thereof, the mobile phone having its communication with the base station disrupted can be detected and communication re-established swiftly, thus locating said trapped person and raising rescue efficiency significantly.
    Type: Application
    Filed: June 15, 2012
    Publication date: September 12, 2013
    Inventors: Chiao-Yen TAI, Chang Wen Yao
  • Method and apparatus for forming a semiconductor gate
    Patent number: 8513712
    Abstract: The present disclosure provides an apparatus and method for fabricating a semiconductor gate. The apparatus includes, a substrate having an active region and a dielectric region that forms an interface with the active region; a gate electrode located above a portion of the active region and a portion of the dielectric region; and a dielectric material disposed within the gate electrode, the dielectric material being disposed near the interface between the active region and the dielectric region. The method includes, providing a substrate having an active region and a dielectric region that forms an interface with the active region; forming a gate electrode over the substrate, the gate electrode having an opening near a region of the gate electrode that is above the interface; and filling the opening with a dielectric material.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: August 20, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Liang Chu, Fei-Yuh Chen, Chih-Wen Yao
  • High voltage devices, systems, and methods for forming the high voltage devices
    Patent number: 8507988
    Abstract: A high voltage (HV) device includes a gate dielectric structure over a substrate. The gate dielectric structure has a first portion and a second portion. The first portion has a first thickness and is over a first well region of a first dopant type in the substrate. The second portion has a second thickness and is over a second well region of a second dopant type. The first thickness is larger than the second thickness. A gate electrode is disposed over the gate dielectric structure. A metallic layer is over and coupled with the gate electrode. The metallic layer extends along a direction of a channel under the gate dielectric structure. At least one source/drain (S/D) region is disposed within the first well region of the first dopant type.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: August 13, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wen Yao, Robert S. J. Pan, Ruey-Hsin Liu, Hsueh-Liang Chou, Puo-Yu Chiang, Chi-Chih Chen, Hsiao Chin Tuan
  • Semiconductor device having multi-thickness gate dielectric
    Patent number: 8461647
    Abstract: A semiconductor device is provided that, in an embodiment, is in the form of a high voltage MOS (HVMOS) device. The device includes a semiconductor substrate and a gate structure formed on the semiconductor substrate. The gate structure includes a gate dielectric which has a first portion with a first thickness and a second portion with a second thickness. The second thickness is greater than the first thickness. A gate electrode is disposed on the first and second portion. In an embodiment, a drift region underlies the second portion of the gate dielectric. A method of fabricating the same is also provided.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: June 11, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsueh-Liang Chou, Ruey-Hsin Liu, Chih-Wen Yao, Hsiao-Chin Tuan
  • System and method for improved automated semiconductor wafer manufacturing
    Patent number: 8463419
    Abstract: System and method for automated semiconductor manufacturing is provided. In accordance with one aspect of the present invention, a system for automated semiconductor wafer manufacturing includes a smart overlay control (SOC) database having empirical alignment data related to overlay alignment, and a simulation module communicatively coupled to the SOC database, the simulation module determining a simulated overlay alignment of a wafer on the plurality of photolithography tools in a tool bank based on the empirical alignment data stored in the SOC database. The system also includes a dispatch module communicatively coupled to the SOC database and the simulation module, the dispatch module controlling the dispatch of a wafer to one of a plurality of photolithography tools in a tool bank based at least in part on the simulated overlay alignment.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: June 11, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Yao Hsieh, Che-Yu Chiu, Anwei Peng, Jian-Hung Chen, Hsueh-Chen Wu