Abstract: A semiconductor memory device includes a substrate, at least one floating gate electrode, an interlayer dielectric layer, an interconnection structure, an etching stop layer, a conductive structure, and an opening. The floating gate electrode is disposed on the substrate. The interlayer dielectric layer is disposed on the floating gate electrode. The interconnection structure is disposed in the interlayer dielectric layer. The etching stop layer is disposed on the interlayer dielectric layer. The conductive structure penetrates the etching stop layer and is electrically connected with the interconnection structure. The opening penetrates the etching stop layer and overlaps at least a part of the floating gate electrode in a thickness direction of the substrate.

Abstract: The present disclosure provides antibodies and antigen-binding fragments thereof that bind specifically to a coronavirus spike protein and methods of using such antibodies and fragments for treating or preventing viral infections (e.g., coronavirus infections).

Abstract: A display control method having dynamic backlight adjusting mechanism is provided that includes the steps outlined below. A backlight control signal having a backlight period that is 1/N times of a Vsync period of a Vsync signal is generated. A first Vsync period end time after the Vsync period switches from a first period length to a second period length is calculated. A first backlight period end time after the first Vsync period end time is determined as a transition period start time. A time difference between the transition period start time and the first Vsync period end time is calculated. A transition period length between the second period length and the time difference is calculated and divided into interval lengths each equals to a third period length. The backlight control signal operated to have the third period length is generated within the transition period.

Abstract: The present disclosure provides antibodies and antigen-binding fragments thereof that bind specifically to a coronavirus spike protein and methods of using such antibodies and fragments for treating or preventing viral infections (e.g., coronavirus infections).

Abstract: Methods and apparatus are provided for eyeglass lens made using a solution casting process. The method may include providing a first soluble polymer solution. The method may include providing a first dye solution including at least one dye. The method may include adding the first dye solution to the first soluble polymer solution to form a first dyed solution. The method may include casting the first dyed solution to form a first film. The method may include providing a second soluble polymer solution. The method may include providing a second dye solution comprising at least one dye. The method may include adding the second dye solution to the second soluble polymer solution to form a second dyed solution. The method may include casting the second dyed solution onto the first film to form a two-layer film. The method may include laminating or casting the two-layer film to the eyeglass lens.

Abstract: A digital circuit robustness verification method is provided that includes the following steps. An internal storage circuit and an external storage circuit corresponding to a circuit under test are set to store a plurality of random values and a configuration of the circuit under test for performing a predetermined function is set by a processing circuit. A driving signal corresponding to the predetermined function is transmitted to the circuit under test by a previous stage circuit, such that the circuit under test executes the predetermined function to further generate an output signal. The determination as to whether the output signal is correct or not is made by a next stage circuit, and the circuit under test is determined to pass a robustness verification when the output signal is correct.

Abstract: A semiconductor memory device includes a substrate, at least one floating gate electrode, an interlayer dielectric layer, an interconnection structure, an etching stop layer, a conductive structure, and an opening. The floating gate electrode is disposed on the substrate. The interlayer dielectric layer is disposed on the floating gate electrode. The interconnection structure is disposed in the interlayer dielectric layer. The etching stop layer is disposed on the interlayer dielectric layer. The conductive structure penetrates the etching stop layer and is electrically connected with the interconnection structure. The opening penetrates the etching stop layer and overlaps at least a part of the floating gate electrode in a thickness direction of the substrate.

Abstract: An integrated circuit includes: a substrate having a resistive random-access memory area and a resistor area; a first dielectric layer and a second dielectric layer sequentially disposed on the substrate; a patterned stacked structure having a bottom conductive layer, an insulating layer and a top conductive layer stacked from bottom to top sandwiched by the first dielectric layer and the second dielectric layer; a first metal plug and a second metal plug disposed in the second dielectric layer and contacting the top conductive layer and the bottom conductive layer of the resistive random-access memory area respectively, thereby constituting a resistive random-access memory cell; and, a third metal plug and a fourth metal plug disposed in the second dielectric layer and contacting the bottom conductive layer or the top conductive layer of the resistor area, thereby constituting a resistor cell. A method of forming said integrated circuit is also provided.

Abstract: A method for depositing a metal layer on a wafer is disclosed. A PVD chamber is provide having therein a wafer chuck for holding a wafer to be processed, a target situated above the wafer chuck, a magnet positioned on a backside of the target, and a DC power supply for supplying a DC voltage to the target. The target is a metal or a metal alloy having ferromagnetism property. A paste process is performed to the PVD chamber. The paste process includes sequential steps of: admitting a working gas into the PVD chamber; and igniting the working gas in cascade stages. The wafer is then loaded into the PVD chamber and positioned onto the wafer chuck. A deposition process is then performed to deposit a metal layer sputtered from the target onto the wafer.

Abstract: A signal transmission circuit is provided. A tri-state logic circuit includes an enabling terminal, an input terminal and an output terminal, and is conducted and unconducted when the enabling terminal is at a high and a low state respectively. A pull-up circuit pulls up a voltage level of the output terminal. A first and a second multiplexers respectively output an enabling signal and an output signal to the enabling terminal and the input terminal according to a first status of a selection signal and respectively output a high state signal according to a second status of the selection signal. A selection circuit generates the selection signal having the first status when the voltage level is not larger than a first threshold value, having the second status after the voltage level is larger than the first threshold value and having the first status afterwards.

Abstract: The present invention provides a method for preparing organometallic composite material, comprising: providing PVC resin, activated calcium carbonate, plant fiber, calcium stearate, barium sulfate, paraffin, sodium bicarbonate, zinc laurate, nanometre titanium dioxide, organometallic salt, shell powder, carbon nanotube, talcum powder and stabilizer; mixing and heating; subject to first cooling after extrusion and second cooling under vacuum; towing to obtain the organometallic composite material, wherein the organometallic salt is a benzoic acid metal salt mixture. The present method can significantly reduce the processing temperature of PVC composite by 20 to 50° C., and also increase the toughness and strength of the material so as to alleviate the exudation of the composite material as in the conventional technologies and extend the lifespan of the composite material.

Abstract: A fabricating method of a transistor structure includes providing a substrate with a doped well disposed within the substrate. Later, a gate structure is formed to be disposed on the doped well. Next, a hexagonal-shaped trench is formed to be embedded in the doped well at one side of the gate structure. Subsequently, a first epitaxial layer is formed to be disposed inside the hexagonal-shaped trench and contact the hexagonal-shaped trench, wherein the first epitaxial layer includes first type dopants. Finally, a second epitaxial layer including second-type dopants is formed to be disposed in the hexagon-shaped trench, wherein the first epitaxial layer surrounds the second epitaxial layer, the second epitaxial layer serves as a source/drain doped region of the transistor structure, and the first-type dopants and the second-type dopants are different conductive types.

Abstract: A method to make dyed functional film comprising the steps of providing a soluble polymer material; adding an appropriate solvent to the polymer material to make a soluble polymer solution; providing a soluble dye; adding an appropriate solvent to the dye to make a soluble dye solution; adding the dye solution to the polymer or PVA solution, and introducing the dyed polymer or PVA solution to a solution casting device; removing a thin dyed functional film from the casting device; and letting the dyed functional film dry and solidified.

Abstract: A filtration system has a filter unit and a holder module. The filter unit has an inlet side and an outlet side being opposite each other, and has at least one filter module. The holder module has at least one holder element and two tightening assemblies. The at least one holder element fixes the at least one filter module, and the tightening assemblies are respectively mounted at the inlet side and the outlet side of the filter unit. The quantities of the filter modules of the filter unit may be increased or decreased.

Abstract: The present disclosure provides antibodies and antigen-binding fragments thereof that bind specifically to a coronavirus spike protein and methods of using such antibodies and fragments for treating or preventing viral infections (e.g., coronavirus infections).

Abstract: A method for forming a package structure is provided. The method includes forming a first die over a first substrate, and injecting a molding compound material from a first side of the first die to a second side of the first die. The molding compound material includes a plurality of first fillers, each of the first fillers has a length along a longitudinal axis and a width along a transverse direction, and the length is greater than the width. The method further includes heating the molding compound material to form a package layer over the first die, and the first fillers are substantially parallel to each other.

Abstract: A matte synthetic paper is a biaxially oriented polypropylene synthetic paper having a thickness of 25 to 300 ?m, and includes a printing surface layer as an outermost paper layer. Moreover, by adding a mist flour or a thermoplastic elastomer, the haze and gloss of the printing surface layer can be improved. According to Tappi T480, the printing surface layer having gloss of 15 to 50% is suitable to be printing paper.