Abstract: A system for measuring lens deflection of an electronic device includes a first shape, an image processing module, a first angle calculation module, and a second angle calculation module. The first shape is formed by edges of an ideal image captured that corresponds to a correctly mounted lens in the electronic device. The image processing module processes a currently captured image to acquire a second shape formed by edges of the present image. The first shape and the second shaped are imposed on each other. The first angle calculation module computes a first angle according to a rotation angle of the second shape relative to the first shape. A second angle calculation module computes a second angle according to a translating distance of the second shape relative to the first shape.

Abstract: A photoelectric connector assembly includes a first lens member connecting with fiber cables and defining convex lenses opposite to fiber cables, a connector and a substrate embedded with waveguides. The connector defines a mating cavity running through a front face thereof and inserted with said first lens member. The connector includes terminals with contacting sections exposing to the mating cavity, a second lens members. The second lens member is located at back of the first lens member and defines first convex lenses at a front face thereof and second convex lenses at a rear face thereof. The first convex lenses are coupled with the convex lens of the first lens member. The substrate defines light ports at free ends of the waveguides. The substrate is seated with the connector and the light ports are coupled with the second convex lenses of the second lens member.

Abstract: An organic light emitting device is provided. The organic light emitting device includes a first electrode layer, a second electrode layer and a light emitting material layer. The second electrode layer is disposed opposite to the first electrode layer. The light emitting material layer is disposed between the first electrode layer and the second electrode layer, and includes an organic light emitting material and an electron transport material, wherein the electron transport material includes a compound represented by a formula (1) below: in which a group A represents an aromatic ring, a is 1, and a group B represents a nitrogen containing five-membered heterocyclic group and derivatives thereof, and has at least one nitrogen atom connected to a meta-position of the group A.

Abstract: A board-level package includes a printed circuit board, a semiconductor die package mounted on the printed circuit board, a tuned mass structure, and a support structure mounted to the printed circuit board and supporting the tuned mass structure.

Abstract: An electrode head of the plasma cutting machine is provided. The electrode head comprises a sheath, a bearing means, an electrode core, a first brazing means and a second brazing means. The sheath has a first end and a second end. A first flange extends radially inward from the first end. The bearing means has a third end and a fourth end. A second flange extending from the third end is fixed to the first flange of the sheath via the first brazing means. A protrusion portion is provided axially from the interior of the fourth end. A recess portion is extending from the third end into the interior of the protrusion portion. The electrode core is fixed in the recess portion via the second brazing means.

Abstract: An antenna module includes a substrate, a main radiation structure, a strip-shaped radiation structure, a grounding structure, a shorting structure, a parasitic radiation structure and a metal radiation member. An acute angle is included between a first edge of the main radiation structure and a longitudinal edge of the substrate. The main radiation structure has a signal feeding portion and a connecting portion. The strip-shaped radiation structure is extended from a second edge of the main radiation structure. The shorting structure is U-shaped. A first end of the shorting structure is connected to the signal feeding portion and a second end of the shorting structure is connected to the grounding structure. The parasitic radiation structure is extended from the grounding structure and parallel to the first edge. A constant distance is between the parasitic radiation structure and the first edge. The metal radiation member is connected to the connecting portion.

Abstract: A method of fabricating an epitaxial layer includes providing a substrate. The substrate is etched to form at least a recess within the substrate. A surface treatment is performed on the recess to form a Si—OH containing surface. An in-situ epitaxial process is performed to form an epitaxial layer within the recess, wherein the epitaxial process is performed in a hydrogen-free atmosphere and at a temperature lower than 800° C.

Abstract: A semiconductor device includes a substrate, a first die attached to the substrate, and a lid coupled to the substrate. The lid defines a cavity for engaging the first die, and the lid has a die enclosure barrier having ends extending downwardly into the cavity. The ends of the die enclosure barrier are attached to the substrate and a thermal interface material is disposed between the first die and the lid, thermally connecting the first die to the lid.

Abstract: A photoelectric connector assembly includes a first and a second connector and a photoelectric signal conversion module. The first connector defines a mating cavity, first terminals including contacting sections exposing to the mating cavity and a first light transmission module including convex lenses at a front thereof exposing to the mating cavity and first light ports at a rear thereof. The second connector includes an insulating seat and second terminals. The seat defines a rear mating end loading the second terminals and a receiving cavity opening upwards. The conversion module is inserted in the receiving cavity and includes second light ports coupled with the first light ports of the first light transmission module and conductive pads touching with the second terminal.

Abstract: A photoelectric connection assembly includes a circuit board defining conductive pads on a first surface thereof and waveguides embedded therein, an electrical connector assembled to the circuit board and a light transmission module. The electrical connector includes a seat defining a first receiving cavity for receiving the conversion module and a second receiving cavity below the first receiving cavity, a cover rotatably associated with a rear end of the seat and rotating to shield the first receiving cavity and conductive terminals loaded on the seat. The terminals include contacting portions extending in the first receiving cavity for electrical connection with the conversion module and leg portions connecting with the conductive pads. The light transmission module is received in the second receiving cavity and includes conversion module.

Abstract: An optical fiber connector includes a pair of optical fibers and a seat defining a pair of lenses at a front edge thereof and passageways aligned with the lenses respectively and receiving the optical fibers. The seat defines a pair of first apertures at a first surface thereof communicating with the passageways, and a pair of second aperture at a second surface thereof opposite to the first surface communicating with the passageways. Rear insides of the first apertures are aligned with front insides of the second apertures.

Abstract: An optical fiber connector includes a mating portion defining a coupled direction and including pairs of lenses and a pair of guiding portions. The pair of guiding portions each defines a guiding hole through a front face thereof in the coupled direction. Each guiding hole has a cross section of a polygon shape in the coupled direction and is configured with an imaginary circle perpendicular to the coupled direction.

Abstract: A system and method for providing a post-passivation opening and undercontact metallization is provided. An embodiment comprises an opening through the post-passivation which has a first dimension longer than a second dimension, wherein the first dimension is aligned perpendicular to a chip's direction of coefficient of thermal expansion mismatch. By shaping and aligning the opening through the post-passivation layer in this fashion, the post-passivation layer helps to shield the underlying layers from stresses generated from mismatches of the materials' coefficient of thermal expansion.

Abstract: A package on packaging structure provides for improved thermal conduction and mechanical strength by the introduction of a sold thermal coupler between the first and second packages. The first package has a first substrate and through vias through the first substrate. A first set of conductive elements is aligned with and coupled to the through vias of the first substrate. A solid thermal coupler is coupled to the first set of conductive elements and to a die of the second package. A second set of conductive elements is coupled to the die and a bottom substrate is coupled to the second set of conductive elements. The thermal coupler may be, e.g., an interposer, a heat spreader, or a thermal conductive layer.

Abstract: A method for processing a high-k dielectric layer includes the following steps. A semiconductor substrate is provided, and a high-k dielectric layer is formed thereon. The high-k dielectric layer has a crystalline temperature. Subsequently, a first annealing process is performed, and a process temperature of the first annealing process is substantially smaller than the crystalline temperature. A second annealing process is performed, and a process temperature of the second annealing process is substantially larger than the crystalline temperature.

Abstract: An active device array substrate and a fabricating method thereof are provided. A first patterned conductive layer including separated scan line patterns is formed on a substrate. Each scan line pattern includes a first and second scan lines adjacent to each other. Both the first and the second scan lines have first and second contacts. An open inspection on the scan line patterns is performed. Channel layers are formed on the substrate. A second patterned conductive layer including data lines interlaced with the first and second scan lines, sources and drains located above the channel layers, and connectors is formed on the substrate. The sources electrically connect the data lines correspondingly. At least one of the connectors electrically connects the first and second scan lines, so as to form a loop in each scan line pattern. Pixel electrodes electrically connected to the drains are formed.

Abstract: A ring structure for chip packaging comprises a frame portion adaptable to bond to a substrate and at least one corner portion. The frame portion surrounds a semiconductor chip and defines an inside opening, and the inside opening exposes a portion of a surface of the substrate. The at least one corner portion extends from a corner of the frame portion toward the chip, and the corner portion is free of a sharp corner.

Abstract: A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.