Abstract: A wireless earphone with incoming call vibration function that uses a DSP to produce a driving signal to drive a vibrator for warning of the incoming call. The wireless earphone has a wireless communication module receiving a remote data signal and replying a modulation signal. A DSP is coupled to the wireless communication module, an earphone and a microphone for processing digital signal. A driving circuit is coupled to the DSP for receiving a driving signal. A is vibrator coupled to the DSP for providing an intermittent or continuous warning function according to the driving signal.

Abstract: The present invention provides a wireless hands-free apparatus with a sound-absorbing function. The hands-free apparatus has improved talking quality when used with a bluetooth earphone. The hands-free apparatus has an earphone with a built-in wireless communication module therein, a membrane sound capture device for receiving the input of the sound wave and a connecting line connected between the earphone and the membrane sound capture device. The membrane sound capture device can receive the user's sound wave and propagate the sound by the wireless communication module of the earphone through the connecting line.

Abstract: A method for forming narrow trench structures. A substrate covered by a layer to be defined is provided. A plurality of oxidable first masking islands is formed on the layer to be defined. Thereafter, the first masking islands are oxidized to form an oxide layer on the sidewall and the upper surface of each first masking island. A second masking island is formed in each gap between the oxidized first masking islands. The oxide layers are subsequently removed to form narrow openings between the first and second masking islands, having a width substantially equal to the thickness of the removed oxide layer. The layer to be defined underlying the narrow openings is etched to form the narrow trench structures on the substrate. Finally, the first and second masking islands are removed.

Abstract: A USB plug with a multi-directional rotation structure, adopted for a portable electronic device, is used for mating with an electronic product having a USB port. The USB plug has a first hollow spherical housing, and a second hollow spherical housing having an internal diameter longer than an external diameter of the first hollow spherical housing for the first hollow spherical housing to be partially wrapped in the second hollow spherical housing. The first hollow spherical housing contacts and slides on the second hollow spherical housing, and adjusts a relative displacement therebetween so as to the second hollow spherical housing rotates in multiple directions. The second hollow spherical housing can be manipulated with no angular limitations, and therefore objects of orientating the USB plug in a suitable attitude and resolving an arrangement of peripheral apparatuses mating with the electronic product are achieved.

Abstract: A mobile storage device with a wireless Bluetooth module attached thereto has a memory control module connected with at least a memory for storage of digital data, an MP3 processing module connected to the memory control module and used to encode/decode a voice signal and an MP3 digital file, a detachable Bluetooth earphone module connected to the memory control module and the MP3 processing module and capable of accomplishing wireless transmission of digital data or voice signals with a remote device, and an electronic control switch connected to the MP3 processing module and the Bluetooth earphone module and also connected with at least an earphone and a microphone. Digital data or voice I/O signals transmitted by the Bluetooth earphone module or the MP3 processing module can be switched by the electronic control switch to accomplish wireless transmission function of the mobile storage device.

Abstract: A combinational portable electronic device has a first electronic device having a display panel and a second electronic device having also a display panel. The first electronic device has an accommodating groove with a first connection interface provided therein. The second electronic device has a second connection interface. The second electronic device is installed in the accommodating groove of the first electronic device with the first connection interface and the second connection interface electrically connected together. When a function operation of the second electronic device (e.g., a PDA) is performed, the displayed frame data can be sent to the first electronic device (e.g., an electronic book reader or a web-pad) for display.

Abstract: A combinational charger is used as a spare power source of a hand-held electronic device and also used for charging the hand-held electronic device in a DC way. The combinational charger comprises at least a rechargeable battery, a charging connector, a transmission interface and a switch. The charging connector is movably engaged with a power source port of the hand-held electronic device. The transmission interface is movably engaged with a connection interface of a host system to capture power via the connection interface. The switch is used to switch the rechargeable battery to the transmission interface to let a power source on the connection interface charge the rechargeable battery, or switch the rechargeable battery to the charging connector to let the rechargeable battery charge a battery of the hand-held electronic device.

Abstract: A MOSFET with a short channel structure and manufacturing processes for the same are described. The MOSFET has a substrate, a channel region, a source/drain region, a gate dielectric layer and a conductive layer. The channel region in the substrate includes a first region and a second region, in which the first region has a first threshold voltage and the second region has a second threshold voltage, respectively. The first threshold voltage is smaller than the second threshold voltage. The first threshold voltage of the first region can also be adjusted to reduce or increase effectively the resistance of the MOSFET when the MOSFET is turned on or off. Additionally, the first region has a shallower junction depth than that of the normal source/drain extension.

Abstract: The present invention provides a resistance random access memory structure, including a plurality of word lines in a substrate, a plurality of reset lines coupled to the word lines, a dielectric layer on the substrate, a plurality of memory units in the dielectric layer. Each of the memory units includes a bottom electrode, a top electrode and a resistive thin film between the top electrode and the bottom electrode. The top electrodes of the memory units in a same column are coupled to one of the reset lines and a plurality of the bit lines on the memory units. The bottom electrodes of the memory units in a same row are coupled to one of the bit lines. Because the present invention provides reset lines for Type 1R1D RRAM, it can overcome the non-erasable of the conventional Type 1R1D DRAM.

Abstract: The present invention discloses an organic ionic compound having anti-viral activity and the method for antagonizing virus in vitro by putting the compounds in contact with the virus.

Abstract: A structure and a manufacture method of a DRAM device with deep trench capacitors are described. Each capacitor has a collar oxide layer with different height for electrical isolation and leakage reduction. Further, the DRAM device has strip-type active areas to improve some optical errors and thus reduce sufficiently the contact resistance of a buried strap film of a capacitor.

Abstract: A non-volatile memory compatible with logic devices and processes are described. The non-volatile memory has a substrate, a first dielectric layer, a first gate, a second gate, a second dielectric layer, a plurality of spacers and a source/drain. A first active region and a second active region are formed on the substrate. When hot carrier effect occurs near the drain, the second dielectric layer located under the spacers is able to retain electrons so that the non-volatile memory is programmed.

Abstract: A non-volatile memory compatible with logic devices and processes is described. The non-volatile memory has a substrate, a first dielectric layer, a first gate, a second gate, a second dielectric layer, a plurality of spacers and a source/drain. A first active region and a second active region are formed on the substrate. When hot carrier effect occurs near the drain, the second dielectric layer located under the spacers is able to retain electrons so that the non-volatile memory is programmed.

Abstract: The present invention discloses a structure of a horizontal surrounding gate (HSG) flash memory cell and a method for manufacturing the same. The HSG flash memory cell of the present invention is located on a trench of an isolation region, and a channel region of the HSG flash memory cell composed of a semiconductor film is encompassed by a tunneling oxide layer, a floating gate, and a control gate in sequence. The floating gate and the control gate are also formed on the trench below the channel region. Therefore, the leakage current of the channel can be improved, and the short channel effect cannot be induced by junction depth of a source/drain. Furthermore, the coupling capacitor between the control gate and the floating gate is increased easily by increasing the depth of the trench.

Abstract: The present invention describes a method for fabricating flash memory. In accordance with the present invention, the forming of the floating gate does not require an additional photolithography step. As a result, the misalignment problem between the floating gate and the active area may be resolved. On the other hand, because of the specific floating gate structure of the present invention, high coupling capacitance between the floating gate and control gate can be achieved by recessing the shallow trench isolation more. Therefore, the method does not sacrifice the whole cell size.

Abstract: A MOSFET with a short channel structure and manufacturing processes for the same are described. The MOSFET has a substrate, a channel region, a source/drain region, a gate dielectric layer and a conductive layer. The channel region in the substrate includes a first region and a second region, in which the first region has a first threshold voltage and the second region has a second threshold voltage, respectively. The first threshold voltage is smaller than the second threshold voltage. The first threshold voltage of the first region can also be adjusted to reduce or increase effectively the resistance of the MOSFET when the MOSFET is turned on or off. Additionally, the first region has a shallower junction depth than that of the normal source/drain extension.

Abstract: A MOSFET with low leakage current and method. The MOSFET has a substrate, a channel region, a source/drain region, a gate oxide layer and a conductive layer. The channel region in the substrate has a first region and a second region. The first region has a first threshold voltage and the second region has a second threshold voltage, respectively. The second region is located between the first region and the source/drain region. The first threshold voltage is smaller than the second threshold voltage. The leakage current of the MOSFET has an appropriate reduction by increasing the second threshold voltage of the second region. Significantly, by adjusting the size and position of the second region of the channel region, both the leakage current and the drain current of the MOSFET are readily optimized.

Abstract: The present invention describes a method for fabricating flash memory. In accordance with the present invention, the formation of the floating gate does not require an additional photolithography step. As a result, the misalignment problem between the floating gate and the active area may be resolved. On the other hand, because of the specific floating gate structure of the present invention, high coupling capacitance between the floating gate and the control gate can be achieved by recessing the shallow trench isolation more. Therefore, the method does not sacrifice the whole cell size.

Abstract: The present invention discloses a method for manufacturing a flash memory cell having a horizontal surrounding gate (HSG). The flash memory cell of the present invention is formed on a trench of an isolation region, and a channel of the flash memory cell composed of a semiconductor film is encompassed and surrounded by a tunneling oxide layer, a floating gate, a dielectric layer, and a control gate in sequence. In addition, the floating gate and the control gate are also formed on the trench below the channel. Therefore, the leakage current of the channel can be reduced, and the short channel effect can be avoided. Furthermore, the coupling capacitor between the control gate and the floating gate is increased without increasing the cell size. Besides, the data can be programmed and erased by a Fowler-Nordheim (FN) tunneling effect.

Abstract: A method of manufacturing an MOSFET. A substrate is provided. A trench is formed in the substrate. A sacrificial layer is formed to fill the trench. A doped semiconductive layer is formed over the substrate. The doped semiconductive layer is patterned to form a device region, wherein the device region spans the sacrificial layer to expose a portion of the sacrificial layer. The sacrificial layer is removed. A gate dielectric layer is formed on the surface of the trench and on the top surface and the bottom surface of the device region. A conductive layer is formed on the gate dielectric layer. The conductive layer is patterned to form a horizontal surround gate surrounding the device region. A source/drain region is formed in a portion of the substrate adjacent to the device region.