Abstract: A signal converter and a method thereof are provided. The signal converter and the method are adapted for a voltage signal converting application. The signal converter and the method are adapted for converting a high voltage sine wave signal into a low voltage full wave and/or low wave signal, and improving the stability of the circuit. The signal converter is configured in an IC type, and can be integrated with other ICs, thus improving the systematic integration.

Abstract: A signal detector and a signal detection method adapted for detecting a voltage signal are provided. According to a digital signal converted from a low voltage full wave or half wave signal and/or a mains AC signal inputted thereto, the signal detector and the signal detection method is capable of detecting a voltage level, and/or a frequency, and/or a zero point, and/or a phase of the low voltage full wave or half wave signal and/or the mains AC signal inputted thereto, and determining whether the detected factor is abnormal, and is further capable of outputting interrupt signal for subsequent processing.

Abstract: The invention provides an electrolyte composition and dye-sensitized solar cell using the same. The electrolyte composition includes a diionic liquid of Formula: Z? (X—Y—X)Z?, wherein X includes ammonium, imidazolium, pyridinium or phosphonium, Y is (CH2)n, n is an integer of 1-16, Z is I, and Z? is I, PF6, BF4, N(SO2CF3), NCS or N(CN)2.

Abstract: The invention is directed to a group-III nitride vertical-rods substrate. The group-III vertical-rods substrate comprises a substrate, a buffer layer and a vertical rod layer. The buffer layer is located over the substrate. The vertical rod layer is located on the buffer layer and the vertical rod layer is comprised of a plurality of vertical rods standing on the buffer layer.

Abstract: A fabricating method of nitride semiconductor substrate is provided. First, a first substrate including a first base material, a nitride semiconductor template layer stacked on the first base material, and a first dielectric layer stacked on the nitride semiconductor template layer is provided. Then, the first dielectric layer and the nitride semiconductor template layer are patterned, and a second substrate including a second base material and a second dielectric layer stacked on the second base material is provided. Next, the nitride semiconductor template layer and the first dielectric layer of the first substrate are transferred onto the second dielectric layer of the second substrate through bonding and transferring processes, and then a nitride semiconductor thick film is grown from the nitride semiconductor template layer through an epitaxy process. After that, the nitride semiconductor thick film and the second substrate are separated.

Abstract: The present invention relates to a method of forming a nitride semiconductor substrate. This method includes steps of providing a substrate and then forming an epitaxy layer on the substrate. A patterned mask layer is formed on the epitaxy layer, wherein the patterned mask layer exposes a portion of the epitaxy layer. Next, an oxidation process is performed to oxidize the exposed epitaxy layer so as to form a plurality of dislocation blocking structures. The patterned mask layer is then removed. Further, a nitride semiconductor layer is formed on the epitaxy layer having the dislocation blocking structures.

Abstract: A power converter for compensating a maximum output power includes a power switch, a control circuit, an oscillator and a frequency modulator. The control circuit generates a PWM signal in response to the pulse signal generated by the oscillator. The frequency modulator generates a second discharge signal to the oscillator for controlling the maximum output power of the power converter. The second discharge signal is decreased for prolonging a switching period of the PWM signal under a high-line voltage of the power converter.

Abstract: A composite material substrate having patterned structure includes a substrate, a first dielectric layer, a second dielectric layer, and a nitride semiconductor material. Herein, the first dielectric layer is stacked on the substrate, the second dielectric layer is stacked on the first dielectric layer, and the nitride semiconductor material is stacked on the second dielectric layer and is characterized by a plurality of patterns thereon.

Abstract: Free radical polymerization process for preparing polymers with low polydispersity index and polymers obtained thereby. The process includes polymerizing at least one reactive monomer with at least one initiator and at least one ionic liquid (serving as solvent) to obtain polymers having a low polydispersity index of less than 1.5, wherein the reactive monomer is a nitrogen-containing monomer. In addition, the free radical polymerization processes have reaction time within 3 hours.

Abstract: A memory with a surface strap. The memory comprises a trench capacitor, a self-aligned surface strap and a MOS transistor. The trench capacitor is formed in a semiconductor substrate. The self-aligned surface strap covers an opening of the trench capacitor and a active region in the periphery thereof. One of the source/drain regions of the MOS transistor is connected to the surface strap and the other is connected to a bit line.

Abstract: A power converter for compensating a maximum output power includes a power switch, a control circuit, an oscillator and a frequency modulator. The control circuit generates a PWM signal in response to the pulse signal generated by the oscillator. The frequency modulator generates a second discharge signal to the oscillator for controlling the maximum output power of the power converter. The second discharge signal is decreased for prolonging a switching period of the PWM signal under a high-line voltage of the power converter.

Abstract: The invention provides a reading method for a memory with multiple data states by applying a plurality of reading signals to an MIM element coupled to a memory cell. The logic level of the data stored in the memory cell is determined based on the number of the reading signals required to switch the state of the MIM element from a first state to a second state.

Abstract: In an application system of a liquid crystal display, for protecting transmissions between a master terminal and a slave terminal, effects caused by an unstable power source of the slave terminal have to be reduced to a lowest degree. When the application system is reset or under normal operations with the power source having a suddenly-decreased or suddenly-unstable voltage level, the transmission between the master terminal and the slave terminal have to be terminated, and related data of the terminated transmission is temporarily stored. When the voltage of the slave terminal is confirmed to reach to a stable voltage over a predetermined duration, the transmission may be restored by the stored data.

Abstract: A multipurpose self-adjusting locking pliers and claw hammer combination is disclosed that includes a self-adjusting locking pliers unit including an upper jaw, a pivotal lower jaw, a stationary handle having a rear adjustment member, and a pivotal trigger handle having a release lever; and a hammer unit including a head downwardly projecting from the lower jaw and a claw upwardly rearward projecting from the upper jaw.

Abstract: The invention provides a reading method for a memory with multiple data states by applying a plurality of reading signals to an MIM element coupled to a memory cell. The logic level of the data stored in the memory cell is determined based on the number of the reading signals required to switch the state of the MIM element from a first state to a second state.

Abstract: The present invention relates to a method of forming a nitride semiconductor substrate. This method includes steps of providing a substrate and then forming an epitaxy layer on the substrate. A patterned mask layer is formed on the epitaxy layer, wherein the patterned mask layer exposes a portion of the epitaxy layer. Next, an oxidation process is performed to oxidize the exposed epitaxy layer so as to form a plurality of dislocation blocking structures. The patterned mask layer is then removed. Further, a nitride semiconductor layer is formed on the epitaxy layer having the dislocation blocking structures.

Abstract: A semiconductor memory device and fabrication method thereof. In a semiconductor memory device, each memory cell comprises a deep trench and a capacitor disposed on the lower portion thereof. A collar oxide layer having a first second sidewalls is disposed on the deep trench. The top of the first sidewall is at the same height as the surface of the semiconductor substrate. The top of the second sidewall is substantially equal to the top of the capacitor. The memory cell further comprises a buried conductor layer disposed on the second sidewall and the capacitor and a buried strap adjoining the buried conductive layer, and a transistor disposed on the surface of the semiconductor substrate and electrically connected to the capacitor through the buried strap and the buried conductive layer.

Abstract: A fabricating method of nitride semiconductor substrate is provided. First, a first substrate including a first base material, a nitride semiconductor template layer stacked on the first base material, and a first dielectric layer stacked on the nitride semiconductor template layer is provided. Then, the first dielectric layer and the nitride semiconductor template layer are patterned, and a second substrate including a second base material and a second dielectric layer stacked on the second base material is provided. Next, the nitride semiconductor template layer and the first dielectric layer of the first substrate are transferred onto the second dielectric layer of the second substrate through bonding and transferring processes, and then a nitride semiconductor thick film is grown from the nitride semiconductor template layer through an epitaxy process. After that, the nitride semiconductor thick film and the second substrate are separated.