Patents by Inventor Whonchee Lee

Whonchee Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6458624
    Abstract: Resistance-reducing conductive adhesives, and apparatus and methods of attaching electronic components using resistance-reducing conductive adhesives are provided. In one embodiment, a resistance-reducing conductive adhesive includes a first quantity of conductive adhesive, and a second quantity of a chelating agent combined with the conductive adhesive. The chelating agent reacts with an oxidized conductive material (e.g. alumina or aluminum ion) on a conductive lead to form soluble conductive metal-ligand complex. The chelating agent may also passivate the oxide-free conductive material by forming hydrogen bonds. The resistance of the resulting electrical connection is reduced in comparison with prior art methods of conductive adhesive coupling, providing improved signal strength, reduced power consumption, and decreased waste heat.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: October 1, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Tongbi Jiang, Whonchee Lee
  • Patent number: 6436831
    Abstract: In one aspect, the invention includes a method of forming an insulative plug within a substrate, comprising: a) forming a masking layer over the substrate, the masking layer having an opening extending therethrough to expose a portion of the underlying substrate; b) etching the exposed portion of the underlying substrate to form an opening extending into the substrate; c) forming an insulative material within the opening in the substrate, the insulative material within the opening forming an insulative plug within the substrate; d) after forming the insulative material within the opening, removing the masking layer; and e) after removing the masking layer, removing a portion of the substrate to lower an upper surface of the substrate relative to the insulative plug.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: August 20, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Pai-Hung Pan, Whonchee Lee
  • Publication number: 20020098696
    Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the method can include planarizing the microelectronic substrate with a fixed abrasive polishing pad while maintaining the pH of a planarizing liquid adjacent the polishing pad at an approximately constant level by buffering the planarizing liquid. The planarizing liquid can include ammonium hydroxide and ammonium acetate, ammonium citrate, or potassium hydrogen phthalate. In another embodiment, the planarizing liquid can have an initially high pH that has a reduced tendency to decrease during planarization. The planarizing liquid can also include agents, such as isopropyl alcohol, ammonium acetate or polyoxy ethylene ether that can increase the wetted surface area of the microelectronic substrate and/or reduce drag force imparted to the microelectronic substrate by the polishing pad.
    Type: Application
    Filed: March 19, 2002
    Publication date: July 25, 2002
    Inventors: Gundu M. Sabde, James J. Hofmann, Michael J. Joslyn, Whonchee Lee
  • Patent number: 6409936
    Abstract: A composition and method of construction and use therefor in chemical-mechanical polishing (“CMP”) of one or more substrate assemblies is described. More particularly, a polishing solution comprising etchant, abrasive particles, and surfactant and methods of mixing to form and to dispense the polishing solution are described. One or more of the etchant, abrasive particles, and/or surfactant may comprise a liquid medium. Etchant, surfactant or abrasive particles may be premixed, mixed in-situ (“point of use mixing”), or any combination thereof. The surfactant may be ionic or nonionic. In particular, a polyoxyethylene may be used, and more particularly, a polyoxyethylene ester or ether may be used.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: June 25, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Karl M. Robinson, Whonchee Lee
  • Patent number: 6399504
    Abstract: A surface having exposed doped silicon dioxide such as BPSG is cleaned with a solution that etches thermal oxide at least one-third as fast as it etches the exposed doped silicon dioxide, resulting in more thorough cleaning with less removal of the exposed doped silicon dioxide. Specific applications to formation of container capacitors are disclosed. Preferred cleaning solutions include about 46 parts ammonium fluoride, about 9.5 parts hydrogen fluoride, and about 8.5 parts ammonium hydroxide in about 100 parts water by weight; and about 670 parts ammonium fluoride and about 3 parts hydrogen fluoride in about 1000 parts water by weight. The latter solution is also useful in cleaning methods in which a refractory metal silicide is exposed to the cleaning solution such as in cleaning prior to spacer formation or prior to a gate stack contact fill, in which case about 670 parts ammonium fluoride and about 1.6 parts hydrogen fluoride in about 1000 parts water is most preferred.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: June 4, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Whonchee Lee, Richard C. Hawthorne, Li Li, Pai Hung Pan
  • Publication number: 20020060307
    Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. The mineral acid may be selected from the group including HCl, H2SO4, H3PO4, HNO3, and dilute HF (preferably the mineral acid is HCl) and the peroxide may be hydrogen peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one step process or a two step process. In the one step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide.
    Type: Application
    Filed: January 15, 2002
    Publication date: May 23, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Whonchee Lee, Yongjun Jeff Hu
  • Patent number: 6391793
    Abstract: A silicon etching method includes providing a substrate assembly including an exposed silicon region and an exposed oxide region. An etch composition including an ammonium fluoride component, an inorganic acid component, and an oxidizing agent is also provided. The etch composition has a pH in the range of about 7.0 to about 8.0. The substrate assembly is exposed to the etch composition. Exposing the substrate assembly to the etch composition may result in etching the exposed silicon region at an etching rate that is greater than about 3 times the etching rate of the exposed oxide region and/or etching the silicon region at an etch rate greater than about 9 Å/minute. The etching method may be used in forming isolation structures. Further, etch compositions for performing the desired etch are provided.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: May 21, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Whonchee Lee, Pai Pan, Terry Gilton
  • Publication number: 20020055262
    Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. The mineral acid may be selected from the group including HCl, H2SO4, H3PO4, HNO3, and dilute HF (preferably the mineral acid is HCl) and the peroxide may be hydrogen peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one step process or a two step process. In the one step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide.
    Type: Application
    Filed: November 30, 2001
    Publication date: May 9, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Whonchee Lee, Yongjun Jeff Hu
  • Patent number: 6383934
    Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the method can include planarizing the microelectronic substrate with a fixed abrasive polishing pad while maintaining the pH of a planarizing liquid adjacent the polishing pad at an approximately constant level by buffering the planarizing liquid. The planarizing liquid can include ammonium hydroxide and ammonium acetate, ammonium citrate, or potassium hydrogen phthalate. In another embodiment, the planarizing liquid can have an initially high pH that has a reduced tendency to decrease during planarization. The planarizing liquid can also include agents, such as isopropyl alcohol, ammonium acetate or polyoxy ethylene ether that can increase the wetted surface area of the microelectronic substrate and/or reduce drag force imparted to the microelectronic substrate by the polishing pad.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: May 7, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Gundu M. Sabde, James J. Hofmann, Michael J. Joslyn, Whonchee Lee
  • Publication number: 20020052126
    Abstract: A method of patterning a metal surface by electro-mechanical polishing is disclosed. A metal surface is placed in fluid communication with an abrasive surface of a pad. The two surfaces are moved relative to each other, in acidic fluid which contains abrasive particles. An electrical circuit is formed between the metal surface and abrasive pad and a current is supplied to the circuit. The patterned surface then is processed into a useful feature such as a bottom electrode for a DRAM capacitor.
    Type: Application
    Filed: November 28, 2001
    Publication date: May 2, 2002
    Inventors: Whonchee Lee, Scott Meikle
  • Publication number: 20020052121
    Abstract: A silicon etching method includes providing a substrate assembly including an exposed silicon region and an exposed oxide region. An etch composition including an ammonium fluoride component, an inorganic acid component, and an oxidizing agent is also provided. The etch composition has a pH in the range of about 7.0 to about 8.0. The substrate assembly is exposed to the etch composition. Exposing the substrate assembly to the etch composition may result in etching the exposed silicon region at an etching rate that is greater than about 3 times the etching rate of the exposed oxide region and/or etching the silicon region at an etch rate greater than about 9 Å/minute. The etching method may be used in forming isolation structures. Further, etch compositions for performing the desired etch are provided.
    Type: Application
    Filed: November 30, 2001
    Publication date: May 2, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Whonchee Lee, Pai Pan, Terry Gilton
  • Publication number: 20020030286
    Abstract: Resistance-reducing conductive adhesives, and apparatus and methods of attaching electronic components using resistance-reducing conductive adhesives are provided. In one embodiment, a resistance-reducing conductive adhesive includes a first quantity of conductive adhesive, and a second quantity of a chelating agent combined with the conductive adhesive. The chelating agent reacts with an oxidized conductive material (e.g. alumina or aluminum ion) on a conductive lead to form soluble conductive metal-ligand complex. The chelating agent may also passivate the oxide-free conductive material by forming hydrogen bonds. The resistance of the resulting electrical connection is reduced in comparison with prior art methods of conductive adhesive coupling, providing improved signal strength, reduced power consumption, and decreased waste heat.
    Type: Application
    Filed: September 4, 2001
    Publication date: March 14, 2002
    Inventors: Tongbi Jiang, Whonchee Lee
  • Publication number: 20020030287
    Abstract: Resistance-reducing conductive adhesives, and apparatus and methods of attaching electronic components using resistance-reducing conductive adhesives are provided. In one embodiment, a resistance-reducing conductive adhesive includes a first quantity of conductive adhesive, and a second quantity of a chelating agent combined with the conductive adhesive. The chelating agent reacts with an oxidized conductive material (e.g. alumina or aluminum ion) on a conductive lead to form soluble conductive metal-ligand complex. The chelating agent may also passivate the oxide-free conductive material by forming hydrogen bonds. The resistance of the resulting electrical connection is reduced in comparison with prior art methods of conductive adhesive coupling, providing improved signal strength, reduced power consumption, and decreased waste heat.
    Type: Application
    Filed: September 4, 2001
    Publication date: March 14, 2002
    Inventors: Tongbi Jiang, Whonchee Lee
  • Publication number: 20020025763
    Abstract: A method and apparatus for removing conductive material from a microelectronic substrate. In one embodiment, the method can include engaging a microelectronic substrate with a polishing surface of a polishing pad, electrically coupling a conductive material of the microelectronic substrate to a source of electrical potential, and oxidizing at least a portion of the conductive material by passing an electrical current through the conductive material from the source of electrical potential. For example, the method can include positioning first and second electrodes apart from a face surface of the microelectronic substrate and disposing an electrolytic fluid between the face surface and the electrodes with the electrodes in fluid communication with the electrolytic fluid. The method can further include removing the portion of conductive material from the microelectronic substrate by moving at least one of the microelectronic and the polishing pad relative to the other.
    Type: Application
    Filed: June 21, 2001
    Publication date: February 28, 2002
    Inventors: Whonchee Lee, Scott G. Meikle, Scott E. Moore, Trung T. Doan
  • Publication number: 20020025760
    Abstract: A method and apparatus for removing conductive material from a microelectronic substrate. In one embodiment, a support member supports a microelectronic substrate relative to a material removal medium, which can include first and second electrodes and a polishing pad. One or more electrolytes are disposed between the electrodes and the microelectronic substrate to electrically link the electrodes to the microelectronic substrate. The electrodes are then coupled to a source of varying current that electrically removes the conductive material from the substrate. The microelectronic substrate and/or the electrodes can be moved relative to each other to position the electrodes relative to a selected portion of the microelectronic substrate, and/or to polish the microelectronic substrate. The material removal medium can remove gas formed during the process from the microelectronic substrate and/or the electrodes.
    Type: Application
    Filed: June 21, 2001
    Publication date: February 28, 2002
    Inventors: Whonchee Lee, Scott G. Meikle, Scott E. Moore
  • Publication number: 20020025759
    Abstract: A microelectronic substrate and method for removing conductive material from a microelectronic substrate. In one embodiment, the microelectronic substrate includes a conductive or semiconductive material with a recess having an initially sharp corner at the surface of the conductive material. The comer can be blunted or rounded, for example, by applying a voltage to an electrode in fluid communication with an electrolytic fluid disposed adjacent to the comer. Electrical current flowing through the comer from the electrode can oxidize the conductive material at the comer, and the oxidized material can be removed with a chemical etch process.
    Type: Application
    Filed: June 21, 2001
    Publication date: February 28, 2002
    Inventors: Whonchee Lee, Scott G. Meikle, Scott E. Moore
  • Patent number: 6346750
    Abstract: Resistance-reducing conductive adhesives, and apparatus and methods of attaching electronic components using resistance-reducing conductive adhesives are provided. In one embodiment, a resistance-reducing conductive adhesive includes a first quantity of conductive adhesive, and a second quantity of a chelating agent combined with the conductive adhesive. The chelating agent reacts with an oxidized conductive material (e.g. alumina or aluminum ion) on a conductive lead to form soluble conductive metal-ligand complex. The chelating agent may also passivate the oxide-free conductive material by forming hydrogen bonds. The resistance of the resulting electrical connection is reduced in comparison with prior art methods of conductive adhesive coupling, providing improved signal strength, reduced power consumption, and decreased waste heat.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: February 12, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Tongbi Jiang, Whonchee Lee
  • Publication number: 20020001968
    Abstract: A silicon etching method includes providing a substrate assembly including an exposed silicon region and an exposed oxide region. An etch composition including an ammonium fluoride component, an inorganic acid component, and an oxidizing agent is also provided. The etch composition has a pH in the range of about 7.0 to about 8.0. The substrate assembly is exposed to the etch composition. Exposing the substrate assembly to the etch composition may result in etching the exposed silicon region at an etching rate that is greater than about 3 times the etching rate of the exposed oxide region and/or etching the silicon region at an etch rate greater than about 9 Å/minute. The etching method may be used in forming isolation structures. Further, etch compositions for performing the desired etch are provided.
    Type: Application
    Filed: August 30, 1999
    Publication date: January 3, 2002
    Inventors: WHONCHEE LEE, PAI PAN, TERRY GILTON
  • Publication number: 20010055936
    Abstract: Methods and apparatuses for planarizing microelectronic substrate assemblies on fixed-abrasive polishing pads with non-abrasive lubricating planarizing solutions. One aspect of the invention is to deposit a lubricating planarizing solution without abrasive particles onto a fixed-abrasive polishing pad having a body, a planarizing surface on the body, and a plurality of abrasive particles fixedly attached to the body at the planarizing surface. The front face of a substrate assembly is pressed against the lubricating planarizing solution and at least a portion of the fixed abrasive particles on the planarizing surface of the polishing pad. At least one of the polishing pad or the substrate assembly is then moved with respect to the other to impart relative motion therebetween. As the substrate assembly moves relative to the polishing pad, regions of the front face are separated from the abrasive particles in the polishing pad by a lubricant-additive in the lubricating planarizing solution.
    Type: Application
    Filed: July 25, 2001
    Publication date: December 27, 2001
    Inventors: Gundu M. Sabde, Whonchee Lee
  • Publication number: 20010051496
    Abstract: Methods and apparatuses for planarizing microelectronic substrate assemblies on fixed-abrasive polishing pads with non-abrasive lubricating planarizing solutions. One aspect of the invention is to deposit a lubricating planarizing solution without abrasive particles onto a fixed-abrasive polishing pad having a body, a planarizing surface on the body, and a plurality of abrasive particles fixedly attached to the body at the planarizing surface. The front face of a substrate assembly is pressed against the lubricating planarizing solution and at least a portion of the fixed abrasive particles on the planarizing surface of the polishing pad. At least one of the polishing pad or the substrate assembly is then moved with respect to the other to impart relative motion therebetween. As the substrate assembly moves relative to the polishing pad, regions of the front face are separated from the abrasive particles in the polishing pad by a lubricant-additive in the lubricating planarizing solution.
    Type: Application
    Filed: July 25, 2001
    Publication date: December 13, 2001
    Inventors: Gundu M. Sabde, Whonchee Lee