Abstract: Resistance-reducing conductive adhesives, and apparatus and methods of attaching electronic components using resistance-reducing conductive adhesives are provided. In one embodiment, a resistance-reducing conductive adhesive includes a first quantity of conductive adhesive, and a second quantity of a chelating agent combined with the conductive adhesive. The chelating agent reacts with an oxidized conductive material (e.g. alumina or aluminum ion) on a conductive lead to form soluble conductive metal-ligand complex. The chelating agent may also passivate the oxide-free conductive material by forming hydrogen bonds. The resistance of the resulting electrical connection is reduced in comparison with prior art methods of conductive adhesive coupling, providing improved signal strength, reduced power consumption, and decreased waste heat.

Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. The mineral acid may be selected from the group including HCl, H2SO4, H3PO4, HNO3, and dilute HF (preferably the mineral acid is HCl) and the peroxide may be hydrogen peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one step process or a two step process. In the one step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide.

Abstract: Capacitor structures and capacitors with edge zones that are substantially free of hemispherical grain silicon along the upper edges of the capacitor structures are disclosed. The resulting recessed hemispherical grain silicon layers reduce or prevent separation of particles from the hemispherical grain silicon layer during subsequent manufacturing processes, thereby reducing defects and increasing throughput. Also disclosed are methods of forming the capacitor structures and capacitors in which the silicon layer used to form the hemispherical grain silicon is selectively removed to provide an edge zone that is substantially free of hemispherical grain silicon.

Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one-step process or a two-step process. In the one-step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide. In the two-step process, the regions of cobalt are removed with a first solution containing a mineral acid and a peroxide and the second portions of the metal nitride layer are removed with a second solution containing a peroxide.

Abstract: Method and apparatus for chemically, mechanically and/or electrolytically removing material from microelectronic substrates. A polishing medium for removing material can include a liquid carrier, an electrolyte disposed in the liquid carrier, and abrasives disposed in the liquid carrier, with the abrasives forming up to about 1% of the polishing liquid by weight. The polishing medium can further include a chelating agent. An electrical current can be selectively applied to the microelectronic substrate via the polishing liquid, and a downforce applied to the microelectronic substrate can be selected based on the level of current applied electrolytically to the microelectronic substrate. The microelectronic substrate can undergo an electrolytic and nonelectrolytic processing on the same polishing pad, or can be moved from one polishing pad to another while being supported by a single substrate carrier.

Abstract: A method and an apparatus for electrochemically removing a metal from a substrate surface with an electrolyte and an electrode that has a surface defining a shape suitable to cause substantially uniform removal of a metal-containing surface.

Abstract: A microelectronic substrate and method for removing adjacent conductive and nonconductive materials from a microelectronic substrate. In one embodiment, the microelectronic substrate includes a substrate material (such as borophosphosilicate glass) having an aperture with a conductive material (such as platinum) disposed in the aperture and a fill material (such as phosphosilicate glass) in the aperture adjacent to the conductive material. The fill material can have a hardness of about 0.04 GPa or higher, and a microelectronics structure, such as an electrode, can be disposed in the aperture, for example, after removing the fill material from the aperture. Portions of the conductive and fill material external to the aperture can be removed by chemically-mechanically polishing the fill material, recessing the fill material inwardly from the conductive material, and electrochemically-mechanically polishing the conductive material.

Abstract: Capacitor structures and capacitors with edge zones that are substantially free of hemispherical grain silicon along the upper edges of the capacitor structures are disclosed. The resulting recessed hemispherical grain silicon layers reduce or prevent separation of particles from the hemispherical grain silicon layer during subsequent manufacturing processes, thereby reducing defects and increasing throughput. Also disclosed are methods of forming the capacitor structures and capacitors in which the silicon layer used to form the hemispherical grain silicon is selectively removed to provide an edge zone that is substantially free of hemispherical grain silicon.

Abstract: Methods and apparatuses for electrochemical-mechanical processing of microelectronic workpieces. One embodiment of an electrochemical processing apparatus in accordance with the invention comprises a workpiece holder configured to receive a microelectronic workpiece, a workpiece electrode, a first remote electrode, and a second remote electrode. The workpiece electrode is configured to contact a processing side of the workpiece when the workpiece is received in the workpiece holder. The first and second remote electrodes are spaced apart from the workpiece holder. The apparatus can also include an AC power supply, a DC power supply, and a switching assembly. The switching assembly is coupled to the workpiece electrode, the first remote electrode, the second remote electrode, the AC power supply, and the DC power supply.

Abstract: A silicon etching method includes providing a substrate assembly including an exposed silicon region and an exposed oxide region. An etch composition including an ammonium fluoride component, an inorganic acid component, and an oxidizing agent is also provided. The etch composition has a pH in the range of about 7.0 to about 8.0. The substrate assembly is exposed to the etch composition. Exposing the substrate assembly to the etch composition may result in etching the exposed silicon region at an etching rate that is greater than about 3 times the etching rate of the exposed oxide region and/or etching the silicon region at an etch rate greater than about 9 Å/minute. The etching method may be used in forming isolation structures. Further, etch compositions for performing the desired etch are provided.

Abstract: Capacitor structures and capacitors with edge zones that are substantially free of hemispherical grain silicon along the upper edges of the capacitor structures are disclosed. The resulting recessed hemispherical grain silicon layers reduce or prevent separation of particles from the hemispherical grain silicon layer during subsequent manufacturing processes, thereby reducing defects and increasing throughput. Also disclosed are methods of forming the capacitor structures and capacitors in which the silicon layer used to form the hemispherical grain silicon is selectively removed to provide an edge zone that is substantially free of hemispherical grain silicon.

Abstract: A method of patterning a metal surface by electro-mechanical polishing is described. A metal surface is placed in fluid communication with an abrasive surface of a pad. The two surfaces are moved relative to each other, in acidic fluid which contains abrasive particles. An electrical circuit is formed between the metal surface and abrasive pad and a current is supplied to the circuit. The patterned surface then is processed into a useful feature such as a bottom electrode for a DRAM capacitor.

Abstract: Methods and apparatuses for selectively removing conductive materials from a microelectronic substrate. A method in accordance with an embodiment of the invention includes positioning the microelectronic substrate proximate to and spaced apart from an electrode pair that includes a first electrode and a second electrode spaced apart from the first electrode. An electrolytic liquid can be directed through a first flow passage to an interface region between the microelectronic substrate and the electrode pair. A varying electrical signal can be passed through the electrode pair and the electrolytic liquid to remove conductive material from the microelectronic substrate. The electrolytic liquid can be removed through a second flow passage proximate to the first flow passage and the electrode pair.

Abstract: Methods and apparatuses for detecting characteristics of a microelectronic substrate. A method in accordance with an embodiment of the invention includes positioning the microelectronic substrate proximate to and spaced apart from the first and second spaced apart electrodes, contacting the microelectronic substrate with a polishing surface of a polishing medium, removing conductive material from the microelectronic substrate by moving the substrate and/or the electrodes relative to each other while passing a variable electrical signal through the electrodes and the substrate, and detecting a change in the variable electrical signal or a supplemental electrical signal passing through the microelectronic substrate. The rate at which material is removed from the microelectronic substrate can be changed based at least in part on the change in the electrical signal.

Abstract: A composition and method of construction and use therefor in chemical-mechanical polishing (“CMP”) of one or more substrate assemblies is described. More particularly, a polishing solution comprising etchant, abrasive particles, and surfactant and methods of mixing to form and to dispense the polishing solution are described. One or more of the etchant, abrasive particles, and/or surfactant may comprise a liquid medium. Etchant, surfactant or abrasive particles may be premixed, mixed in-situ (“point of use mixing”), or any combination thereof. The surfactant may be ionic or nonionic. In particular, a polyoxyethylene may be used, and more particularly, a polyoxyethylene ester or ether may be used.

Abstract: An etching method for use in integrated circuit fabrication includes providing a metal nitride layer on a substrate assembly, providing regions of cobalt silicide on first portions of the metal nitride layer, and providing regions of cobalt on second portions of the metal nitride layer. The regions of cobalt and the second portions of the metal nitride layer are removed with at least one solution including a mineral acid and a peroxide. The mineral acid may be selected from the group including HCl, H2SO4, H3PO4, HNO3, and dilute HF preferably the mineral acid is HCl) and the peroxide may be hydrogen peroxide. Further, the removal of the regions of cobalt and the second portions of the metal nitride layer may include a one step process or a two step process. In the one step process, the regions of cobalt and the second portions of the metal nitride layer are removed with a single solution including the mineral acid and the peroxide.

Abstract: Methods and apparatuses for electromechanically and/or electrochemically-mechanically removing conductive material from a microelectronic substrate. An apparatus in accordance with one embodiment includes a support member configured to releasably carry a microelectronic substrate and first and second electrodes spaced apart from each other and from the microelectronic substrate. A polishing medium is positioned between the electrodes and the support member and has a polishing surface positioned to contact the microelectronic substrate. At least a portion of the first and second electrodes can be recessed from the polishing surface. A liquid, such as an electrolytic liquid, can be provided in the recess, for example, through flow passages in the electrodes and/or the polishing medium. A variable electrical signal is passed from at least one of the electrodes, through the electrolyte and to the microelectronic substrate to remove material from the substrate.

Abstract: A method and apparatus for planarizing a microelectronic substrate. In one embodiment, the method can include planarizing the microelectronic substrate with a fixed abrasive polishing pad while maintaining the pH of a planarizing liquid adjacent the polishing pad at an approximately constant level by buffering the planarizing liquid. The planarizing liquid can include ammonium hydroxide and ammonium acetate, ammonium citrate, or potassium hydrogen phthalate. In another embodiment, the planarizing liquid can have an initially high pH that has a reduced tendency to decrease during planarization.

Abstract: A composition and method of construction and use therefor in chemical-mechanical polishing (“CMP”) of one or more substrate assemblies is described. More particularly, a polishing solution comprising etchant, abrasive particles, and surfactant and methods of mixing to form and to dispense the polishing solution are described. One or more of the etchant, abrasive particles, and/or surfactant may comprise a liquid medium. Etchant, surfactant or abrasive particles may be premixed, mixed in-situ (“point of use mixing”), or any combination thereof. The surfactant may be ionic or nonionic. In particular, a polyoxyethylene may be used, and more particularly, a polyoxyethylene ester or ether may be used.

Abstract: Methods and apparatuses for planarizing microelectronic substrate assemblies on fixed-abrasive polishing pads with non-abrasive lubricating planarizing solutions. One aspect of the invention is to deposit a lubricating planarizing solution without abrasive particles onto a fixed-abrasive polishing pad having a body, a planarizing surface on the body, and a plurality of abrasive particles fixedly attached to the body at the planarizing surface. The front face of a substrate assembly is pressed against the lubricating planarizing solution and at least a portion of the fixed abrasive particles on the planarizing surface of the polishing pad. At least one of the polishing pad or the substrate assembly is then moved with respect to the other to impart relative motion therebetween. As the substrate assembly moves relative to the polishing pad, regions of the front face are separated from the abrasive particles in the polishing pad by a lubricant-additive in the lubricating planarizing solution.