Patents by Inventor Won-Young Kim
Won-Young Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220403984Abstract: The present invention discloses a knob cap for a high-pressure tank including a first knob cap portion having a coupling groove coupled to a knob of a liner of the high-pressure tank in a lower surface, including a peripheral wing portion extending outward to be in contact with a surface of the liner to outside of a lower portion, and having a column portion in the shape of a column extending upward in a center; and a second knob cap portion integrally coupled with the first knob cap portion, having the column portion of the first knob cap portion inserted into a hollow, and including a plurality of inner grooves in the shape of a column having an upper end opened outside of the hollow and extending downward.Type: ApplicationFiled: November 18, 2020Publication date: December 22, 2022Inventors: Dae Gun KIM, Kyo Min LEE, Young Koan KO, You Jung LEE, Won Young KIM
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Publication number: 20220277181Abstract: A cable comprises: a cable core; and a cable sheath layer formed on the outside of the cable core, wherein the cable sheath layer has, on the outer surface thereof, a pattern corresponding to a binary code. A recognition rate is improved, and a problem of the productivity of the cable being reduced may be prevented by adjusting the widths of the pattern, corresponding to the binary code printed on the cable, in the vertical direction and the horizontal direction, and a plurality of patterns corresponding to the binary code printed on the cable are provided to prevent, even when the cable is buried in the ground or contacts a facility and a pattern corresponding to some binary patterns is not exposed, a pattern corresponding to the other binary patterns from being exposed and unrecognizable.Type: ApplicationFiled: July 9, 2020Publication date: September 1, 2022Inventors: Jung Ji KWON, Young Ho KIM, Jung Nyun KIM, Seok Hyun NAM, Won Young KIM, Seon U. BANG
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Patent number: 11402559Abstract: An optical filter includes a substrate and a first filter layer stacked on a first surface of the substrate. The first filter layer includes a plurality of lower refractive index layers having a refractive index of less than 3; a plurality of higher refractive index layers having a refractive index of greater than 3; and a plurality of medium refractive index layers having a refractive index of 3 or more and smaller than that of the higher refractive index layers, and one higher refractive index layer and one medium refractive index layer are interposed in at least one of regions between two lower refractive index layers.Type: GrantFiled: March 12, 2020Date of Patent: August 2, 2022Assignee: OPTRONTEC CO., LTD.Inventors: Dong Hwan Kim, Yun Sik Hwang, Won Young Kim
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Publication number: 20220199529Abstract: Disclosed is a semiconductor package including a semiconductor chip that includes a chip pad on one surface of the semiconductor chip, a redistribution pattern on the one surface of the semiconductor chip and electrically connected to the chip pad, and a photosensitive dielectric layer between the semiconductor chip and the redistribution pattern. The photosensitive dielectric layer may be in physical contact with the redistribution pattern. The redistribution pattern includes a signal redistribution pattern, a ground redistribution pattern, and a power redistribution pattern. A vertical distance between the chip pad and the signal redistribution pattern may be greater than a width of the signal redistribution pattern.Type: ApplicationFiled: August 3, 2021Publication date: June 23, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Won-Young KIM, Sunwon KANG
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Publication number: 20210396357Abstract: The present invention relates to a sealing apparatus for a high-pressure tank and a high-pressure tank comprising same, wherein the sealing apparatus comprises: a liner configured to accommodate a high-pressure fluid; a connection boss which is a metallic connector provided at an inlet of the liner and includes a first connection boss part coupled to an inner surface of the inlet and a second connection boss part coupled to an outer surface of the inlet and having a tapered shape with a relatively narrow upper side and a relatively wide lower side; and a coupling member configured to come into surface contact with an outer surface of the second connection boss part and having a tilted surface corresponding to a shape of the second connection boss part so that an inner diameter of a lower side is larger than that of an upper side.Type: ApplicationFiled: November 28, 2019Publication date: December 23, 2021Applicant: LOTTE CHEMICAL CORPORATIONInventors: You Jung Lee, Young Koan Ko, Dae Gun Kim, Won Young Kim, Tae Wook Kim
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Publication number: 20210183818Abstract: A semiconductor package includes a substrate, a master chip on the substrate, a first slave chip on a top surface of the master chip and partially exposing the top surface of the master chip, the first slave chip having a same size as the master chip and having a same storage capacity as the master chip, and a first chip connector on the exposed top surface of the master chip and coupled to the master chip and the first slave chip.Type: ApplicationFiled: February 8, 2021Publication date: June 17, 2021Inventor: Won-young KIM
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Patent number: 11037894Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a metal line layer on a semiconductor substrate, and a metal terminal on the metal line layer. The metal line layer includes metal lines, and a passivation layer having a non-planarized top surface including flat surfaces on the metal lines and a concave surface between the metal lines. The metal terminal is provided on the passivation layer. Opposite lateral surfaces of the metal terminal facing each other are provided on the flat surfaces of the passivation layer.Type: GrantFiled: July 8, 2020Date of Patent: June 15, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jinchan Ahn, Won-young Kim, Chanho Lee
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Patent number: 10985138Abstract: A semiconductor package includes a first interconnect substrate on a first redistribution substrate and having a first opening penetrating the first interconnect substrate. A first semiconductor chip is on the first redistribution substrate and the first opening of the first interconnect substrate. A second redistribution substrate is on the first interconnect substrate and the first semiconductor chip. A second interconnect substrate is on the second redistribution substrate and has a second opening penetrating the second interconnect substrate. A second semiconductor chip is on the second redistribution substrate and in the second opening of the second interconnect substrate.Type: GrantFiled: December 27, 2017Date of Patent: April 20, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: SunWon Kang, Won-young Kim
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Patent number: 10930618Abstract: A semiconductor package includes a substrate, a master chip on the substrate, a first slave chip on a top surface of the master chip and partially exposing the top surface of the master chip, the first slave chip having a same size as the master chip and having a same storage capacity as the master chip, and a first chip connector on the exposed top surface of the master chip and coupled to the master chip and the first slave chip.Type: GrantFiled: December 10, 2018Date of Patent: February 23, 2021Assignee: Samsung Electronics Co., Ltd.Inventor: Won-young Kim
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Publication number: 20200408976Abstract: An optical filter includes a substrate and a first filter layer stacked on a first surface of the substrate. The first filter layer includes a plurality of lower refractive index layers having a refractive index of less than 3; a plurality of higher refractive index layers having a refractive index of greater than 3; and a plurality of medium refractive index layers having a refractive index of 3 or more and smaller than that of the higher refractive index layers, and one higher refractive index layer and one medium refractive index layer are interposed in at least one of regions between two lower refractive index layers.Type: ApplicationFiled: March 12, 2020Publication date: December 31, 2020Inventors: Dong Hwan KIM, Yun Sik HWANG, Won Young KIM
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Patent number: 10863850Abstract: An electric cooker is configured to cook food in a pressurized state and a non-pressurized state of an inner pot, thereby improving the cooking quality and convenience of use. The electric cooker includes a main body having an inner pot configured to accommodate food and a heating unit; a lid coupled to an upper portion of the main body and opened/closed by an opening/closing unit; and a pressure switching selection unit arranged to pass through the lid and configured to switch or maintain opened/closed states to discharge internal steam from the inner pot by interworking with the opening/closing unit.Type: GrantFiled: July 27, 2018Date of Patent: December 15, 2020Assignee: CUCKOO ELECTRONICS CO., LTD.Inventors: Won Young Kim, Won Joo Kim, Seung Yun Kim, Jun Seok Oh
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Patent number: 10827870Abstract: To enable a user to cook both in a pressure state and in a non-pressure state inside the inner pot and thus improve cooking quality and ease of use, the present invention provides an electric cooker including a main body in which an inner pot for accommodating food is installed; a lid coupled to the main body to be opened or closed, in which a passthrough portion is formed; a pressure converter communicating with the passthrough portion, in which a selectively opened/closed state for discharging steam inside the inner pot is maintained; and a pressure-responsive actuators communicating with the passthrough portion and selectively opened/closed depending on a pressure level inside the inner pot in a pressure cooking mode.Type: GrantFiled: March 19, 2018Date of Patent: November 10, 2020Assignee: CUCKOO ELECTRONICS CO., LTD.Inventors: Won Young Kim, Soo Ho Son, Seung Yun Kim
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Publication number: 20200343204Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a metal line layer on a semiconductor substrate, and a metal terminal on the metal line layer. The metal line layer includes metal lines, and a passivation layer having a non-planarized top surface including flat surfaces on the metal lines and a concave surface between the metal lines. The metal terminal is provided on the passivation layer. Opposite lateral surfaces of the metal terminal facing each other are provided on the flat surfaces of the passivation layer.Type: ApplicationFiled: July 8, 2020Publication date: October 29, 2020Inventors: JINCHAN AHN, Won-young Kim, Chanho Lee
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Patent number: 10784216Abstract: Provided are a semiconductor device and a semiconductor package including the same. The semiconductor device comprises a semiconductor chip body including a first chip pad on a top surface, a passivation film disposed on the semiconductor chip body and a first redistribution layer that is disposed between the passivation film and the semiconductor chip body with an opening to expose a first chip center pad region at least partially overlapping the first chip pad, a first redistribution center pad region connected to the first chip center pad region, and a first edge pad region spaced apart from the first redistribution center pad region, through the passivation film, wherein a top surface of the first chip center pad region and a top surface of the first redistribution center pad region are not disposed on the same plane.Type: GrantFiled: April 24, 2019Date of Patent: September 22, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Young Kim, Sun-Won Kang, Jin-Chan Ahn
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Patent number: 10736457Abstract: An electric cooker is configured to cook in a pressure state and a non-pressure state of an inner pot, thereby improving the cooking quality and convenience of use.Type: GrantFiled: June 20, 2018Date of Patent: August 11, 2020Assignee: CUCKOO ELECTRONICS CO., LTD.Inventors: Won Young Kim, Seung Yun Kim, Soo Ho Son, Ho Sang Bang, Young Bae Shin
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Patent number: 10722064Abstract: An electric cooker is configured to cook in a pressure state and a non-pressure state of an inner pot, thereby improving the cooking quality and convenience of use. The electric cooker includes a main body configured to accommodate an inner pot; a lid coupled to an upper portion of the main body and having a handle portion provided at one side of an upper portion of the lid to interwork with an inner pot locking unit configured to lock the inner pot; a pressure switching unit arranged to pass through the lid and configured to switch or maintain an opened or closed state to discharge internal steam from the inner pot according to a rotation of the handle portion; and a pressure-responsive operating unit which is selectively opened or closed according to a pressure inside the inner pot in a pressure cooking mode in which the pressure switching unit is closed.Type: GrantFiled: June 20, 2018Date of Patent: July 28, 2020Assignee: CUCKOO ELECTRONICS CO., LTD.Inventors: WON YOUNG KIM, SEUNG YUN KIM, SOO HO SON, HO SANG BANG, YOUNG BAE SHIN
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Patent number: 10714438Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a metal line layer on a semiconductor substrate, and a metal terminal on the metal line layer. The metal line layer includes metal lines, and a passivation layer having a non-planarized top surface including flat surfaces on the metal lines and a concave surface between the metal lines. The metal terminal is provided on the passivation layer. Opposite lateral surfaces of the metal terminal facing each other are provided on the flat surfaces of the passivation layer.Type: GrantFiled: October 4, 2018Date of Patent: July 14, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jinchan Ahn, Won-young Kim, Chanho Lee
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Patent number: 10679956Abstract: A semiconductor memory chip includes an upper data pad region, a lower data pad region, and an additional pad region. Upper data pads, upper data strobe signal pair pads, and an upper data mask signal pad are arranged in the upper data pad region. Lower data pads, lower data strobe signal pair pads, and a lower data mask signal pad are arranged in the lower data pad region adjacent to and below the upper data pad region. An inverted termination data strobe signal pad used for a second semiconductor memory package and internally connected to the upper data mask signal pad, which is used for a first semiconductor memory package, is arranged in the additional pad region adjacent to and above the upper data pad region.Type: GrantFiled: March 11, 2019Date of Patent: June 9, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyoung Soo Kim, Won Young Kim, Sun Won Kang
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Patent number: 10667640Abstract: An electric cooker is configured to cook in a pressure state and a non-pressure state of an inner pot, thereby improving the cooking quality and convenience of use. The electric cooker includes a main body configured to accommodate an inner pot; a lid coupled to an upper portion of the main body and having a handle portion provided at one side of an upper portion of the lid to interwork with an inner pot locking unit configured to lock the inner pot; a pressure switching unit arranged to pass through the lid and configured to switch or maintain an opened or closed state to discharge internal steam from the inner pot according to a rotation of the handle portion; and a pressure-responsive operating unit which is selectively opened or closed according to a pressure inside the inner pot in a pressure cooking mode in which the pressure switching unit is closed.Type: GrantFiled: June 20, 2018Date of Patent: June 2, 2020Assignee: CUCKOO ELECTRONICS CO., LTD.Inventors: WON YOUNG KIM, SEUNG YUN KIM, SOO HO SON, HO SANG BANG, YOUNG BAE SHIN
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Patent number: 10622231Abstract: A method of manufacturing a semiconductor package includes obtaining a plurality of individual chips classified according to a test bin item as a result of performing an electrical die sorting (EDS) process including testing electrical characteristics of a plurality of chips at a wafer level, packaging the individual chips on corresponding chip mounting regions of a circuit substrate and forming a plurality of individual packages based on position information of the chip mounting regions, each of the individual packages having test bin item information corresponding to the test bin item, classifying the plurality of individual packages according to the test bin item based on the test bin item information, and testing the individual packages classified according to the test bin item.Type: GrantFiled: September 25, 2018Date of Patent: April 14, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jin-chan Ahn, Won-young Kim, Kyung-seon Hwang