Patents by Inventor Wu-Der Yang

Wu-Der Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240014165
    Abstract: A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, an electronic component, a bonding wire, and a fixing feature. The electronic component is disposed on the substrate. The bonding wire includes a first terminal connected to the electronic component and a second terminal connected to the substrate. The fixing feature is disposed on the substrate. The bonding wire is at least partially disposed on the fixing feature.
    Type: Application
    Filed: July 8, 2022
    Publication date: January 11, 2024
    Inventor: WU-DER YANG
  • Publication number: 20240014168
    Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a substrate. The method also includes attaching an electronic component to the substrate. The method further includes attaching a fixing feature to an upper surface of the electronic component. In addition, the method includes forming a bonding wire connecting the substrate and the electronic component. The bonding wire is at least partially disposed on the fixing feature.
    Type: Application
    Filed: July 8, 2022
    Publication date: January 11, 2024
    Inventor: Wu-Der YANG
  • Publication number: 20240013845
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first gate structure extending along a first direction and electrically connected to a first transistor, a second gate structure extending along the first direction and electrically connected to a second transistor, a first active region extending along a second direction different from the first direction and across the first gate structure and the second gate structure, and a first conductive element extending along the second direction and disposed on the first active region. The first conductive element is electrically connected to the first active region. The first conductive element is electrically connected to the first active region, such that a short circuit between the first active region and the third transistor is formed. The first gate structure and the first active region form a first fuse element, and the second gate structure and the first active region form a second fuse element.
    Type: Application
    Filed: July 7, 2022
    Publication date: January 11, 2024
    Inventor: WU-DER YANG
  • Publication number: 20230395558
    Abstract: A semiconductor device includes a substrate; an electronic component disposed on the substrate; a bonding wire comprising a first terminal connected to the electronic component and a second terminal connected to the substrate; and a supporter disposed between the first terminal and the second terminal of the bonding wire.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Inventor: Wu-Der YANG
  • Publication number: 20230395557
    Abstract: A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, an electronic component, a bonding wire, and a supporter. The electronic component is disposed on the substrate. The bonding wire includes a first terminal connected to the electronic component and a second terminal connected to the substrate. The bonding wire is disposed against the supporter.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Inventor: WU-DER YANG
  • Patent number: 11828797
    Abstract: A probing device includes a probe station. The probe station has a platform having an opening and a plurality of column members supporting the platform. Each of the plurality of column members has one end connected with the platform and an opposite end connected with a moving part. The probing device also includes a manipulator on the platform and a socket configured to support a DUT. The manipulator has a probe. The moving part is configured to allow the probe station to be moved with respect to the DUT.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: November 28, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wu-Der Yang
  • Publication number: 20230369306
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes providing a substrate having a lower surface and an upper surface opposite to the lower surface; forming an opening extending between the upper surface and the lower surface of the substrate; attaching a first electronic component to the upper surface of the substrate, wherein an active surface of the first electronic component faces the upper surface of the substrate; attaching a second electronic component to the first electronic component, wherein an active surface of the second electronic component faces the upper surface of the substrate; and forming a bonding wire on the substrate, wherein the bonding wire passes through the opening of the substrate and electrically connects the substrate and one of the first electronic component or the second electronic component.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230366910
    Abstract: A testing device and a method for testing a semiconductor device are provided. The testing device includes a socket having a cavity for accommodating a device under test (DUT), and a cover disposed on the socket. The socket includes a thermal conductive material. The cover includes a plate, a circuit board attached to the plate, and an opening penetrating the plate and the circuit board, exposing the cavity of the socket.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230366926
    Abstract: A probe apparatus for testing a semiconductor device is provided. The testing device includes a socket having a cavity for accommodating a device under test (DUT), and a cover disposed on the socket. The socket includes a thermal conductive material. The cover includes a plate, a circuit board attached to the plate, and an opening penetrating the plate and the circuit board, exposing the cavity of the socket.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230369280
    Abstract: A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, a first electronic component, a second electronic component, a bonding wire, and an encapsulant. The substrate has a lower surface and an upper surface opposite to the lower surface. The first electronic component is disposed on the upper surface of the substrate. The bonding wire electrically connects the first electronic component and the substrate and extends within the substrate. The second electronic component is disposed on the upper surface of the substrate. The second electronic component has an active surface facing the substrate. The encapsulant is disposed on the upper surface of the substrate. The encapsulant extends within the substrate and encapsulates the bonding wire.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230368822
    Abstract: A data receiving circuit is provided. The data receiving circuit includes a data input circuit, a latch circuit, and an equalizer. The data input circuit is configured to receive an input signal, and the latch circuit is connected to the data input circuit and configured to output an output signal in response to the input signal. The equalizer includes a first transistor having a source connected to latch circuit; and a second transistor having a source connected to the latch circuit and a gate connected to a gate of the first transistor.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 16, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230358802
    Abstract: A probing device includes a probe station. The probe station has a platform having an opening and a plurality of column members supporting the platform. Each of the plurality of column members has one end connected with the platform and an opposite end connected with a moving part. The probing device also includes a manipulator on the platform and a socket configured to support a DUT. The manipulator has a probe. The moving part is configured to allow the probe station to be moved with respect to the DUT.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230361073
    Abstract: A method of manufacturing a WBGA package includes providing a carrier having a first surface and a second surface opposite to the first surface of the carrier, wherein the carrier has a through hole extending between the first surface and the second surface of the carrier; disposing an electronic component on the second surface of the carrier, wherein the electronic component includes a first bonding pad and a second bonding pad; and electrically connecting the first bonding pad and the second bonding pad through a first bonding wire.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230358803
    Abstract: A probing device includes a probe station having a platform with an opening; a manipulator on the platform and having a probe; a test head; and a socket disposed on the test head and configured to support a DUT. The test head has a moving part configured to allow the DUT to be moved with respect to the probe station.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Inventor: WU-DER YANG
  • Publication number: 20230361012
    Abstract: A WBGA package and a method of manufacturing a WBGA package are provided. The WBGA package includes a carrier having a first surface and a second surface opposite to the first surface of the carrier. The carrier has a through hole filled with a first package body and extending between the first surface and the second surface of the carrier. The WBGA package also includes an electronic component disposed on the second surface of the carrier. The electronic component includes a first bonding pad and a second bonding pad. The WBGA package also includes a first bonding wire electrically connected between the first bonding pad and the second bonding pad.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Inventor: WU-DER YANG
  • Patent number: 11802910
    Abstract: A probe apparatus for testing a semiconductor device is provided. The testing device includes a socket having a cavity for accommodating a device under test (DUT), and a cover disposed on the socket. The socket includes a thermal conductive material. The cover includes a plate, a circuit board attached to the plate, and an opening penetrating the plate and the circuit board, exposing the cavity of the socket.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: October 31, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wu-Der Yang
  • Patent number: 11798602
    Abstract: A data receiving circuit is provided. The data receiving circuit includes a data input circuit, a latch circuit, and an equalizer. The data input circuit is configured to receive an input signal, and the latch circuit is connected to the data input circuit and configured to output an output signal in response to the input signal. The equalizer includes a first transistor having a source connected to latch circuit; and a second transistor having a source connected to the latch circuit and a gate connected to a gate of the first transistor.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: October 24, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wu-Der Yang
  • Patent number: 11770117
    Abstract: A data receiving circuit is provided. The data receiving circuit includes a data input circuit, a latch circuit, and a current source. The data input circuit is configured to receive an input signal. The latch circuit is configured to output an output signal in response to the input signal. The current source is configured to provide a current to the latch circuit. The current source is different from the data input circuit.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: September 26, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wu-Der Yang
  • Patent number: 11769562
    Abstract: The present application discloses an electronic fuse control circuit, a semiconductor device and a method for forming a semiconductor device including an electronic fuse control circuit. The electronic fuse control circuit includes a program voltage pad, a fuse element, a latch, an operation switch unit, resistor selection pads, and bonding option units. The fuse element includes a first terminal coupled to the program voltage pad, and a second terminal. The operation switch unit forms an electrical connection between the second terminal of the fuse element and a ground terminal during a program operation, and forms an electrical connection between the second terminal of the fuse element and an input terminal of the latch during a read operation. Each of the bonding option units includes a resistor and a selection switch coupled in series between the input terminal of the latch and a resistor selection pad.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: September 26, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wu-Der Yang
  • Patent number: 11765883
    Abstract: The present application provides a method for manufacturing a semiconductor die. The method includes forming dielectric layers on a substrate; forming decoupling capacitors in the dielectric layers; forming first and second bonding pads on the dielectric layers, wherein the first bonding pads are coupled to a power supply voltage, the second bonding pads are coupled to a reference voltage, a group of the decoupling capacitors are located under one of the first bonding pads, first terminals of the group of the decoupling capacitors are electrically connected to the one of the first bonding pads, second terminals of the group of the decoupling capacitors are routed to one of the second bonding pads; and forming bond metals on the first and second bonding pads, wherein the decoupling capacitors are overlapped with the first and second bonding pads, and laterally surround portions of the dielectric layers overlapped with the bond metals.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: September 19, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wu-Der Yang