Abstract: A semiconductor device may have an active device region containing a plurality of active devices and a termination structure that surrounds the active device region. The termination structure includes a first conductive region that surrounds the active device region, an insulator region that surrounds the first conductive region, and a second conductive region that surrounds the first conductive region and the insulator region. The active device region and termination structure are formed into a semiconductor material of a first conductivity type. The first conductive region is electrically connected to a gate metal and the second conductive region is connected to a drain metal.

Abstract: The present invention is directed to a magnetic random access memory comprising a first magnetic tunnel junction (MTJ) including a first magnetic reference layer and a first magnetic free layer with a first insulating tunnel junction layer interposed therebetween; a second MTJ including a second magnetic reference layer and a second magnetic free layer with a second insulating tunnel junction layer interposed therebetween; and an anti-ferromagnetic coupling layer formed between the first and second variable magnetic free layers. The first and second magnetic free layers have a first and second magnetization directions, respectively, that are perpendicular to the layer planes thereof. The first magnetic reference layer has a first pseudo-fixed magnetization direction substantially perpendicular to the layer plane thereof.

Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which includes one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic

Abstract: The present invention is directed to an MRAM device comprising a plurality of MTJ memory elements. Each of the memory elements includes a magnetic free layer and a first magnetic reference layer with an insulating tunnel junction layer interposed therebetween; a second magnetic reference layer formed adjacent to the first magnetic reference layer opposite the insulating tunnel junction layer; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the first magnetic reference layer; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The magnetic free layer has a variable magnetization direction substantially perpendicular to the layer plane thereof. The first and second magnetic reference layers have a first fixed magnetization direction substantially perpendicular to the layer planes thereof.

Abstract: The present invention is directed to an MRAM device comprising a plurality of MTJ memory elements. Each of the memory elements includes a magnetic free layer and a first magnetic reference layer with an insulating tunnel junction layer interposed therebetween; a second magnetic reference layer formed adjacent to the first magnetic reference layer opposite the insulating tunnel junction layer; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the first magnetic reference layer; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The magnetic free layer has a variable magnetization direction substantially perpendicular to the layer plane thereof. The first and second magnetic reference layers have a first fixed magnetization direction substantially perpendicular to the layer planes thereof.

Abstract: The present invention is directed to a magnetic random access memory element comprising a first magnetic reference layer, a first insulating tunnel junction layer, a first magnetic free layer, a first coupling layer, a second magnetic free layer, a second coupling layer, a third magnetic free layer, a second insulating tunnel junction layer, and a second magnetic reference layer formed in sequence. The first and second magnetic reference layers have respectively a first and second fixed magnetization directions that are substantially perpendicular to respective layer planes and are substantially opposite to each other. The first, second, and third magnetic free layers have respectively a first, second, and third variable magnetization directions that are substantially perpendicular to respective layer planes. The second variable magnetization direction may be parallel or anti-parallel to the first and third variable magnetization directions.

Abstract: A switch circuit includes a first MOS transistor and a second MOS transistor of a same conductivity type connected in parallel between a first terminal and a second terminal. The first and second MOS transistors have respective gate terminals coupled to the control terminal to receive a control signal to turn the switch circuit on or off where the control signal transitions from a first voltage level to a second voltage level at a slow rate of change.

Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic

Abstract: A device for producing ethoxylation derivatives includes an assistant circulation loop with lower starting quantity is added on the base of the main circulation loop, and the assistant circulation pump is started first when slight chain initial dose is added with low flow rate of the ethylene oxide and high growth rate of polyreation; when the amount of reactant gets to the starting quantity of the main circulation pump, the main circulation loop is started with high flow rate of ethylene oxide. The two circulation loops cooperate with each other shorten reaction time and high yield in one batch; a pre-reaction cavity with smaller inner diameter than that of the main body of the reactor is extended from the bottom of the main body of the device, so that lower chain initial dose can start the assistant circulation pump, and then start the assistant circulation loop.

Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.

Abstract: A semiconductor device having a plurality of transistors includes a termination area that features a transistor with an asymmetric gate.

Abstract: Various embodiments of the present invention are generally directed to an apparatus and associated method for updating data in a non-volatile memory array. In accordance with some embodiments, a memory block is formed with a plurality of types of memory cell sectors arranged in data pages of a first type and log pages of a second type that can be updated in-place. A first updated sector is written to a first log page while maintaining an outdated sector in an original data page, and overwritten with a second updated sector.

Abstract: Aspects of the present disclosure describe a termination structure for a power MOSFET device. A termination trench may be formed into a semiconductor material and may encircle an active area of the MOSFET. The termination trench may comprise a first and second portion of conductive material. The first and second portions of conductive material are electrically isolated from each other. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: Semiconductor device fabrication method and devices are disclosed. The semiconductor power device is formed on a semiconductor substrate having a plurality of trench transistor cells each having a trench gate. Each of the trench gates having a thicker bottom oxide (TBO) formed by a REOX process on a polysilicon layer deposited on a bottom surface of the trenches.

Abstract: A termination structure with multiple embedded potential spreading capacitive structures (TSMEC) and method are disclosed for terminating an adjacent trench MOSFET atop a bulk semiconductor layer (BSL) with bottom drain electrode. The BSL has a proximal bulk semiconductor wall (PBSW) supporting drain-source voltage (DSV) and separating TSMEC from trench MOSFET. The TSMEC has oxide-filled large deep trench (OFLDT) bounded by PBSW and a distal bulk semiconductor wall (DBSW). The OFLDT includes a large deep oxide trench into the BSL and embedded capacitive structures (EBCS) located inside the large deep oxide trench and between PBSW and DBSW for spatially spreading the DSV across them. In one embodiment, the EBCS contains interleaved conductive embedded polycrystalline semiconductor regions (EPSR) and oxide columns (OXC) of the OFLDT, a proximal EPSR next to PBSW is connected to an active upper source region and a distal EPSR next to DBSW is connected to the DBSW.

Abstract: This invention discloses a semiconductor power device that includes an active cell area having a plurality of power transistor cells. Each of said power transistor cells has a planar Schottky diode that includes a Schottky junction barrier metal covering areas above gaps between separated body regions between two adjacent power transistor cells. The separated body regions further provide a function of adjusting a leakage current of said Schottky diode in each of said power transistor cells. Each of the planar Schottky diodes further includes a Shannon implant region disposed in a gap between the separated body regions of two adjacent power transistor cells for further adjusting a leakage current of said Schottky diode. Each of the power transistor cells further includes heavy body doped regions in the separated body regions next to source regions surrounding said Schottky diode forming a junction barrier Schottky (JBS) pocket region.

Abstract: Devices and methods for generating a random number that utilizes a magnetic tunnel junction are disclosed. An AC current source can be in electrical connection to a magnetic tunnel junction to provide an AC current to the magnetic tunnel junction. A read circuit can be used to determine a bit based on a state of the magnetic tunnel junction. A rate of production of the bits can be adjusted, such as by adjusting a frequency or amplitude of the AC current. A probability of obtaining a “0” or “1” bit can be managed, such as by an addition of DC biasing to the AC current.

Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic

Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.

Abstract: The present invention is directed to an MTJ memory element including a magnetic free layer structure which comprises one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic