Abstract: A method for forming a high aspect ratio feature is disclosed. The method includes depositing one or more silicon oxide/silicon nitride containing stacks on a substrate by depositing a first film layer on the substrate from a first plasma and depositing a second film layer having a refractive index on the first film layer from a second plasma. A predetermined number of first film layers and second film layers are deposited on the substrate. The first film layer and the second film layer are either a silicon oxide layer or a silicon nitride layer and the first film layer is different from the second film layer. The method further includes depositing a third film layer from a third plasma and depositing a fourth film layer on the third film layer from a fourth plasma. The fourth film layer has a refractive index greater than the first refractive index.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present technology may include a method of forming a stack of semiconductor layers. The method may include depositing a first silicon oxide layer on a substrate. The method may also include depositing a first silicon layer on the first silicon oxide layer. The method may further include depositing a first silicon nitride layer on the first silicon layer. Depositing the first silicon nitride layer or a stress layer may include reducing stress in at least one of the first silicon layer, the first silicon oxide layer, or the substrate. In addition, the method may include depositing a second silicon layer on the first silicon nitride layer. The operations may form the stack of semiconductor layers, where the stack includes the first silicon oxide layer, the first silicon layer, the first silicon nitride layer, and the second silicon layer.

Abstract: Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH4) is introduced to a PECVD process to form SixGe(1-x) films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.

Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract: A method is provided for forming a stack of film layers for use in 3D memory devices. The method starts with providing a substrate in a processing chamber of a deposition reactor. Then one or more process gases suitable for forming a dielectric layer are supplied into the processing chamber of the deposition reactor forming a dielectric layer on the substrate. Then one or more process gases suitable for forming a metallic layer are supplied into the processing chamber of the deposition reactor forming a metallic layer on the dielectric layer. Then one or more process gases suitable for forming a metallic nitride adhesion layer are supplied into the processing chamber of the deposition reactor forming a metallic nitride adhesion layer on the metallic layer. The sequence is then repeated to form a desired number of layers.

Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract: In one implementation, a method comprising depositing one or more silicon oxide/silicon nitride containing stacks on a substrate positioned in a processing chamber is provided. Depositing the one or more silicon oxide/silicon nitride containing stacks comprises (a) energizing a first process gas into a first plasma, (b) depositing a first film layer over the substrate from the first plasma, (c) energizing a second process gas into a second plasma, wherein the second process gas comprises a compound having at least one silicon-nitrogen bond and (d) depositing a second film layer on the first film layer from the second plasma. The method further comprises repeating (a), (b), (c), and (d) until a predetermined number of first film layers and second film layers have been deposited on the substrate. The first film layer is a silicon oxide layer and the second film layer is a silicon nitride layer.

Abstract: Apparatus and method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract: Embodiments of the disclosure include methods for in-situ chamber cleaning efficiency enhancement process for a plasma processing chamber utilized for a semiconductor substrate fabrication process. In one embodiment, a method for performing a plasma treatment process after cleaning a plasma process includes performing a cleaning process in a plasma processing chamber in absent of a substrate disposed thereon, subsequently supplying a plasma treatment gas mixture including at least a hydrogen containing gas and/or an oxygen containing gas into the plasma processing chamber, applying a RF source power to the processing chamber to form a plasma from the plasma treatment gas mixture, and plasma treating an interior surface of the processing chamber.

Abstract: A method is provided for forming a stack of film layers for use in 3D memory devices. The method starts with providing a substrate in a processing chamber of a deposition reactor. Then one or more process gases suitable for forming a dielectric layer are supplied into the processing chamber of the deposition reactor forming a dielectric layer on the substrate. Then one or more process gases suitable for forming a metallic layer are supplied into the processing chamber of the deposition reactor forming a metallic layer on the dielectric layer. Then one or more process gases suitable for forming a metallic nitride adhesion layer are supplied into the processing chamber of the deposition reactor forming a metallic nitride adhesion layer on the metallic layer. The sequence is then repeated to form a desired number of layers.

Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract: Embodiments of the disclosure include methods for in-situ chamber cleaning efficiency enhancement process for a plasma processing chamber utilized for a semiconductor substrate fabrication process. In one embodiment, a method for performing a plasma treatment process after cleaning a plasma process includes performing a cleaning process in a plasma processing chamber in absent of a substrate disposed thereon, subsequently supplying a plasma treatment gas mixture including at least a hydrogen containing gas and/or an oxygen containing gas into the plasma processing chamber, applying a RF source power to the processing chamber to form a plasma from the plasma treatment gas mixture, and plasma treating an interior surface of the processing chamber.

Abstract: Techniques are disclosed for methods and apparatuses of an electrostatic chuck suitable for operating at high operating temperatures. In one example, a substrate support assembly is provided. The substrate support assembly includes a substantially disk-shaped ceramic body having an upper surface, a cylindrical sidewall, and a lower surface. The upper surface is configured to support a substrate thereon for processing the substrate in a vacuum processing chamber. The cylindrical sidewall defines an outer diameter of the ceramic body. The lower surface is disposed opposite the upper surface. An electrode is disposed in the ceramic body. A circuit is electrically connected to the electrode. The circuit includes a DC chucking circuit, a first RF drive circuit, and a second RF dive circuit. The DC chucking circuit, the first RF drive circuit and the second RF drive circuit are electrically coupled with the electrode.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract: Embodiments of the disclosure provide methods and system for manufacturing film layers with minimum lithographic overlay errors on a semiconductor substrate. In one embodiment, a method for forming a film layer on a substrate includes supplying a deposition gas mixture including a silicon containing gas and a reacting gas onto a substrate disposed on a substrate support in a processing chamber, forming a plasma in the presence of the depositing gas mixture in the processing chamber, applying current to a plasma profile modulator disposed in the processing chamber while supplying the depositing gas mixture into the processing chamber, and rotating the substrate while depositing a film layer on the substrate.

Abstract: A method and apparatus for a dual-channel showerhead is provided. In one embodiment the showerhead comprises a body comprising a conductive material having a plurality of first openings formed therethrough comprising a first gas channel and a plurality of second openings formed therethrough comprising a second gas channel that is fluidly separated from the first gas channel, wherein each of the first openings having a geometry that is different than each of the second openings.

Abstract: Implementations of the present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.