Patents by Inventor Xinhui Wang

Xinhui Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190207722
    Abstract: A method and apparatus for information reporting as well as a method and apparatus for information transmission are provided. The method for information reporting includes: receiving, by a second communication node, a reference signal from a first communication node, to determine a reference signal-related index and/or channel state information; reporting, by the second communication node, a set to the first communication node, and the set includes at least one of: the reference signal-related index and the channel state information. This technical solution solves the problems of low flexibility and poor adaptability of beam-related information reporting in the related art; the second communication node reports its own capability, so that the first communication node can indicate a beam reporting that meets to user capability, thereby improving the stability of beam-related information reporting.
    Type: Application
    Filed: November 30, 2018
    Publication date: July 4, 2019
    Inventors: Bo Gao, Yu Ngok Li, Yijian Chen, Zhaohua Lu, Yifei Yuan, Xinhui Wang
  • Publication number: 20190153063
    Abstract: The present invention provides a chimeric antigen receptor (CAR) that recognizes B7-H3 (CD276), as well as methods of use in the treatment of diseases and disorders.
    Type: Application
    Filed: January 30, 2019
    Publication date: May 23, 2019
    Inventors: Gianpietro Dotti, Soldano Ferrone, Hongwei Du, Xinhui Wang, Cristina Ferrone
  • Patent number: 10290637
    Abstract: A conductive strap structure in lateral contact with a top semiconductor layer is formed on an inner electrode of a deep trench capacitor. A cavity overlying the conductive strap structure is filled a dielectric material to form a dielectric capacitor cap having a top surface that is coplanar with a topmost surface of an upper pad layer. A semiconductor mandrel in lateral contact with the dielectric capacitor cap is formed. The combination of the dielectric capacitor cap and the semiconductor mandrel is employed as a protruding structure around which a fin-defining spacer is formed. The semiconductor mandrel is removed, and the fin-defining spacer is employed as an etch mask in an etch process that etches a lower pad layer and the top semiconductor layer to form a semiconductor fin that laterally wraps around the conductive strap structure. An access finFET is formed employing two parallel portions of the semiconductor fin.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: May 14, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Felix Beaudoin, Stephen M. Lucarini, Xinhui Wang, Xinlin Wang
  • Patent number: 10269806
    Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: April 23, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert, Xinhui Wang
  • Patent number: 10256150
    Abstract: A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: April 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Dechao Guo, Liyang Song, Xinhui Wang, Qintao Zhang
  • Patent number: 10233226
    Abstract: The present invention provides a chimeric antigen receptor (CAR) that recognizes B7-H3 (CD276), as well as methods of use in the treatment of diseases and disorders.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: March 19, 2019
    Assignees: The University of North Carolina at Chapel Hill, The General Hospital Corporation
    Inventors: Gianpietro Dotti, Soldano Ferrone, Hongwei Du, Xinhui Wang, Cristina Ferrone
  • Patent number: 10220091
    Abstract: Methods for treating cancer using a combination of an inhibitor of the sonic hedgehog signaling pathway (e.g., LDE225) with radiation and a tumor antigen-specific monoclonal antibody (e.g., heat shock protein (HSP) glucose regulated protein of 94000 daltons (Grp94)-specific mAb W9, or chondroitin sulfate proteoglycan 4 (CSPG4)-targeted mAbs), or with a BRAF inhibitor, e.g., in BRAF inhibitor resistant cancers.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: March 5, 2019
    Assignee: The General Hospital Corporation
    Inventors: Francesco Sabbatino, Yangyang Wang, Xinhui Wang, Steven Isakoff, Cristina Ferrone, Joe Schwab, Soldano Ferrone
  • Patent number: 10177154
    Abstract: After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure having a base portion vertically contacting a deep trench capacitor embedded in a substrate and a fin portion laterally contacting the semiconductor fin, conducting spikes that are formed on the sidewalls of the deep trench are removed or pushed deeper into the deep trench. Subsequently, a dielectric cap that inhibits epitaxial growth of a semiconductor material thereon is formed over at least a portion of the base portion of the conductive strap structure. The dielectric cap can be formed either over an entirety of the base portion having a stepped structure or on a distal portion of the base portion.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: January 8, 2019
    Assignee: International Business Machines Corporation
    Inventors: Michael V. Aquilino, Veeraraghavan S. Basker, Kangguo Cheng, Gregory Costrini, Ali Khakifirooz, Byeong Y. Kim, William L. Nicoll, Ravikumar Ramachandran, Reinaldo A. Vega, Hanfei Wang, Xinhui Wang
  • Patent number: 10170368
    Abstract: A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Dechao Guo, Liyang Song, Xinhui Wang, Qintao Zhang
  • Publication number: 20180371053
    Abstract: The present invention provides a chimeric antigen receptor (CAR) that recognizes B7-H3 (CD276), as well as methods of use in the treatment of diseases and disorders.
    Type: Application
    Filed: June 19, 2018
    Publication date: December 27, 2018
    Inventors: Gianpietro Dotti, Soldano Ferrone, Hongwei Du, Xinhui Wang, Cristina Ferrone
  • Publication number: 20180337185
    Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are provided. The method includes forming deep trench capacitor structures in a silicon on insulator (SOI) wafer. The method further includes forming a plurality of composite fin structures from a semiconductor material of the SOI wafer and conductive material of the deep trench capacitor structures. The method further includes forming a liner over the deep trench capacitor structures including the conductive material of the deep trench capacitor structures. The method further includes forming replacement gate structures with the liner over the deep trench capacitor structures protecting the conductive material during deposition and etching processes.
    Type: Application
    Filed: May 24, 2018
    Publication date: November 22, 2018
    Inventors: Ricardo A. DONATON, Babar A. KHAN, Xinhui WANG, Deepal WEHELLA-GAMAGE
  • Publication number: 20180286761
    Abstract: A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.
    Type: Application
    Filed: November 2, 2017
    Publication date: October 4, 2018
    Inventors: Dechao Guo, Liyang Song, Xinhui Wang, Qintao Zhang
  • Publication number: 20180286866
    Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.
    Type: Application
    Filed: June 1, 2018
    Publication date: October 4, 2018
    Inventors: Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert, Xinhui Wang
  • Publication number: 20180286760
    Abstract: A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.
    Type: Application
    Filed: April 3, 2017
    Publication date: October 4, 2018
    Inventors: Dechao Guo, Liyang Song, Xinhui Wang, Qintao Zhang
  • Publication number: 20180230205
    Abstract: Isolated monoclonal antibodies are disclosed herein that specifically bind endoplasmin In some embodiments these antibodies are fully human. Recombinant nucleic acids encoding these antibodies, expression vectors including these nucleic acids, and host cells transformed with these expression vectors are also disclosed herein. In several embodiments the disclosed antibodies are of use for detecting and/or treating tumors that express endoplasmin, such as melanoma, breast cancer, head and neck squamous cell carcinoma, renal cancer, lung cancer, glioma, bladder cancer, ovarian cancer or pancreatic cancer. In one example, the tumor is a melanoma.
    Type: Application
    Filed: January 12, 2018
    Publication date: August 16, 2018
    Applicant: University of Pittsburgh - Of The Commonwealth System of Higher Education
    Inventors: Soldano Ferrone, Xinhui Wang, Thomas P. Conrads, Elvira Favoino, Brian L. Hood
  • Patent number: 10050039
    Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: August 14, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert, Xinhui Wang
  • Publication number: 20180225405
    Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.
    Type: Application
    Filed: March 29, 2018
    Publication date: August 9, 2018
    Inventors: Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert, Xinhui Wang
  • Patent number: 10042968
    Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: August 7, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Effendi Leobandung, Theodorus E. Standaert, Xinhui Wang
  • Patent number: 10037998
    Abstract: An integrated FinFET and deep trench capacitor structure and methods of manufacture are provided. The method includes forming deep trench capacitor structures in a silicon on insulator (SOI) wafer. The method further includes forming a plurality of composite fin structures from a semiconductor material of the SOI wafer and conductive material of the deep trench capacitor structures. The method further includes forming a liner over the deep trench capacitor structures including the conductive material of the deep trench capacitor structures. The method further includes forming replacement gate structures with the liner over the deep trench capacitor structures protecting the conductive material during deposition and etching processes.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: July 31, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ricardo A. Donaton, Babar A. Khan, Xinhui Wang, Deepal Wehella-Gamage
  • Publication number: 20180072811
    Abstract: Embodiments of the present invention provide antibodies, antigen binding portions thereof, and other polypeptides (e.g., CARs), that specifically bind to CSPG4, an antigen expressed on cancer cells. Monoclonal antibodies, antibody-drug conjugates, and/or CAR-T-cells that specifically bind to CSPG4 positive cancer cells are also provided.
    Type: Application
    Filed: April 6, 2016
    Publication date: March 15, 2018
    Applicant: THE GENERAL HOSPITAL CORPORATION
    Inventors: Soldano FERRONE, Xinhui WANG