Abstract: An air-permeable member for portable body warmers includes a nonwoven fabric and a porous film in a layered structure. The nonwoven fabric is a spunbonded nonwoven fabric having an embossment area ratio of 5% to 20% and a METSUKE of 10 to 80 g/m2, the porous film has a thickness of 30 to 200 ?m, and the air-permeable member has a compressive strength in machine direction of from 2 to 5.5 N as a maximum compressive load measured through a ring crush method by sampling a 60-mm square test piece; rounding the test piece with a circumference agreeing the transverse direction to give a cylindrical sample; compressing the cylindrical sample in the machine direction using a tensile tester at a temperature of 23° C. and relative humidity of 50% at a compressing speed of 300 mm/min.; and measuring compressive loads at distortions of 0 to 10 mm.

Abstract: A semiconductor device includes a gate electrode formed through an insulating film in a groove having a first side surface adjacent to a source region and a base region, and a second conductive type first impurity region formed adjacent to a second side surface of the groove between the groove and a lead-out portion of a drain region existing below the base region so as to extend downward beyond a lower end of the groove.

Abstract: A semiconductor device includes a gate electrode formed through a gate insulating film provided on a first impurity region and a drift layer, and this gate electrode consists of two regions including a first conductivity type second impurity region opposed to the first impurity region and a third impurity region capable of forming a depletion layer.

Abstract: [Object] To provide a gas decomposition apparatus and a gas decomposition method in which no safety problems occur in spite of the application of a relatively high voltage between an anode and a cathode for the purpose of decomposing odorous gases of many types. [Solution] A catalytic electrode layer 6 that contains a catalyst and is porous; a counter electrode layer 7 that forms a pair with the catalytic electrode; and an electrolyte layer 15 that is sandwiched between the catalytic electrode and the counter electrode and has ion conductivity are included. The catalyst is held by the catalytic electrode in the form of being carried by a carrier containing a conductive material or the catalyst is directly carried by the catalytic electrode. A conductive material in the catalytic electrode, the conductive material being in contact with the catalyst, is not a noncovalent carbon material.

Abstract: An agent for thermally stabilizing lactoferrin, which comprises a nucleic acid as an active ingredient, can be added to lactoferrin to impart thermal stability to lactoferrin. Thermally stabilized lactoferrin can be heat-sterilized at a pH value around a neutral pH value while keeping its activity.

Abstract: There is provided an amplifier for combining outputs of a plurality of amplifying circuits to generate an amplifier output. The amplifier includes a first amplifying circuit for operating a first amplifying device in class-AB, wherein the first amplifying circuit is one among the plurality of the amplifying circuits; a second amplifying circuit for operating a second amplifying device in class-B or class-C, wherein the second amplifying circuit is one among the plurality of the amplifying circuits; and a summing node at which an output of the first amplifying circuit is combined with an output of the second amplifying circuit via a first impedance transformer containing a transmission line of an electrical length other than ?/4. The second amplifying device is connected to the summing node via an output matching circuit and a second impedance transformer containing a transmission line.

Abstract: The invention prevents a source-drain breakdown voltage of a DMOS transistor from decreasing due to dielectric breakdown in a portion of a N type drift layer having high concentration formed in an active region near field oxide film corner portions surrounding an gate width end portion. The field oxide film corner portions are disposed on the outside of the gate width end portion so as to be further away from a P type body layer formed in the gate width end portion by forming the active region wider on the outside of the gate width end portion than in a gate width center portion. By this, the N type drift layer having high concentration near the field oxide film corner portions are disposed further away from the P type body layer without increasing the device area.

Abstract: The invention provides a DMOS transistor in which a leakage current is decreased and the source-drain breakdown voltage of the transistor in the off state is enhanced when a body layer is formed by oblique ion implantation. After a photoresist layer 18 is formed, using the photoresist layer 18 and a gate electrode 14 as a mask, first ion implantation is performed toward a first corner portion 14C1 on the inside of the gate electrode 14 in a first direction shown by an arrow A?. A first body layer 17A? is formed by this first ion implantation. The first body layer 17A? is formed so as to extend from the first corner portion 14C1 to under the gate electrode 14, and the P-type impurity concentration of the body layer 17A? in the first corner portion 14C1 is higher than that of a conventional transistor.

Abstract: This invention provides a DMOS transistor that has a reduced ON resistance and is prevented from deterioration in strength against an electrostatic discharge. An edge portion of a source layer of the DMOS transistor is disposed so as to recede from an inner corner portion of a gate electrode. A silicide layer is structured so as not to extend out of the edge portion of the source layer. That is, although the silicide layer is formed on a surface of the source layer, the silicide layer is not formed on a surface of a portion of a body layer, which is exposed between the source layer and the inner corner portion of the gate electrode. As a result, the strength against the electrostatic discharge can be improved, because an electric current flows almost uniformly through whole of the DMOS transistor without converging.

Abstract: A power circuit used for an amplifier, which includes an amplifier provided with a linear amplifier serving as a voltage source, a DC/DC converter serving as a current source, a hysteresis comparator controlling the DC/DC converter, and a current detector detecting output current from the linear amplifier to output the detected output current to the hysteresis comparator; and a switching restricting means for restricting a switching interval in the DC/DC converter such that the switching interval is not equal to or less than a constant time or is not shorter than the constant time.

Abstract: Disclosed is a sustained release preparation which comprises an active ingredient having a higher release rate at pH 4 compared to that in pH 1.2 or pH 6.8 and exerts a controlled release of the active ingredient in a pH-independent manner. The sustained release preparation comprises ethyl (?)-2-[4-[2-[[(1S,2R)-2-hydroxy-2-(4-hydroxyphenyl)-1-methylethyl]amino]ethyl]-2,5-dimethyl-phenoxy]acetate hydrochloride as the active ingredient and a pH-independent gel-forming polymer and contains substantially no pH-controlling agent other than the polymer. The sustained release preparation can release the active ingredient in a pH-independent manner in the range from 1.2 to 6.8 and shows a constant release rate for a prolonged period of time. Therefore, the preparation is useful as a therapeutic agent for frequent urination/incontinence of urine which has a long-lasting effect.

Abstract: An amplifier capable of lowering an electrical current flowing in a peak amplifier before a carrier amplifier becomes saturated to thereby improve the efficiency of an entirety of the amplifier is provided. The amplifier includes a carrier amplifier circuit having an amplifying element operable in class-AB or class-B, and a plurality of peak amplifier circuits which have amplifying elements operating in class-B or class-C and which are arranged to start an operation in stages in response to an input level. An output of the carrier amplifier circuit and outputs of the peak amplifier circuits are combined together for signal output. One of the peak amplifier circuits which is rendered operative at the lowest input level is smaller in saturation output than the carrier amplifier circuit.

Abstract: The performance of an amplifying system is improved by achieving adequate matching. The amplifying system for amplifying signals includes distributing means 1 that distribute a signal, a carrier amplifier 2 that amplifies the distributed first signal in Class AB, a peak amplifier 4 that amplifies the distributed second signal in Class B or Class C, a first transmission line having a given electric length and being connected to an output of the carrier amplifier, a second transmission line having a given electric length and being connected to an output of the peak amplifier, and a combining end 18 for combining an output of the first transmission line and an output of the second transmission line.

Abstract: A spout member including a base portion which is fixed to a bag body, a cylindrical portion which protrudes upward from the base portion, and a sealing portion which seals a front end of the cylindrical portion through a breakable thin portion is disposed between two sheets of film forming the bag body. A sealing chamber accommodating the cylindrical portion and the sealing portion is opened by tearing the two sheets of film along an opening assisting line. An opening assisting plate protruding to at least one of a left side and a right side of the sealing portion is disposed above the opening assisting line. A sandwiching reinforcement seal portion for reinforcing the two sheets of film by sealing inner surfaces thereof is provided between the opening assisting plate and the opening assisting line.

Abstract: A semiconductor device for improving performance of a p-channel transistor and an n-channel transistor having multi-finger structures. Gates of the n-channel transistor are arranged so that their gate width direction is parallel to one side of a first region. Gates of the p-channel transistor are arranged so that their gate width direction extends at an angle of 45 degrees with respect to one side of a second region. The ratio of a maximum gate width of the p-channel transistor arranged in the second region to the pitch between the gates of the p-channel transistor is set in accordance with the ratio of the area of an ineffective region to the area of the second region.

Abstract: The present invention provides an orally disintegrating tablet containing mitiglinide calcium hydrate. The tablet has reduced bitterness and quickly disintegrates in the mouth, while exhibiting rapid dissolution in the digestive tract. The bitterness-masked orally disintegrating tablet comprises: (a) mitiglinide calcium hydrate; (b) microcrystalline cellulose; (c) at least one masking agent selected from the group consisting of aminoalkyl methacrylate copolymer E, polyvinylacetal diethylaminoacetate, an ethyl acrylate-methyl methacrylate copolymer, and ethyl cellulose; (d) a sugar or a sugar alcohol; and (e) at least one selected from corn starch and partially pregelatinized starch.

Abstract: An ON resistance of a trench gate type transistor and a withstand voltage of a planar type transistor are optimized at the same time. Each of first and second regions of a semiconductor layer is formed by epitaxial growth on each of first and second regions of a semiconductor substrate, respectively. A first buried layer is formed between the first region of the semiconductor substrate and the first region of the semiconductor layer, while a second buried layer is formed between the second region of the semiconductor substrate and the second region of the semiconductor layer. The first buried layer is formed of an N+ type first impurity-doped layer and an N type second impurity-doped layer that extends beyond the fist impurity-doped layer. The second buried layer is formed of an N+ type impurity-doped layer only. In the first region of the semiconductor layer, an impurity is diffused from a surface of the semiconductor layer deep into the semiconductor layer to form an N type third impurity-doped layer.

Abstract: This invention provides a DMOS transistor that has a reduced ON resistance and is prevented from deterioration in strength against an electrostatic discharge. An edge portion of a source layer of the DMOS transistor is disposed so as to recede from an inner corner portion of a gate electrode. A silicide layer is structured so as not to extend out of the edge portion of the source layer. That is, although the silicide layer is formed on a surface of the source layer, the silicide layer is not formed on a surface of a portion of a body layer, which is exposed between the source layer and the inner corner portion of the gate electrode. As a result, the strength against the electrostatic discharge can be improved, because an electric current flows almost uniformly through whole of the DMOS transistor without converging.

Abstract: There is provided an amplifier for combining outputs of a plurality of amplifying circuits to generate an amplifier output. The amplifier includes a first amplifying circuit for operating a first amplifying device in class-AB, wherein the first amplifying circuit is one among the plurality of the amplifying circuits; a second amplifying circuit for operating a second amplifying device in class-B or class-C, wherein the second amplifying circuit is one among the plurality of the amplifying circuits; and a summing node at which an output of the first amplifying circuit is combined with an output of the second amplifying circuit via a first impedance transformer containing a transmission line of an electrical length other than ?/4. The second amplifying device is connected to the summing node via an output matching circuit and a second impedance transformer containing a transmission line.

Abstract: A method of fabricating a semiconductor device includes a first step of forming a defect suppression film suppressing increase in a defect due to implantation of an impurity on a semiconductor substrate, a second step of forming an active region on a surface of the semiconductor substrate by implanting the impurity through the defect suppression film, a third step of removing the defect suppression film and a fourth step of forming an interface state suppression film suppressing increase in an interface state density of the active region on the active region.