Patents by Inventor Yasushi Inagaki
Yasushi Inagaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20150212288Abstract: A lens driving apparatus includes a lens holding member, a static member including a housing, a biasing member, and a moving mechanism. The biasing member includes upper and lower leaf springs. The upper leaf spring includes an upper first portion, an upper second portion, and an upper elastic arm portion. A through hole is formed in the upper first portion of the upper leaf spring. The lens holding member includes a fastening portion that includes a mount surface on which the upper leaf spring is placed, a recess facing the through hole, and a protrusion inserted into the through hole. An adhesive held in the recess surrounds the protrusion and part of the adhesive spreads to an upper surface of the upper first portion of the upper leaf spring through the through hole. The upper leaf spring is fixed to the lens holding member with the adhesive.Type: ApplicationFiled: January 26, 2015Publication date: July 30, 2015Inventors: Yasushi INAGAKI, Katsuhiko OTOMO
-
Patent number: 9060446Abstract: A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode.Type: GrantFiled: May 16, 2014Date of Patent: June 16, 2015Assignee: IBIDEN CO., LTD.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
-
Publication number: 20150043183Abstract: A wiring board with a built-in electronic component includes a core substrate, an electronic component in the substrate, a first upper-layer structure on first surface of the substrate, a second upper-layer structure on second surface of the substrate, and via conductors in the substrate and first upper-layer structure such that the via conductors are connected to an electrode of the component. The substrate has an accommodating layer, a first connection layer on first surface of the accommodating layer, and a second connection layer on second surface of the accommodating layer, the accommodating layer includes inner wiring and insulation layers and has cavity accommodating the component, the first connection layer includes inner wiring and insulation layers, and the second connection layer includes inner wiring and insulation layers such that the second connection layer includes greater number of inner wiring and insulation layers than the first connection layer.Type: ApplicationFiled: August 8, 2014Publication date: February 12, 2015Applicant: IBIDEN CO., LTD.Inventors: Naohito ISHIGURO, Yasushi Inagaki
-
Publication number: 20150040389Abstract: A method for manufacturing a wiring board with a built-in electronic component includes positioning an electronic component in a cavity of a substrate, forming intermediate structures each including an intermediate insulation layer and an intermediate wiring-pattern layer on upper and lower surfaces of the substrate, respectively, such that a component-accommodating substrate is formed, attaching a support sheet to a first surface of the component-accommodating substrate, forming a connection layer including insulation layers and wiring-pattern layers on a second surface of the component-accommodating substrate on the opposite side with respect to the first surface of the component-accommodating substrate, removing the support sheet from the component-accommodating substrate such that an intermediate laminate structure having the connection layer laminated on the second surface of the component-accommodating substrate is formed, and forming upper-layer structures each including an insulation layer and a wirinType: ApplicationFiled: August 8, 2014Publication date: February 12, 2015Applicant: IBIDEN CO., LTD.Inventors: Naohito ISHIGURO, Yasushi INAGAKI
-
Publication number: 20140374150Abstract: A package substrate includes an outermost interlayer resin insulation layer, an outermost conductive layer formed on a first surface of the outermost interlayer resin insulation layer and including first pads positioned to mount a first electronic component and second pads positioned to mount a second electronic component, a first conductive layer including first conductive circuits and formed on a second surface of the outermost interlayer resin insulation layer on the opposite side with respect to the first surface, first via conductors penetrating through the outermost interlayer resin insulation layer such that the first via conductors are connecting the first conductive layer and the first pads, and second via conductors penetrating through the outermost interlayer resin insulation layer such that the second via conductors are connecting the first conductive layer and the second pads. The first conductive circuits in the first conductive layer are connecting the first and second pads, respectively.Type: ApplicationFiled: June 20, 2014Publication date: December 25, 2014Applicant: IBIDEN CO., LTD.Inventors: Yasushi INAGAKI, Yasuhiro Takahashi, Satoshi Kurokawa
-
Patent number: 8842440Abstract: A method for manufacturing a printed circuit board includes forming an opening portion in a substrate, positioning chip capacitors in the opening portion of the substrate such that the chip capacitors are accommodated in the opening portion of the substrate, forming a buildup structure including an interlayer resin insulating layer and a conductive layer over a surface of the substrate and the chip capacitors accommodated in the opening portion of the substrate, and forming on a surface of the buildup structure bump structures positioned to mount an IC chip such that the chip capacitors in the opening portion of the substrate are positioned directly below the IC chip.Type: GrantFiled: June 28, 2013Date of Patent: September 23, 2014Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
-
Patent number: 8830691Abstract: A printed circuit board including a core substrate including a first resin substrate, a second resin substrate having an opening and a third resin substrate in a multilayer manner while interposing bonding plates, insulating layers and conductive circuit layers alternately laminated on the core substrate, solder bumps formed on an outer surface of the printed circuit board, a first capacitor formed in the opening of the second resin substrate, a conductive pad formed on the first resin substrate and connected to an electrode of the first capacitor, a via hole formed in the first resin substrate and directly connected to the conductive pad and a conductive circuit on the core substrate, and a second capacitor mounted on a surface of the printed circuit board.Type: GrantFiled: May 21, 2010Date of Patent: September 9, 2014Assignee: IBIDEN Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
-
Publication number: 20140247572Abstract: A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode.Type: ApplicationFiled: May 16, 2014Publication date: September 4, 2014Applicant: IBIDEN CO., LTD.Inventors: Yasushi INAGAKI, Motoo ASAI, Dongdong WANG, Hideo YABASHI, Seiji SHIRAI
-
Patent number: 8780573Abstract: A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode.Type: GrantFiled: October 31, 2012Date of Patent: July 15, 2014Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi
-
Patent number: 8763241Abstract: A method for manufacturing a printed circuit board including providing a first resin substrate having a resin plate and a circuit pattern formed on a surface of the resin plate, providing a second resin substrate having a resin plate and an accommodation portion formed in the resin plate of the second substrate, connecting an electrode of a capacitor to the circuit pattern of the first substrate with a bonding material such that the capacitor is mounted to the first substrate, attaching the second substrate to the resin substrate through a bonding resin layer such that the capacitor on the first substrate is accommodated in the accommodation portion of the second substrate, and forming a via hole in the first substrate such that the via hole is electrically connected to the electrode of the capacitor in the accommodation portion of the second substrate.Type: GrantFiled: September 22, 2011Date of Patent: July 1, 2014Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
-
Patent number: 8754334Abstract: An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 ?m and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.Type: GrantFiled: March 29, 2012Date of Patent: June 17, 2014Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Katsuyuki Sano
-
Patent number: 8729400Abstract: An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 ?m and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.Type: GrantFiled: November 18, 2008Date of Patent: May 20, 2014Assignee: IBIDEN Co., Ltd.Inventors: Yasushi Inagaki, Katsuyuki Sano
-
Patent number: 8717772Abstract: A printed circuit board includes a core substrate having an opening portion, an electronic component provided in the opening portion of the core substrate and including a dielectric body, a first electrode formed over the dielectric body, and a second electrode formed over the dielectric body such that the dielectric body is interposed between the first electrode and the second electrode, and a resin filling a gap between the core substrate and the electronic component in the opening portion of the core substrate. The resin filling the gap includes a filler.Type: GrantFiled: September 25, 2009Date of Patent: May 6, 2014Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
-
Patent number: 8592688Abstract: A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer 34P on a core substrate 30 is formed to have a thickness of 30 ?m and a conductor circuit 58 on an interlayer resin insulating layer 50 is formed to have a thickness of 15 ?m. By making the conductor layer 34P thick, it is possible to increase a volume of the conductor itself and decrease resistance. Further, by employing the conductor layer 34 as a power supply layer, it is possible to improve a capability of supplying power to the IC chip.Type: GrantFiled: December 29, 2009Date of Patent: November 26, 2013Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Katsuyuki Sano
-
Publication number: 20130299218Abstract: A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer 34P on a core substrate 30 is formed to have a thickness of 30 ?m and a conductor circuit 58 on an interlayer resin insulating layer 50 is formed to have a thickness of 15 ?m. By making the conductor layer 34P thick, it is possible to increase a volume of the conductor itself and decrease resistance. Further, by employing the conductor layer 34 as a power supply layer, it is possible to improve a capability of supplying power to the IC chip.Type: ApplicationFiled: July 8, 2013Publication date: November 14, 2013Inventors: Yasushi INAGAKI, Katsuyuki Sano
-
Publication number: 20130286615Abstract: A method for manufacturing a printed circuit board includes forming an opening portion in a substrate, positioning chip capacitors in the opening portion of the substrate such that the chip capacitors are accommodated in the opening portion of the substrate, forming a buildup structure including an interlayer resin insulating layer and a conductive layer over a surface of the substrate and the chip capacitors accommodated in the opening portion of the substrate, and forming on a surface of the buildup structure bump structures positioned to mount an IC chip such that the chip capacitors in the opening portion of the substrate are positioned directly below the IC chip.Type: ApplicationFiled: June 28, 2013Publication date: October 31, 2013Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
-
Patent number: 8569880Abstract: A multilayer printed wiring board in which interlayer insulation layer and conductive layer are formed on a multilayer core substrate composed of three or more layers, having through holes for connecting the front surface with the rear surface and conductive layers on the front and rear surfaces and conductive layer in the inner layer to achieve electric connection through via holes, the through holes being composed of power source through holes, grounding through holes and signal through holes connected electrically to a power source circuit or a grounding circuit or a signal circuit of an IC chip, when the power source through holes pass through the grounding conductive layer of the inner layer in the core substrate, of the power source through holes, at least a power source through hole just below the IC having no conductive circuit extending from the power source through hole in the grounding conductive layer.Type: GrantFiled: August 27, 2010Date of Patent: October 29, 2013Assignee: IBIDEN Co., Ltd.Inventors: Yasushi Inagaki, Katsuyuki Sano
-
Publication number: 20130248234Abstract: A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer 34P on a core substrate 30 is formed to have a thickness of 30 ?m and a conductor circuit 58 on an interlayer resin insulating layer 50 is formed to have a thickness of 15 ?m. By making the conductor layer 34P thick, it is possible to increase a volume of the conductor itself and decrease resistance. Further, by employing the conductor layer 34 as a power supply layer, it is possible to improve a capability of supplying power to the IC chip.Type: ApplicationFiled: April 29, 2013Publication date: September 26, 2013Applicant: IBIDEN CO., LTD.Inventors: Yasushi Inagaki, Katsuyuki Sano
-
Publication number: 20130107482Abstract: A printed circuit board includes an accommodating layer, chip capacitor devices accommodated in the accommodating layer, and a buildup structure formed on the accommodating layer such that the buildup structure covers the chip capacitor devices in the accommodating layer. The buildup structure has mounting conductor structures positioned to mount an IC chip device on a surface of the buildup structure such that the IC chip device is mounted directly over the chip capacitor devices, each of the chip capacitor devices has a dielectric body having a surface facing the buildup structure, a first electrode formed on the dielectric body and extending on the surface of the dielectric body, and a second electrode formed on the dielectric body and extending on the surface of the dielectric body, and the dielectric body is interposed between the first electrode and the second electrode.Type: ApplicationFiled: October 31, 2012Publication date: May 2, 2013Inventors: Yasushi INAGAKI, Motoo ASAI, Dongdong WANG, Hideo YABASHI, Seiji SHIRAI
-
Patent number: 8331102Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between the IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.Type: GrantFiled: February 20, 2008Date of Patent: December 11, 2012Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai