Abstract: An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 ?m and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.

Abstract: An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 ?m and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.

Abstract: A printed circuit board has a core substrate including a resin substrate having an opening, a capacitor formed in the opening and having a first electrode structure having a portion facing to the upper surface of the core substrate and a second electrode structure having a portion facing to the lower surface of the core substrate, an upper insulating layer formed over the upper surface of the core substrate and having a conductive circuit formed over the upper insulating layer and a via hole electrically connecting the portion of the first electrode structure and the conductive circuit of the upper insulating layer, and a lower insulating layer formed over the lower surface of the core substrate and having a conductive circuit formed over the lower insulating layer and a via hole electrically connecting the portion of the second electrode structure and the conductive circuit of the lower insulating layer.

Abstract: A multilayer printed wiring board has a core substrate, an interlayer insulation layer formed over the core substrate, conductive layers formed over the core substrate, and a via hole for providing electrical connection between the conductive layers. The conductive layers include a conductive layer formed on the core substrate, and the conductive layer formed on the core substrate has a side face in a form of rounded taper tapering toward the core substrate.

Abstract: A printed circuit board includes a chip capacitor having electrodes and a metal film formed on one or more of the electrodes, an accommodating layer accommodating the chip capacitor inside the accommodating layer, a connection layer formed over the accommodating layer and having a via hole opening extending to the metal film, and a first via hole structure formed in the via hole opening of the connection layer and connected to the metal film on the one or more of the electrodes of the chip capacitor.

Abstract: A method for manufacturing a printed circuit board including providing a first resin substrate having a resin plate and a circuit pattern formed on a surface of the resin plate, providing a second resin substrate having a resin plate and an accommodation portion formed in the resin plate of the second substrate, connecting an electrode of a capacitor to the circuit pattern of the first substrate with a bonding material such that the capacitor is mounted to the first substrate, attaching the second substrate to the resin substrate through a bonding resin layer such that the capacitor on the first substrate is accommodated in the accommodation portion of the second substrate, and forming a via hole in the first substrate such that the via hole is electrically connected to the electrode of the capacitor in the accommodation portion of the second substrate.

Abstract: A multilayer printed wiring board including a core substrate, a first conductor layer on a first surface of the substrate, a second conductor layer on a second surface of the substrate, a third conductor layer inside the substrate between the first and second conductor layers, a conductive post connecting the third conductor layer with the first and second conductor layers, a first conductor circuit on the first surface of the substrate, a second conductor circuit on the second surface of the substrate, and a through hole formed through the substrate and connecting the first and second conductor circuits. The through hole is not connected to the third conductor layer, the third conductor layer has thickness larger than thicknesses of the first and second conductor layers, each of the first, second and third conductor layers forms one of power supply and ground layers, and the through hole forms a signal line.

Abstract: A printed wiring board is provided which includes an interlayer dielectric layer formed on a substrate from a curable resin having flaky particles dispersed therein. The printed wiring board is excellent in cooling/heating cycle resistance and packaging reliability while maintaining a satisfactory heat resistance, electrical insulation, heat liberation, connection reliability and chemical stability. Also a method of producing a printed wiring board is proposed in which an imprint method using a mold having formed thereon convexities corresponding to wiring patterns and viaholes to be formed being buried in an interlayer dielectric layer is used to form the wiring patterns and viaholes by transcribing the concavities of the mold to the interlayer dielectric layer. The imprint method permits to form the wiring patterns and viaholes but assures an easy and accurate transcription without any optical transcription or complicated etching.

Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between an IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract: A chip capacitor is provided in a core substrate of a printed circuit board. This makes it possible to shorten a distance between an IC chip and the chip capacitor and to reduce loop inductance. Since the core substrate is constituted by provided a first resin substrate, a second resin substrate and a third resin substrate in a multilayer manner, the core substrate can obtain sufficient strength.

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract: A printed circuit board has a core substrate including a resin substrate having an opening, a capacitor formed in the opening and having a first electrode structure having a portion facing to the upper surface of the core substrate and a second electrode structure having a portion facing to the lower surface of the core substrate, an upper insulating layer formed over the upper surface of the core substrate and having a conductive circuit formed over the upper insulating layer and a via hole electrically connecting the portion of the first electrode structure and the conductive circuit of the upper insulating layer, and a lower insulating layer formed over the lower surface of the core substrate and having a conductive circuit formed over the lower insulating layer and a via hole electrically connecting the portion of the second electrode structure and the conductive circuit of the lower insulating layer.

Abstract: A multilayer printed wiring board in which interlayer insulation layer and conductive layer are formed on a multilayer core substrate composed of three or more layers, having through holes for connecting the front surface with the rear surface and conductive layers on the front and rear surfaces and conductive layer in the inner layer to achieve electric connection through via holes, the through holes being composed of power source through holes, grounding through holes and signal through holes connected electrically to a power source circuit or a grounding circuit or a signal circuit of an IC chip, when the power source through holes pass through the grounding conductive layer of the inner layer in the core substrate, of the power source through holes, at least a power source through hole just below the IC having no conductive circuit extending from the power source through hole in the grounding conductive layer.

Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract: An IC chip for a high frequency region, particularly, a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer is formed at a thickness of 30 ?m on a core substrate and a conductive circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor itself can be increased thereby decreasing its resistance. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.

Abstract: A printed circuit board including a core substrate including a first resin substrate, a second resin substrate having an opening and a third resin substrate in a multilayer manner while interposing bonding plates, insulating layers and conductive circuit layers alternately laminated on the core substrate, solder bumps formed on an outer surface of the printed circuit board, a first capacitor formed in the opening of the second resin substrate, a conductive pad formed on the first resin substrate and connected to an electrode of the first capacitor, a via hole formed in the first resin substrate and directly connected to the conductive pad and a conductive circuit on the core substrate, and a second capacitor mounted on a surface of the printed circuit board.

Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between an IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract: A package substrate free of malfunction or error even with an IC chip in a high frequency range, particularly an IC chip with a frequency exceeding 3 GHz, is provided. A conductor layer 34P on a core substrate 30 is formed to have a thickness of 30 ?m and a conductor circuit 58 on an interlayer resin insulating layer 50 is formed to have a thickness of 15 ?m. By making the conductor layer 34P thick, it is possible to increase a volume of the conductor itself and decrease resistance. Further, by employing the conductor layer 34 as a power supply layer, it is possible to improve a capability of supplying power to the IC chip.