Abstract: A shift register is configured by connecting unit circuits 1 in multiple stages. An output transistor Tr1 switches between whether or not to output a clock signal CKA in accordance with a gate potential. A drain terminal of an initialization transistor Tra is connected to a gate terminal of the Tr1, and a source terminal thereof is connected to an output terminal OUT or a clock terminal CKA. The source terminal of the Tra is connected to a node which has a low-level potential at the time of initialization and has a potential at the same level as the clock signal when the clock signal having a high-level potential is outputted. Thus, at the time of outputting the clock signal having the high-level potential, application of a high voltage between the source and the drain of the Tra is prevented, and degradation and breakdown of the initialization transistor are prevented.

Abstract: A power control apparatus 20 used in a power control system provided with a fuel cell 33 which generates power while a current sensor 40 is detecting forward current flow, a solar cell 11, and a storage battery 12, the power control apparatus 20 includes a pseudo-output unit 50 configured to generate a pseudo current to be detected by the current sensor 40 and a controller 27 configured to control the pseudo-output unit 50, wherein the controller 27 acquires at least one of a charge level of the storage battery 12 and an output value of the solar cell 11 and controls a power generation amount of the fuel cell 33 based on at least one of the charge level and the output value, together with the pseudo current detected by the current sensor 40.

Abstract: A sealing device that is capable of suppressing the generation of unusual noise by guiding a gas flow and suppressing the generation of unusual noise caused by resonance between the gas flow and a pipe. An intake noise reduction portion (20) includes a flow-guiding net portion (21) for guiding a gas flowing in an intake pipe, an annular frame body portion (22) for supporting the flow-guiding net portion (21), a cylindrical portion (23) that extends from the frame body portion (22) in a direction in which the pipe extends, and is fitted into an inner circumferential surface of a second pipe (220) and a flange portion (24) that extends from an end portion of the cylindrical portion (23) toward an outer circumferential surface side, and is disposed in a space between an end surface of a first pipe (210) and an end surface of the second pipe (220). A gasket portion (10) is provided on both surfaces of the flange portion (24).

Abstract: According to one embodiment, an electronic apparatus includes a component and a sticky gel-like portion. The gel-like portion encloses the component and has a surface, at least a portion of the surface is configured to be exposed to an outside.

Abstract: A unit circuit (11) includes: a transistor (T2) having its drain terminal to be supplied with a clock signal (CK) and its source terminal connected to an output terminal (OUT); a transistor (T9) which, when supplied with an active all-on control signal (AON), outputs an ON voltage to the output terminal (OUT), and which, when supplied with a nonactive all-on control signal (AONB), stops outputting the ON voltage; a transistor (T1) which supplies the ON voltage to a control terminal of the transistor (T2) in accordance with an input signal (IN); a transistor (T4) which, when supplied with the active all-on control signal (AON), supplies an OFF voltage to a control terminal of the transistor (T2). This makes it possible to provide a shift register of a simple structure that can prevent a malfunction from occurring after all-on operation, and to provide a display device.

Abstract: An attachment device for attaching an electronic device on a body of a subject includes an attachment member and a battery. The attachment member has a first surface to be in contact with the electronic device and a second surface that is opposite to the first surface and formed of an adhesive material configured to adhere to the body of the subject. The battery has a terminal to be electrically connected with the electronic device to supply power to the electronic device.

Abstract: An electronic apparatus includes a substrate having an edge including a non-flat portion, a plurality of electronic units disposed on a surface of the substrate, and a molded resin member covering the substrate and the plurality of electronic units thereon and having a gate scar at a position corresponding to the non-flat portion of the edge.

Abstract: A sealing device that is capable of suppressing the generation of unusual noise by guiding a gas flow and suppressing the generation of unusual noise caused by resonance between the gas flow and a pipe. An intake noise reduction portion (20) includes a flow-guiding net portion (21) for guiding a gas flowing in an intake pipe, an annular frame body portion (22) for supporting the flow-guiding net portion (21), a cylindrical portion (23) that extends from the frame body portion (22) in a direction in which the pipe extends, and is fitted into an inner circumferential surface of a second pipe (220) and a flange portion (24) that extends from an end portion of the cylindrical portion (23) toward an outer circumferential surface side, and is disposed in a space between an end surface of a first pipe (210) and an end surface of the second pipe (220). A gasket portion (10) is provided on both surfaces of the flange portion (24).

Abstract: A measurement device includes a housing, an electronic unit included in the housing and configured to measure a biological state of a subject, and an electrode to be placed on the subject for measuring the biological state. The electrode is embedded in the housing and has a surface that is exposed through an opening in the housing.

Abstract: A measurement device comprising includes a housing, an electronic unit included in the housing and configured to measure a biological state of a subject, and first and second electrodes disposed on a surface of the housing and are aligned along a first direction that is not orthogonal to one of first and second adjacent edges of the housing.

Abstract: The purpose of the present invention is to achieve a display device capable of performing an all-selecting drive for gate bus lines without increasing the number of circuit elements more than heretofore and without lowering withstand voltage reliability. In a stage constituent circuit, which constitutes a shift register in a gate driver, an all-selecting signal (ALL-ON) for simultaneously turning all of gate bus lines to a selected state is given, as a low-potential power supply, to a source terminal of a thin film transistor (Tr4) for setting, at a low level, a QB node provided for setting a scanning signal (OUT) at the low level and to a source terminal of a thin film transistor (Tr3) for setting, at the low level, a Q node provided for setting the scanning signal (OUT) at a high level.

Abstract: A shift register is configured by connecting unit circuits 1 in multiple stages. An output transistor Tr1 switches between whether or not to output a clock signal CKA in accordance with a gate potential. A set transistor Tr2 switches between whether or not to provide an output of an on-potential output unit 2 to a gate terminal of Tr1 in accordance with an output of a set control unit 3. The set control unit 3 controls a gate terminal of Tr2 into a floating state in part of a period during which a high-level potential is provided to the gate terminal of Tr1. The gate potential of Tr2 is raised by being pushed up, whereby a high-level potential without a threshold drop is provided to the gate terminal of Tr1, and rounding of an output signal OUT is decreased when the output signal OUT shifts to a high level. Accordingly, an operation margin with respect to fluctuation of a threshold voltage of the transistor is increased.

Abstract: A shift register is configured by connecting unit circuits 1 in multiple stages. An output transistor Tr1 switches between whether or not to output a clock signal CKA in accordance with a gate potential. A drain terminal of an initialization transistor Tra is connected to a gate terminal of the Tr1, and a source terminal thereof is connected to an output terminal OUT or a clock terminal CKA. The source terminal of the Tra is connected to a node which has a low-level potential at the time of initialization and has a potential at the same level as the clock signal when the clock signal having a high-level potential is outputted. Thus, at the time of outputting the clock signal having the high-level potential, application of a high voltage between the source and the drain of the Tra is prevented, and degradation and breakdown of the initialization transistor are prevented.

Abstract: Provided is a fragrance-retaining fiber that, after absorption of a fragrance component, retains the fragrance even though a long period of time has passed. In particular, provided is a fragrance-retaining polyurethane-based fiber having, 48 hours after absorption of a fragrance component, a total fragrance component emission of from 0.1 ?g/g·h to 1000 ?g/g·h.

Abstract: A demultiplexer circuit (12) of a display device according to one aspect of the present invention includes signal input lines (Vn), control lines (BSW, GSW, and RSW), and sampling transistors (13R2, 13G2, and 13B1). Sampling transistors connected to one signal input line includes first and second sampling transistors. A first sampling transistor (13B1) includes a control electrode (17) which branches to a first branch part (17a) and a second branch part (17b), either one of an input electrode (15) and an output electrode (18) that are disposed between a first branch part (17a) and a second branch part (17b), and other one of an input electrode (15) and an output electrode (18) that are disposed outside of a first branch part (17a) and a second branch part (17b).

Abstract: A power management apparatus (EMS 200) sets a second determination threshold value so that a difference between a first determination threshold value and the second determination threshold value increases along with an elapse of time.

Abstract: Provided is a shift register with which an increase in power consumption can be inhibited, and with which malfunctions due to electric potential Modification Example between gate terminals of output transistors can be inhibited, while inhibiting an increase in circuit size. A bistable circuit of a shift register is provided with first to fourth transistors. In the third transistor, a gate terminal thereof is connected to second conduction terminals of the first and second transistors, a first conduction terminal thereof is connected to a second input terminal, and a second conduction terminal thereof is connected to an output terminal. In the fourth transistor, a gate terminal thereof is connected to the second input terminal, and a second conduction terminal thereof is connected to the gate terminal of the third transistor and the output terminal.

Abstract: A shift register is realized having a simple construction with which it is possible to switch the scanning order of gate bus lines and the occurrence of an erroneous operation caused by a threshold voltage drop can be prevented. Unit circuits that make up the shift register are configured of: a thin film transistor in which a third clock is supplied to the gate terminal, the drain terminal is connected to a first node, and a first input signal (output signal of prior stage) is supplied to the source terminal; a thin film transistor in which a second clock is supplied to the gate terminal, the drain terminal is connected to the first node, and a second input signal (output signal of subsequent stage) is supplied to the source terminal; and a thin film transistor in which the gate terminal is connected to the first node, a first clock is supplied to the drain terminal, and the source terminal is connected to an output terminal.