Abstract: A method of manufacturing a semiconductor device and a semiconductor device including a first semiconductor element mounted on a first surface of a base plate, wherein solder balls are formed on a second opposite surface of the base plate—such that the second opposite surface includes an area without solder balls. At least one second semiconductor element is mounted to the base plate at the area of the second surface without solder balls. The at least one semiconductor element may be mounted to the base plate using low molecular adhesive, or in the alternative, high temperature solder.

Abstract: A semiconductor device that enables the transmission time of a signal and implementation area to be reduced, and a method for manufacturing the same. A semiconductor device includes a first semiconductor substrate, a capacitor chip, an external input terminal, and an external output terminal. The first semiconductor chip includes a first surface, a second surface, an eleventh through-hole electrode, a twelfth through-hole electrode, and a thirteenth through-hole electrode. The capacitor is laminated on the first semiconductor chip and includes a third surface. A capacitor element is formed on the third surface. The capacitor element functions as a condenser component in the periphery of the first semiconductor chip. The external input terminal is electrically coupled to the capacitor element and the twelfth through-hole electrode through the eleventh through-hole electrode. The external output terminal is coupled to the circuit element through the thirteenth through-hole electrode.

Abstract: A semiconductor device including a first semiconductor element mounted on a first surface of a base plate, wherein solder balls are formed on a second opposite surface of the base plate such that the second opposite surface includes an area without solder balls. At least one second semiconductor element is mounted to the base plate at the area of the second surface without solder balls. The at least one semiconductor element may be mounted to the base plate using solder joints.

Abstract: A semiconductor device fabricating method includes forming a plurality of semiconductor devices that include one semiconductor chip and a metal plate having an opening portion that surrounds a region where the semiconductor chip is provided, by cutting, at regions where a frame portion exists, a plate-shaped member that includes: a wiring layer including a wiring portion and an insulating portion; a plurality of semiconductor chips disposed on one surface of the wiring layer; a metal plate disposed at a surface of the wiring layer at a side at which the semiconductor chips are provided, and having a plurality of opening portions that surround regions where the semiconductor chips are provided and the frame portion that forms the opening portions; and a sealing resin layer provided so as to seal at least gaps between the semiconductor chips and the metal plate.

Abstract: Strip metallic thin films each having a width of 180 ?m or so are disposed in parallel at intervals of 10 ?m to 50 ?m on the surface of a protection layer formed on the silicon substrate and at their corresponding spots located on the upper side of an analog circuit formed in a silicon substrate. These strip metallic thin films are connected to one another at their ends or centers to form a comb-like shield section and one end thereof is connected to its corresponding external connecting post. Incidentally, the shield section is formed by copper plating in the same process as redistribution wirings that connect electrode pads at an outer peripheral portion of the silicon substrate to their corresponding external connecting posts.

Abstract: A BGA substrate which has a back surface to which a heat radiating plate 5 is attached and an opening for accommodating a relay wiring substrate therein, which is provided in the center of its surface, is used. The relay wiring substrate to which an ASIC chip and a memory chip are flip-chip connected, is bonded to the heat radiating plate in the opening with a thermal conductive bonding material. Further, each of the back surfaces of the ASIC chip and the memory chip is connected to a metal cap for sealing the opening through a thermal conductive material interposed therebetween.

Abstract: A semiconductor device including a first semiconductor element mounted on a first surface of second semiconductor element, wherein solder balls are formed on the first surface of the second semiconductor element such that the first surface includes an area without solder balls. At least one first semiconductor element is mounted to the second semiconductor element at the area of the first surface without solder balls. The at least one first semiconductor element may be mounted to the second semiconductor element using solder joints.

Abstract: A semiconductor device capable mounting semiconductor elements having different functions without increasing the area of the semiconductor device, and its manufacturing method are presented. A part if wiring 104 is formed al so at the side surface of a semiconducter element 101, and bump electrodes 102 formed so as to be nearly on a same plane as the wiring 104 formed at the side surface of the semiconducter element 101, at least a part of ball electrodes 103 is formed so as to connect electrically to the wiring 104 at the side surface of the semiconductor element, the side surface of the semiconductor element is sealed with resin exposing the wiring 104, and the confronting surface of the circuit forming surface is sealed with resin.

Abstract: A semiconductor apparatus includes a semiconductor device to be mounted on a circuit board; a plurality of conductive posts electrically connected to the semiconductor device; and a plurality of conductive bumps each provided on an outer end of each of the conductive posts, so that the plurality of conductive bump is soldered onto the circuit board when the semiconductor device is mounted on the circuit board. A distance between a peripheral edge of the semiconductor device and an outer edge of the conductive post is determined to be narrow so that a solderbility or wetting condition of the conductive bumps can be visibly recognized easily.

Abstract: A semiconductor device in accordance with the present invention reduces cracks occurring in a junction between a semiconductor device and a mounting substrate due to a heat stress when the semiconductor device is mounted on a printed circuit board or the like. The semiconductor device has a semiconductor element having a thickness of 200 ?m or less, an electrode pad formed an the semiconductor element, a post electrically connected to the electrode pad, and a sealing resin for sealing a surface where circuitry is formed and the post.

Abstract: A semiconductor apparatus includes a semiconductor device to be mounted on a circuit board; a plurality of conductive posts electrically connected to the semiconductor device; and a plurality of conductive bumps each provided on an outer end of each of the conductive posts, so that the plurality of conductive bump is soldered onto the circuit board when the semiconductor device is mounted on the circuit board. A distance between a peripheral edge of the semiconductor device and an outer edge of the conductive post is determined to be narrow so that a solderbility or wetting condition of the conductive bumps can be visibly recognized easily.

Abstract: It is an object of the present invention to provide a semiconductor device that enables the transmission time of a signal and implementation area to be reduced, and a method for manufacturing the same. A semiconductor device includes a first semiconductor substrate, a capacitor chip, an external input terminal, and an external output terminal. The first semiconductor chip includes a first surface, a second surface, an eleventh through-hole electrode, a twelfth through-hole electrode, and a thirteenth through-hole electrode. The capacitor is laminated on the first semiconductor chip and includes a third surface. A capacitor element is formed on the third surface. The capacitor element functions as a condenser component in the periphery of the first semiconductor chip. The external input terminal is electrically coupled to the capacitor element and the twelfth through-hole electrode through the eleventh through-hole electrode.

Abstract: A semiconductor device 10 includes a silicon substrate 20 having a first interconnection layer 24, a second interconnection layer 26, and grooves 22 provided at the second main surface 20b. Mounted on the substrate 20 are one or more semiconductor chips 30 having chip external terminals 32 electrically connected to the first interconnection layer; and one or more peripheral chips 40 electrically connected to the fist interconnection layer on the silicon substrate. By the provision of the grooves 22, the heart radiating property is improved.

Abstract: Strip metallic thin films each having a width of 180 ?m or so are disposed in parallel at intervals of 10 ?m to 50 ?m on the surface of a protection layer formed on the silicon substrate and at their corresponding spots located on the upper side of an analog circuit formed in a silicon substrate. These strip metallic thin films are connected to one another at their ends or centers to form a comb-like shield section and one end thereof is connected to its corresponding external connecting post. Incidentally, the shield section is formed by copper plating in the same process as redistribution wirings that connect electrode pads at an outer peripheral portion of the silicon substrate to their corresponding external connecting posts.

Abstract: A semiconductor device capable mounting semiconductor elements having different functions without increasing the area of the semiconductor device, and its manufacturing method are presented. A part of wiring 104 is formed at the side surface of a semiconductor element 101, and bump electrodes 102 are formed so as to be nearly on a same plane as the wiring 104 formed at the side surface of the semiconductor element 101. At least a part of ball electrodes 103 is formed so as to connect electrically to the wiring 104 at the side surface of the semiconductor element, the side surface of the semiconductor element is sealed with resin exposing the wiring 104, and the confronting surface of the circuit forming surface is sealed with resin.

Abstract: A manufacturing method of a semiconductor device capable of mounting semiconductor elements having different functions without increasing the area of the semiconductor device, wherein a part of a wiring is formed at the side surface of a semiconductor element, and bump electrodes are formed so as to be nearly on a same plane as the wiring formed at the side surface of the semiconductor element. At least a part of ball electrodes are formed so as to connect electrically to the wiring at the side surface of the semiconductor element, the side surface of the semiconductor element is sealed with resin exposing the wiring, and the confronting surface of the circuit forming surface is sealed with resin.

Abstract: A semiconductor apparatus includes a semiconductor device to be mounted on a circuit board; a plurality of conductive posts electrically connected to the semiconductor device; and a plurality of conductive bumps each provided on an outer end of each of the conductive posts, so that the plurality of conductive bump is soldered onto the circuit board when the semiconductor device is mounted on the circuit board. A distance between a peripheral edge of the semiconductor device and an outer edge of the conductive post is determined to be narrow so that a solderbility or wetting condition of the conductive bumps can be visibly recognized easily.

Abstract: The invention provides a semiconductor device and a method for manufacturing the same, enabling the semiconductor device to be high-densely packaged without lowering the final manufacturing yield of products. A semiconductor device 100 includes the first semiconductor device 110 having a plurality of bumps 3 which are formed on the backside surface thereof, and the second semiconductor device 120 having a plurality of terminals 2 which are formed on the front surface thereof and are to be electrically connected with the bumps, the second semiconductor device being mounted on an area which is located on the backside surface of the first semiconductor device 110 without having any bump formed therein. The height of the second semiconductor device measured from the backside surface of the first semiconductor device is made lower than the height of the bump.

Abstract: The invention provides a semiconductor device and a method for manufacturing the same, enabling the semiconductor device to be high-densely packaged without lowering the final manufacturing yield of products. A semiconductor device 100 includes the first semiconductor device 110 having a plurality of bumps 3 which are formed on the backside surface thereof, and the second semiconductor device 120 having a plurality of terminals 2 which are formed on the front surface thereof and are to be electrically connected with the bumps, the second semiconductor device being mounted on an area which is located on the backside surface of the first semiconductor device 110 without having any bump formed therein. The height of the second semiconductor device measured from the backside surface of the first semiconductor device is made lower than the height of the bump.

Abstract: A semiconductor device which is sealed with a plastic sealing layer and whose thickness is regulated to be below a given value is known. Since the thickness of the device is small, and the thickness of the upper portion of the plastic sealing layer and the thickness of the lower portion thereof are different from each other, the plastic sealing layer becomes warped, thus causing a crack on the side of the semiconductor chip. To solve this problem, the semiconductor device according to the present invention comprises a semiconductor chip on which a plurality of grooves are defined. Consequently, the thickness of the lower portion of the plastic layer becomes greater, thereby preventing cracks from occurring on the semiconductor chip.