Abstract: A method is disclosed that includes the operation below. Vertices in a conflict graph are sorted into a first clique and a second clique, in which the conflict graph corresponds to a layout of a circuit. A first vertex of the vertices is merged with a second vertex of the vertices, to generate a reduced graph, in which the first clique excludes the second vertex, and the second clique excludes the first vertex. A first color pattern of a plurality of color patterns is assigned to a first pattern, corresponding to the first vertex, and a second pattern, corresponding to the second vertex, in the layout according to the reduced graph.

Abstract: A method includes accessing data representing a layout of a layer of an integrated circuit (IC) having a plurality of polygons defining circuit patterns to be divided among a number (N) of photomasks over a single layer of a semiconductor substrate, where N is greater than two. The method further includes inputting a conflict graph having a plurality of vertices, identifying a first and second vertex, each of which is connected to a third and fourth vertex where the third and fourth vertices are connected to a same edge of a conflict graph, and merging the first and second vertices to form a reduced graph. The method further includes detecting at least one or more vertex in the reduced having a conflict. In one aspect, the method resolves the detected conflict by performing one of pattern shifting, stitch inserting, or re-routing.

Abstract: A method is performed at least in part by at least one processor. In the method, a plurality of circuit elements are placed in a layout for a semiconductor device, the plurality of circuit elements having a plurality of pins. A layer assignment is generated to assign a plurality of interconnections to corresponding conductive layers of the semiconductor device, the plurality of interconnections connecting corresponding pairs of pins among the plurality of pins. The plurality of interconnections is routed in the layout in accordance with the layer assignment.

Abstract: The present invention proposes a relaxation state evaluation system and method and a computer program product thereof. The method comprises steps: measuring ECG data of a user; analyzing the ECG data to generate a first, second, third and fourth parameters, wherein the first parameter is the short-scale entropy slope of the user before cardiovascular disease treatment (CVDT); the second parameter is the difference of the post-CVDT and pre-CVDT mean RR intervals; the third parameter is the logarithm of the variance of the pre-CVDT high frequency NN intervals; the fourth parameter is the logarithm of the ratio of the variances of the pre-CVDT low frequency and high frequency NN intervals; working out an evaluation index, which is a function of the abovementioned parameters; and evaluating the relaxation state of the user, wherein the user is determined to be in a relaxation state if the evaluation index is over a threshold.

Abstract: The invention provides a data storage device. In one embodiment, the data storage device is coupled to a host, and comprises a flash memory and a controller. The flash memory comprises a spare block pool and a data block pool, wherein the spare block pool comprises a plurality of spare blocks, and the data block pool comprises a plurality of data blocks. The controller receives target data from the host, writes the target data to a current programming data block, determines whether a current programming page is a first page of the current programming data block, determines whether data move information is set when the current page is not the first page, and when the data move information is set, perform a data move process according to the data move information within a limited time period.

Abstract: A paper size detection system includes a paper tray, a width adjuster, a length adjuster, a plurality of sensors, and a signal processor. The paper tray is configured to receive a printing paper and includes a blocking plate. Each of the width adjuster and the length adjuster is movably mounted to the paper tray. The width adjuster, the length adjuster, and the blocking plate cooperatively define a paper placing space with a size substantially equal to a size of the printing paper. The sensors are configured to get a position signal assembly according to positions of the width adjuster and the length adjuster. The signal processor is configured to confirm the size of the paper placing space according the position signal assembly. A paper size detection method is further disclosed.

Abstract: An accessory suitable for an electronic device is provided. The electronic device has a display area. The accessory includes a coupling portion and a cover portion. The coupling portion is suitable to be coupled to the electronic device. The cover portion is connected to the coupling portion and is suitable for covering the display area of the electronic device. The cover portion has a plurality of light-transmitting areas, and the light-transmitting areas are arranged on the display area in an array. An image generated by the display area is projected out of the cover portion through the light-transmitting areas. Moreover, an electronic assembly containing the electronic device and the accessory is also provided. Furthermore, a control method is also provided for controlling the electronic assembly. A method is also provided for forming an accessory.

Abstract: Among other things, one or more systems and techniques for tier based layer modification, such as promotion or demotion, for a design layout are provided herein. A metal scheme describes one or more metal layers of the design layout, which are grouped into a set of tiers based upon resistivity similarity between the metal layers. Wire segments of the design layout are evaluated for promotion to tiers providing improved performance, for demotion to tiers providing decreased performance so that relatively faster routing resources are freed up for other wire segments, or for modification such as widening of wire segments. Via count penalties corresponding to timing delays of additional vias used to reassign wire segments are taken into account during promotion. Routing resource gains associated with reassigning wire segments are taken into account during demotion. In this way, wire segments of the design layout are promoted, demoted, or modified.

Abstract: An accessory suitable for an electronic device is provided. The electronic device has a display area. The accessory includes a coupling portion and a cover portion. The coupling portion is suitable to be coupled to the electronic device. The cover portion is connected to the coupling portion and is suitable for covering the display area of the electronic device. The cover portion has a plurality of light-transmitting areas, and the light-transmitting areas are arranged on the display area in an array. An image generated by the display area is projected out of the cover portion through the light-transmitting areas. Moreover, an electronic assembly containing the electronic device and the accessory is also provided. Furthermore, a control method is also provided for controlling the electronic assembly. A method is also provided for forming an accessory.

Abstract: A method of forming a semiconductor arrangement is provided. The semiconductor arrangement includes an interconnection arrangement comprising a first connection between a driver and a receiver. At least one buffer is disposed along the first connection to reduce delay associated with the interconnection arrangement. However, buffers increase power consumption, and thus a determination is made as to whether a buffer is unnecessary. A buffer is determined to be unnecessary where removal of the buffer does not violate a timing constraint regarding an amount of time a signal takes to go from the driver to the receiver. If a buffer is determined to be unnecessary, the buffer is removed to reduce power consumption.

Abstract: A cloud storage method is applied in a computing device. The computing device connects to a cloud storage device, a database server, and one or more client computers. The computing device establishes one or more data tables in the database server, and records information related to files and folders stored in the cloud storage device in the data tables. In response to a first request for merging multiple folders into a first folder received from a client computer, the computing device creates the first folder in the cloud storage device. The computing device further adds files and sub-folders contained in the multiple folders into the first folder, and adds information related to the first folder into the data tables. The computing device further modifies information related to the files and sub-folders contained in the multiple folders stored in the data table.

Abstract: Embodiments of mechanisms for forming power gating cells and virtual power circuits on multiple active device layers are described in the current disclosure. Power gating cells and virtual power circuits are formed on separate active device layers to allow interconnect structure for connecting with the power source be formed on a separate level from the interconnect structure for connecting the power gating cells and the virtual power circuits. Such separation prevents these two types of interconnect structures from competing for the same space. Routings for both types of interconnect structures become easier. As a result, metal lengths of interconnect structures are reduced and the metal widths are increased. Reduced metal lengths and increased metal widths reduce resistance, improves resistance-capacitance (RC) delay and electrical performance, and improves interconnect reliability, such as reducing electro-migration.

Abstract: An accessory suitable for an electronic device is provided. The electronic device has a display area. The accessory includes a coupling portion and a cover portion. The coupling portion is suitable to be coupled to the electronic device. The cover portion is connected to the coupling portion and is suitable for covering the display area of the electronic device. The cover portion has a plurality of light-transmitting areas, and the light-transmitting areas are arranged on the display area in an array. An image generated by the display area is projected out of the cover portion through the light-transmitting areas. Moreover, an electronic assembly containing the electronic device and the accessory is also provided. Furthermore, a control method is also provided for controlling the electronic assembly. A method is also provided for forming an accessory.

Abstract: A data storage device using a FLASH memory with replay-protected blocks. The storage space of the FLASH memory is divided into blocks and each block is further divided into pages. A controller is provided in the data storage device to couple to the FLASH memory. The controller manages at least one replay-protected memory block of the FLASH memory. The controller programs two pages into the at least one replay-protected memory block and each page is programmed with a write count of the at least one replay-protected memory block.

Abstract: The present invention proposes a relaxation state evaluation system and method and a computer program product thereof. The method comprises steps: measuring ECG data of a user; analyzing the ECG data to generate a first, second, third and fourth parameters, wherein the first parameter is the short-scale entropy slope of the user before cardiovascular disease treatment (CVDT); the second parameter is the difference of the post-CVDT and pre-CVDT mean RR intervals; the third parameter is the logarithm of the variance of the pre-CVDT high frequency NN intervals; the fourth parameter is the logarithm of the ratio of the variances of the pre-CVDT low frequency and high frequency NN intervals; working out an evaluation index, which is a function of the abovementioned parameters; and evaluating the relaxation state of the user, wherein the user is determined to be in a relaxation state if the evaluation index is over a threshold.

Abstract: A paper size detection system includes a paper tray, a width adjuster, a length adjuster, a plurality of sensors, and a signal processor. The paper tray is configured to receive a printing paper and includes a blocking plate. Each of the width adjuster and the length adjuster is movably mounted to the paper tray. The width adjuster, the length adjuster, and the blocking plate cooperatively define a paper placing space with a size substantially equal to a size of the printing paper. The sensors are configured to get a position signal assembly according to positions of the width adjuster and the length adjuster. The signal processor is configured to confirm the size of the paper placing space according the position signal assembly. A paper size detection method is further disclosed.

Abstract: Embodiments of mechanisms for forming power gating cells and virtual power circuits on multiple active device layers are described in the current disclosure. Power gating cells and virtual power circuits are formed on separate active device layers to allow interconnect structure for connecting with the power source be formed on a separate level from the interconnect structure for connecting the power gating cells and the virtual power circuits. Such separation prevents these two types of interconnect structures from competing for the same space. Routings for both types of interconnect structures become easier. As a result, metal lengths of interconnect structures are reduced and the metal widths are increased. Reduced metal lengths and increased metal widths reduce resistance, improves resistance-capacitance (RC) delay and electrical performance, and improves interconnect reliability, such as reducing electro-migration.

Abstract: A data storage includes a flash memory and a controller. The flash memory comprises a spare block pool and a data block pool, wherein the spare block pool comprises a plurality of spare blocks, and the data block pool comprises a plurality of data blocks, wherein the spare blocks with erase counts higher than a hot threshold are determined as hot spare blocks, and a hot spare block count indicates a total number of the hot spare blocks. The controller receives target data from the host, writes the target data to a current data block, determines whether a current programming page is the first page of the current data block, determines whether the hot spare block count is greater than zero when the current programming page is the first page, and sets data move information for a wear-leveling process when the hot spare block count is greater than zero.