Abstract: A request is received to access physical information of a memory unit included in a memory device. A determination is made whether the physical information is available in a physical information table present in a memory cache. If the physical information of the memory unit is available in the table, the physical information is accessed from the table. If the physical information is not available in the table, a global directory in the memory cache is accessed, which indicates locations in a non-volatile memory that store the total number of the physical information blocks. From the global directory, a particular location in the non-volatile memory storing a particular physical information block that includes the physical information of the memory unit is determined. The particular physical information block is loaded into the table and the physical information of the memory unit is accessed from the particular physical information block.

Abstract: A manufacturing method of a substrate structure including vias includes the following steps. A substrate is provided, wherein a material of the substrate includes polyimide. An etching stop layer is formed on the substrate, wherein the etching stop layer covers two opposite surfaces of the substrate. A patterned process is performed on the etching stop layer to form a plurality of openings exposing a part of the substrate. An etching process is performed on the substrate to remove the part of the substrate exposed by the openings and form a plurality of vias.

Abstract: A memory system includes a first flash memory, a second flash memory and a controller. The first flash memory includes a memory array divided into a plurality of pages. The controller is coupled to the first flash memory and the second flash memory and configured to: control the second flash memory to record an address of a particular page in the first flash memory before programming the particular page; and control the second flash memory to record a program status of the particular page after the particular page has been programed.

Abstract: A controlling method, a channel operating circuit and a memory system for executing a plurality of memory dies with single channel are provided. The plurality of memory dies correspond to a plurality of queue sections of a command queue. The controlling method comprises the following steps: A selecting unit selects one of the plurality of queue sections corresponding one of the plurality of memory dies which is riot at a busy state. An executing unit executes a command stored in one of the plurality of queue sections which is selected.

Abstract: A request is received to load a particular overlay segment from a secondary storage memory to a main memory for execution by a processor, wherein the particular overlay segment is absent from the main memory. A determination is made whether the main memory can receive the particular overlay segment. In response to determining that the main memory cannot receive the particular overlay segment, eviction strategy information about one or more existing overlay segments that are present in the main memory is obtained. Based on the eviction strategy information, at least one of the one or more existing overlay segments is selected for eviction from the main memory. The particular overlay segment is retrieved from the secondary storage memory. The at least one of the one or more existing overlay segments in the main memory that is selected for eviction is replaced with the particular overlay segment.

Abstract: A manufacturing method of a substrate structure including vias includes the following steps. A substrate is provided, wherein a material of the substrate includes polyimide. An etching stop layer is formed on the substrate, wherein the etching stop layer covers two opposite surfaces of the substrate. A patterned process is performed on the etching stop layer to form a plurality of openings exposing a part of the substrate. An etching process is performed on the substrate to remove the part of the substrate exposed by the openings and form a plurality of vias.

Abstract: An embedded system includes a program to be executed. The program is divided into overlays. The embedded system includes a processor configured to request one of the overlays. The requested overlay includes a segment of the program to be executed by the processor. The embedded system also includes a first level memory device coupled to the processor. The first level memory device stores less than all of the overlays of the program. The embedded system further includes a memory management unit coupled to the processor and the first level memory device. The memory management unit is configured to determine, based on a logical address provided by the processor, whether the requested overlay is stored in the first level memory device. The memory management unit is additionally configured to convert the logical address to a physical address when the requested overlay is stored in the first level memory device. The physical address points to the requested overlay.

Abstract: A memory system includes a first flash memory, a second flash memory and a controller. The first flash memory includes a memory array divided into a plurality of pages. The controller is coupled to the first flash memory and the second flash memory and configured to: control the second flash memory to record an address of a particular page in the first flash memory before programming the particular page; and control the second flash memory to record a program status of the particular page after the particular page has been programed.

Abstract: A flexible printed circuit board structure includes a spiral flexible printed circuit board and a protection cover capable of providing functions of extensibility and retractility. The spiral flexible printed circuit board includes a flexible substrate curling up spirally, a patterned circuit layer and a plurality of electrical contacts. The patterned circuit layer is disposed on the flexible substrate. The electrical contacts are disposed on an end of the flexible substrate and electrically connected to the patterned circuit layer. The protection cover at least covers a part of the spiral flexible printed circuit board.

Abstract: An embedded system includes a program to be executed. The program is divided into overlays. The embedded system includes a processor configured to request one of the overlays. The requested overlay includes a segment of the program to be executed by the processor. The embedded system also includes a first level memory device coupled to the processor. The first level memory device stores less than all of the overlays of the program. The embedded system further includes a memory management unit coupled to the processor and the first level memory device. The memory management unit is configured to determine, based on a logical address provided by the processor, whether the requested overlay is stored in the first level memory device. The memory management unit is additionally configured to convert the logical address to a physical address when the requested overlay is stored in the first level memory device. The physical address points to the requested overlay.

Abstract: A request is received to access physical information of a memory unit included in a memory device. A determination is made whether the physical information is available in a physical information table present in a memory cache. If the physical information of the memory unit is available in the table, the physical information is accessed from the table. If the physical information is not available in the table, a global directory in the memory cache is accessed, which indicates locations in a non-volatile memory that store the total number of the physical information blocks. From the global directory, a particular location in the non-volatile memory storing a particular physical information block that includes the physical information of the memory unit is determined. The particular physical information block is loaded into the table and the physical information of the memory unit is accessed from the particular physical information block.

Abstract: A request is received to load a particular overlay segment from a secondary storage memory to a main memory for execution by a processor, wherein the particular overlay segment is absent from the main memory. A determination is made whether the main memory can receive the particular overlay segment. In response to determining that the main memory cannot receive the particular overlay segment, eviction strategy information about one or more existing overlay segments that are present in the main memory is obtained. Based on the eviction strategy information, at least one of the one or more existing overlay segments is selected for eviction from the main memory. The particular overlay segment is retrieved from the secondary storage memory. The at least one of the one or more existing overlay segments in the main memory that is selected for eviction is replaced with the particular overlay segment.

Abstract: Systems, methods, and apparatus including computer-readable mediums for detecting data integrity, e.g., read disturbance and/or data retention, of memory systems such as NAND flash memory devices are provided. For detection of read disturbance, an indicator string in a block of a memory can be filled with a predetermined state and read with a special read condition to check read disturbance of the block in one read operation. For detection of data retention, a page of a dedicated block in a memory can be chosen as an indicator page. The indicator page can be filled with a predetermined pattern and read with a proper voltage to quantify a retention shift and further to evaluate other data blocks in the memory with the qualified retention shift. The techniques enable a quick method to examine memory and help to refresh memory before data corruption.

Abstract: A flexible printed circuit board structure includes a spiral flexible printed circuit board and a protection cover capable of providing functions of extensibility and retractility. The spiral flexible printed circuit board includes a flexible substrate curling up spirally, a patterned circuit layer and a plurality of electrical contacts. The patterned circuit layer is disposed on the flexible substrate. The electrical contacts are disposed on an end of the flexible substrate and electrically connected to the patterned circuit layer. The protection cover at least covers a part of the spiral flexible printed circuit board.

Abstract: A method for manufacturing a quantum dot and a quantum dot are provided. The method includes adding a core semiconductor precursor solution into a seed composition solution. The seed composition solution includes a seed composition, and the seed composition is a dendrimer-metal nanoparticle composite. The core semiconductor precursor solution includes a first semiconductor ion and a second semiconductor ion. The method also includes carrying out a first synthesis reaction to form a core semiconductor material wrapping the seed composition. The core semiconductor material is formed by combining the first semiconductor ion with the second semiconductor ion.

Abstract: An apparatus for controlling programming of a non-volatile memory including at least one block partitioned into a plurality of physical sections, each of the physical sections including a plurality of memory cells, the apparatus including a controller configured to access a table including information corresponding to individual ones of the plurality of physical sections. The controller is configured to identify a first programming method for a first physical section of the plurality of physical sections and identify a second programming method for a second physical section of the plurality of physical sections according to information in the table corresponding to the first and second physical sections. The controller is also configured to program the first and second physical sections according to the first and second programming methods for the first and section physical sections, respectively.

Abstract: A memory device includes a first storage unit storing an address mapping table, and a control unit coupled to the first storage unit and including a second storage unit storing a risky mapping table and a cached mapping table. The control unit is configured to: write data into the first storage unit; update mapping information associated with the data in the risky mapping table; and store mapping information in the cached mapping table into the address mapping table.

Abstract: A method for reading data from memory cells of a target word line in a semiconductor memory includes determining a disturbance status of the target word line. The disturbance status reflects a disturbance of a neighboring word line on the memory cells of the target word line. The method further includes determining a read voltage for the target word line according to the disturbance status of the target word line and applying the read voltage to the memory cells of the target word line.

Abstract: A rigid-flex board structure includes a flexible printed circuit (FPC) board, a substrate, a reinforcing layer, a patterned circuit layer and a plurality of conductive vias. The FPC board includes at least one exposing area. The substrate is disposed on the FPC board and includes an opening exposing the exposing area. The reinforcing layer is embedded in the substrate and a rigidity of a material of the reinforcing layer is greater than a rigidity of a material of the substrate. The patterned circuit layer is disposed on the substrate. The conductive vias are configured to electrically connect the patterned circuit layer and the FPC board.

Abstract: A rigid-flex circuit board includes a flexible circuit board, a plurality of patterned photo-imageable substrates and a plurality of patterned circuit layers. The flexible circuit board includes a plurality of exposed regions, a top surface and a bottom surface opposite to the top surface. The exposed regions are respectively located at the top surface and the bottom surface. The patterned photo-imageable substrates are disposed on the top surface and the bottom surface respectively. Each patterned photo-imageable substrate includes an opening exposing the corresponding exposed region. Each patterned photo-imageable substrate includes photo-sensitive material. The patterned circuit layers are disposed on the patterned photo-imageable substrates respectively and expose the exposed regions. A manufacturing method of the rigid-flex circuit board is also provided.