Patents by Inventor Yi Hui

Yi Hui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10337689
    Abstract: The present invention provides a light emitting apparatus and a lighting module, comprising: a circuit substrate, a plurality of optical sources and an optical element; the optical element comprises a translucent element and an interference element; the plurality of light sources are arranged on the circuit substrate for lighting the optical element; the optical element is arranged above the plurality of light sources; and the interference element is arranged on the translucent element, which is used to make light emitted from each of the light sources offset interference in a first polarization direction, enhance interference in a second polarization direction, and emit through the translucent element. The light emitting apparatus and the lighting module of the present invention are employed to provide a more diversified optical pattern to the user and improve the user experience.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: July 2, 2019
    Assignee: EVERLIGHT ELECTRONICS CO., LTD.
    Inventors: Yi-Hui Liao, Chung-Wei Wang, Shun-Chang Li
  • Publication number: 20190160408
    Abstract: Disclosed is glue-free airtight filtering equipment comprising a filter housing, a plurality of filter elements and a plurality of receiving supporting elements, each filter element having a filtering surface, the plurality of filter elements being detachably disposed in the filtering space in a manner that the filtering surface is parallel to the upper surface and the bottom surface of the filter housing, and the plurality of receiving supporting elements allocating on an inner wall of the filter housing and being spaced apart from each other with a designated distance so as to correspondingly receive and support the plurality of filter elements, wherein a gap is provided between the filter element and the inner wall of the filter housing, and the filtering surface of the filter element and the maximum value of the gap satisfy a relational expression.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 30, 2019
    Applicant: GREENFILTEC TAIWAN LIMITED
    Inventors: Ming-Wen HUANG, Yi-Hui YU
  • Publication number: 20190047011
    Abstract: Disclosed is a nebulization device with a spray orifice plate including an energy transfer element, a spray orifice plate and a driving element. The energy transfer element has at least one first penetrating hole for inputting a liquid from a side and the spray orifice plate is installed on at least one side of the energy transfer element for sealing the first penetrating hole, and the energy transfer element supports the spray orifice plate, and the spray orifice plate has at least one stepped orifice formed at a position corresponding to the first penetrating hole and serves as a transportation channel of the liquid, so that the liquid can be temporarily stored in the stepped orifice and sprayed out through the through hole after vibration and nebulization in order to improve the nebulization effect significantly.
    Type: Application
    Filed: October 18, 2018
    Publication date: February 14, 2019
    Inventors: TUN-YING FANG, YAO-FANG KU, YU-TA CHEN, MEI-HUI HUANG, YI-HUI PENG
  • Publication number: 20190017867
    Abstract: The invention provides a light emitting sensing device and a manufacturing method thereof. The light emitting sensing device comprises: a non-translucent substrate having a first surface with at least one recess formed on the first surface; a light emitting element disposed in the at least one recess; a light sensing element disposed on the first surface; a first transparent material disposed in the at least one recess and covering the light emitting element; and a second transparent material disposed on the first surface and covering the light sensing element. The light emitting sensing device provided in this embodiment solves the problem in the prior art, the infrared light emitted by the light emitting chip irradiates into the sensing chip and causes the sensing chip to be interfered by the light of the light emitting chip resulting in reduced sensing accuracy.
    Type: Application
    Filed: July 12, 2018
    Publication date: January 17, 2019
    Applicant: Everlight Electronics Co., Ltd.
    Inventors: SHIH-WEN LAI, CHIH-HAO HSU, YI-HUI LIAO, JIAN-HONG LAI, YI-TING HUANG, KUAN-YU CHEN, SHU-WEI CHEN, CHIEH-YU KANG
  • Patent number: 10144030
    Abstract: Disclosed is a nebulization device with a spray orifice plate including an energy transfer element, a spray orifice plate and a driving element. The energy transfer element has at least one first penetrating hole for inputting a liquid from a side and the spray orifice plate is installed on at least one side of the energy transfer element for sealing the first penetrating hole, and the energy transfer element supports the spray orifice plate, and the spray orifice plate has at least one stepped orifice formed at a position corresponding to the first penetrating hole and serves as a transportation channel of the liquid, so that the liquid can be temporarily stored in the stepped orifice and sprayed out through the through hole after vibration and nebulization in order to improve the nebulization effect significantly.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 4, 2018
    Assignee: MicroBase Technology Corp.
    Inventors: Tun-Ying Fang, Yao-Fang Ku, Yu-Ta Chen, Mei-Hui Huang, Yi-Hui Peng
  • Patent number: 10141263
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate; forming a first gate structure on the substrate, a first spacer around the first gate structure, and an interlayer dielectric (ILD) layer around the first spacer; performing a first etching process to remove part of the ILD layer for forming a recess; performing a second etching process to remove part of the first spacer for expanding the recess; and forming a contact plug in the recess.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: November 27, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Chih-Sen Huang
  • Publication number: 20180283642
    Abstract: The present invention provides a light emitting apparatus and a lighting module, comprising: a circuit substrate, a plurality of optical sources and an optical element; the optical element comprises a translucent element and an interference element; the plurality of light sources are arranged on the circuit substrate for lighting the optical element; the optical element is arranged above the plurality of light sources; and the interference element is arranged on the translucent element, which is used to make light emitted from each of the light sources offset interference in a first polarization direction, enhance interference in a second polarization direction, and emit through the translucent element. The light emitting apparatus and the lighting module of the present invention are employed to provide a more diversified optical pattern to the user and improve the user experience.
    Type: Application
    Filed: February 8, 2018
    Publication date: October 4, 2018
    Applicant: EVERLIGHT ELECTRONICS CO., LTD.
    Inventors: Yi-Hui LIAO, Chung-Wei WANG, Shun-Chang LI
  • Publication number: 20180253737
    Abstract: A mechanism is provided for dynamically evaluating fraud risk. Responsive to receiving a notification, a set of indicators associated with a focal object are automatically analyzed to form a combined assessment. The combined assessment is compared to a set of pattern fraud determinations. The combined assessment is then adjusted based on the set of pattern fraud determinations to dynamically determine a current fraud assessment of the focal object. An action is them performed based on the current fraud assessment.
    Type: Application
    Filed: March 6, 2017
    Publication date: September 6, 2018
    Inventors: Thomas T. Hanis, Eugene I. Kelton, Yi-Hui Ma, Willie R. Patten, JR.
  • Patent number: 10050102
    Abstract: Semiconductor devices and manufacturing method thereof are disclosed. The semiconductor device includes a substrate, a device layer, first and second conductive layers, first and second vias, and a MIM capacitor structure. The substrate includes active and passive regions. The device layer is in the active region. The first conductive layer is over the device layer. The second conductive layer is over the first conductive layer, wherein the first conductive layer is disposed between the device layer and the second conductive layer. The first via electrically connects the first and the second conductive layers. The MIM capacitor structure is between the first and the second conductive layers and in the passive region, and includes first and second electrodes and a capacitor dielectric layer therebetween. The capacitor dielectric layer includes Group IIIA-metal oxide or nitride. The second via electrically connects the second conductive layer and one of the first and second electrodes.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Ching Chang, Cheng-Yi Wu, Jian-Shin Tsai, Min-Hui Lin, Yi-Ming Lin, Chin-Szu Lee, Wen-Shan Chang, Yi-Hui Chen
  • Patent number: 10043888
    Abstract: A method for forming a semiconductor structure includes the following steps. First, a preliminary structure is provided. The preliminary structure includes a substrate and a plurality of fins formed on the substrate. Then, a first polysilicon layer is formed on the substrate. The first polysilicon layer covers at least portions of the fins. An amorphous silicon layer is formed on the first polysilicon layer.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: August 7, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Hui Lin, Keng-Jen Lin, Yu-Ren Wang
  • Publication number: 20180182862
    Abstract: A method for forming a semiconductor structure includes the following steps. First, a preliminary structure is provided. The preliminary structure includes a substrate and a plurality of fins formed on the substrate. Then, a first polysilicon layer is formed on the substrate. The first polysilicon layer covers at least portions of the fins. An amorphous silicon layer is formed on the first polysilicon layer.
    Type: Application
    Filed: December 27, 2016
    Publication date: June 28, 2018
    Inventors: Yi-Hui Lin, Keng-Jen Lin, Yu-Ren Wang
  • Publication number: 20180174970
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate; forming a first gate structure on the substrate, a first spacer around the first gate structure, and an interlayer dielectric (ILD) layer around the first spacer; performing a first etching process to remove part of the ILD layer for forming a recess; performing a second etching process to remove part of the first spacer for expanding the recess; and forming a contact plug in the recess.
    Type: Application
    Filed: February 13, 2018
    Publication date: June 21, 2018
    Inventors: Ching-Wen Hung, Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Chih-Sen Huang
  • Patent number: 9985020
    Abstract: A manufacturing method of a semiconductor structure includes the following steps. An epitaxial region is formed in a semiconductor substrate. A dielectric layer is formed on the epitaxial region, and a contact hole is formed in the dielectric layer. The contact hole exposes a part of the epitaxial region, and an oxide-containing layer is formed on the epitaxial region exposed by the contact hole. A contact structure is formed in the contact hole and on the oxide-containing layer. The oxide-containing layer is located between the contact structure and the epitaxial region. A semiconductor structure includes the semiconductor substrate, at least one epitaxial region, the contact structure, the oxide-containing layer, and a silicide layer. The contact structure is disposed on the epitaxial region. The oxide-containing layer is disposed between the epitaxial region and the contact structure. The silicide layer is disposed between the oxide-containing layer and the contact structure.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: May 29, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Yi-Kuan Wu, Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Chih-Sen Huang, Yi-Wei Chen
  • Patent number: 9984974
    Abstract: A method for fabricating semiconductor device first includes providing a substrate and a shallow trench isolation (STI) in the substrate, in which the substrate includes a first metal gate and a second metal gate thereon, a first hard mask on the first metal gate and a second hard mask on the second metal gate, and a first interlayer dielectric (ILD) layer around the first metal gate and the second metal gate. Next, the first hard mask and the second hard mask as mask are utilized to remove part of the first ILD layer for forming a recess, and a patterned metal layer is formed in the recess and on the STI.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: May 29, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Ling Lin, Chih-Sen Huang, Ching-Wen Hung, Jia-Rong Wu, Tsung-Hung Chang, Yi-Hui Lee, Yi-Wei Chen
  • Publication number: 20180130742
    Abstract: A method for fabricating semiconductor device first includes providing a substrate and a shallow trench isolation (STI) in the substrate, in which the substrate includes a first metal gate and a second metal gate thereon, a first hard mask on the first metal gate and a second hard mask on the second metal gate, and a first interlayer dielectric (ILD) layer around the first metal gate and the second metal gate. Next, the first hard mask and the second hard mask as mask are utilized to remove part of the first ILD layer for forming a recess, and a patterned metal layer is formed in the recess and on the STI.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 10, 2018
    Inventors: Ching-Ling Lin, Chih-Sen Huang, Ching-Wen Hung, Jia-Rong Wu, Tsung-Hung Chang, Yi-Hui Lee, Yi-Wei Chen
  • Patent number: 9953449
    Abstract: A character adjustment method is used for adjusting the character so as to output the character to a second pixel matrix of an output device. The character is designed in a first pixel matrix. The method includes determining a constant, an upper density limit and a lower density limit according to at least one feature value of the output device; performing an interpolation calculation for obtaining a variation parameter according to a density of the character in the first pixel matrix, the constant, the upper density limit and the lower density limit; adjusting the character according to the variation parameter; and outputting the adjusted character to the second pixel matrix by the output device.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: April 24, 2018
    Assignee: ARPHIC TECHNOLOGY CO., LTD.
    Inventors: Yi-Hui Huang, Fu-Sheng Wu, Hsueh-Chih Huang
  • Patent number: 9941215
    Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, a first gate structure is formed on the substrate, a first spacer is formed around the first gate structure, and an interlayer dielectric (ILD) layer is formed around the first spacer. Next, a first etching process is performed to remove part of the ILD layer for forming a recess, a second etching process is performed to remove part of the first spacer for expanding the recess, and a contact plug is formed in the recess.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: April 10, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Jia-Rong Wu, Yi-Hui Lee, Ying-Cheng Liu, Chih-Sen Huang
  • Patent number: D865239
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: October 29, 2019
    Assignee: CUB ELECPARTS INC.
    Inventors: San-Chuan Yu, Ching-Jui Chuang, Yi-Hui Hsu, Cheng-Hsin Li, Wei-Chang Liang, Chi-Ling Chang, Ya-Ling Chi
  • Patent number: D865273
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: October 29, 2019
    Assignee: CUB ELECPARTS INC.
    Inventors: San-Chuan Yu, Ching-Jui Chuang, Yi-Hui Hsu, Cheng-Hsin Li, Wei-Chang Liang, Chi-Ling Chang, Ya-Ling Chi
  • Patent number: D865274
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: October 29, 2019
    Assignee: CUB ELECPARTS INC.
    Inventors: San-Chuan Yu, Ching-Jui Chuang, Yi-Hui Hsu, Cheng-Hsin Li, Wei-Chang Liang, Chi-Ling Chang, Ya-Ling Chi