Patents by Inventor Yi Tang

Yi Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12292689
    Abstract: An alkaline cleaning composition is provided. The alkaline cleaning composition includes an alkaline compound, 5% to 40% by weight of propylene glycol monomethyl ether, 10% to 30% by weight of water, and a polar solvent. Wherein, the polar solvent includes acetals, glycol ethers, pyrrolidones, or a combination thereof, and the alkaline cleaning composition is free of benzenesulfonic acid.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: May 6, 2025
    Assignee: Daxin materials corporation
    Inventors: Hui-yi Tang, Tzu-chi Wang, Yu-nung Chen, Yi-cheng Chen
  • Patent number: 12272928
    Abstract: An optical transmission module includes a housing having a cavity therein and an optical transmission device encapsulated in the cavity. The optical transmission device includes an optical waveguide substrate, laser assemblies, an optical multiplexing assembly and main waveguides. The optical waveguide substrate includes a surface and a first reflection inclined surface having an acute angle therebetween. The laser assemblies are disposed on the surface of the optical waveguide substrate, and are configured to emit laser beams towards the surface of the optical waveguide substrate. The optical multiplexing assembly is disposed in the optical waveguide substrate, and is configured to combine the laser beams into a laser beam. The main waveguides are disposed inside the optical waveguide substrate, light inlet ends of the main waveguides face the first inclined surface, and light outlet ends of the main waveguides are communicated with the optical multiplexing assembly.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: April 8, 2025
    Assignee: HISENSE BROADBAND MULTIMEDIA TECHNOLOGIES CO., LTD.
    Inventors: Yi Tang, Jinlei Chen, Feng Cui, Yifan Xie, Qinhao Fu, Lin Yu
  • Patent number: 12263457
    Abstract: A homogenization apparatus for pepper raw materials, including a base, and an annular storage tank and a stirring barrel fixed to the base. The stirring barrel is positioned under the storage tank, the bottom center of the stirring barrel is fixedly connected to a stationary shaft, the stirring barrel is rotationally drivable to rotate together with the stationary shaft about the axis of the stationary shaft, the stationary shaft extends upward into the storage tank, a sleeve is provided on an outer side of the stationary shaft, the sleeve is rotatably connected to the stationary shaft, so that the stirring barrel rotates relative to the storage tank; a portion of the sleeve accommodated in the stirring barrel is fixedly connected with a stirring part, an upper end of the stationary shaft is fixedly connected with a connecting plate.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 1, 2025
    Assignee: CHONGQING DEZHUANG AGRICULTURAL PRODUCTS DEVELOPMENT CO., LTD.
    Inventors: Dejian Li, Shubang Lu, Li Zhang, Decai Zhou, Qinsong Yue, Yangmei Li, Yi Tang
  • Publication number: 20250093385
    Abstract: A probe card for a circuit probe test system and methods of fabrication thereof. The probe card includes a substrate portion, a guide plate having a plurality of openings, and a plurality of probe pins extending through the openings, including at least one first probe pin configured to carry power between the substrate portion and a device-under-test (DUT), at least one second probe pin configured to electrically couple the DUT to ground, and at least two third probe pins configured to carry loopback test signals between contact regions on the DUT. A low dielectric constant (low-k) material may be located between the third probe pins and the guide plate. The low-k material may prevent direct contact between the third probe pins and the relatively higher dielectric-constant material of the guide plate, which may improve the signal integrity (SI) of the loopback test signals.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 20, 2025
    Inventors: Kuan Chun CHEN, Shu An SHANG, Kai-Yi TANG, Guang-Sing HUANG
  • Publication number: 20250086872
    Abstract: Rigid accessory adjustment provides dynamic manipulation of accessories, such as clothing items, headgear, weapons, and ornaments, attached to virtual game three-dimensional (3D) avatars. The rigid accessories maintain a constant shape, allowing players to fine-tune the position, rotation, and scaling of accessories. An accessory adjustment tool is used for fitting or styling of rigid accessories on 3D avatars, including changing position, rotation, and scaling of the rigid accessories. The rigid accessory adjustment include providing an avatar in a 3D virtual environment, providing a rigid accessory for the avatar body, performing at least one adjustment from the group comprising adjusting a position, adjusting a rotation, and adjusting a scale of the rigid accessory relative to the avatar body, and animating the avatar body, wherein the rigid accessory animates in correspondence with the animated avatar body.
    Type: Application
    Filed: September 6, 2024
    Publication date: March 13, 2025
    Applicant: Roblox Corporation
    Inventors: Brandon TRAN, David SAPIENZA, Alexander EHRATH, Faraz BAGHERNEZHAD, Jared KIRK, Priyal MEHTA, Liz GATAPIA, Padi Yi TANG
  • Publication number: 20250079327
    Abstract: Semiconductor package and method of manufacturing are presented herein. In an embodiment, a device is provided that includes a first semiconductor component embedded in a first core substrate, a first redistribution layer on a first side of the first core substrate, a second redistribution layer on a second side of the first core substrate opposite the first side, a first resin film over the second redistribution layer, a second semiconductor component embedded in a second core substrate, a third redistribution layer on a third side of the second core substrate, wherein the third redistribution layer is bonded to the second redistribution layer by the first resin film, a fourth redistribution layer on a fourth side of the second core substrate opposite the third side, and a through hole via extending through the first redistribution layer, the first core substrate, the second redistribution layer, the third redistribution layer, the second core substrate, and the fourth redistribution layer.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 6, 2025
    Inventors: Yu-Huan Chen, Kai-Yi Tang, Kuo-Ching Hsu
  • Publication number: 20250071976
    Abstract: A semiconductor structure includes a substrate, a stacked structure, a signal line group, and a first staircase structure. The stacked structure is located on the substrate, and includes multiple storage layers arranged at intervals in a first direction, and each storage layer includes multiple memory cells arranged at intervals in a second direction. The signal line group includes multiple signal lines arranged at intervals in the first direction, and each signal line is electrically connected to the memory cells. The first staircase structure includes first stairs electrically connected to the signal lines, each first stair protrudes from a corresponding signal line in a third direction, and projections of the multiple first stairs on a top surface of the substrate are arranged in the second direction.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Inventors: Mengmeng YANG, Yi TANG
  • Publication number: 20250071974
    Abstract: Disclosed are a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure includes a base substrate provided thereon with stacks and first isolation layers alternately arranged in a first direction. The stack includes active structures and second isolation layers alternately arranged in a third direction. The active structure is provided with two first recesses therein. In the third direction, a thickness of the first recess is the same as a thickness of the active structure. The active structure is provided with one capacitor on each of opposite sides thereof, and the capacitor includes an upper electrode, a dielectric layer, and a lower electrode. The lower electrode is located on an inner wall of the first recess. The upper electrode is located between two adjacent stacks and is arranged opposite to the first recess, and the upper electrode also penetrates through the first isolation layer.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Inventors: Mengmeng YANG, Yi TANG
  • Publication number: 20250071997
    Abstract: A method for forming a semiconductor structure includes: forming a stack structure of alternately stacked dielectric layers and semiconductor layers on a substrate; forming isolation structures penetrating through the stack structure, and extending into the substrate, where the isolation structures separate the stack structure into sub-stack structures; forming word line openings extending along a third direction in each of the isolation structures, where a bottom surface of each of the word line openings is lower than a bottom surface of a semiconductor layer closest to the substrate, and each of the word line openings is located between one of the sub-stack structures and one of the isolation structures; forming an insulating structure between each of the word line openings and the substrate; and forming a word line structure in each of the word line openings.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicant: CXMT Corporation
    Inventors: Sijia LI, Yi TANG
  • Patent number: 12230736
    Abstract: The present disclosure provides a semiconductor light-emitting device and a semiconductor light-emitting component. The semiconductor light-emitting device includes a substrate, a first semiconductor contact layer, a semiconductor light-emitting stack including an active layer, a first-conductivity-type contact structure, a second semiconductor contact layer, a second-conductivity-type contact structure and a first electrode pad. The first-conductivity-type contact structure is electrically connected to the first semiconductor contact layer. The second-conductivity-type contact structure is electrically connected to the second semiconductor contact layer. The first-conductivity-type contact structure has a first bottom surface and a first top surface, and the active layer has a second bottom surface and a second top surface.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: February 18, 2025
    Assignee: EPISTAR CORPORATION
    Inventors: Jian-Zhi Chen, Yen-Chun Tseng, Hui-Fang Kao, Yao-Ning Chan, Yi-Tang Lai, Yun-Chung Chou, Shih-Chang Lee, Chen Ou
  • Publication number: 20250048539
    Abstract: A printed circuit board comprising a differential microstrip pair including a neck-down area and an ultraviolet glue coating a portion of the neck-down area of the differential microstrip pair to control an impedance of the differential microstrip pair.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 6, 2025
    Inventors: Pei-Ju Lin, Chang-Hsien Chen, Bhyrav Mutnury, Yi-Tang Chen
  • Patent number: 12218239
    Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: February 4, 2025
    Assignee: Mosaid Technologies Incorporated
    Inventors: Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
  • Publication number: 20250026811
    Abstract: The present disclosure provides compositions and methods for treating a disease or condition in a subject in need thereof, comprising administering to the subject a pharmaceutically effective amount of a composition comprising a plurality of particles comprising at least one therapeutic biologic suspended in a pharmaceutically acceptable liquid carrier.
    Type: Application
    Filed: October 4, 2024
    Publication date: January 23, 2025
    Inventors: Paul Brown, Tyler L. Carter, Lyndon Fitzgerald Charles, JR., Chase Spenser Coffman, Daniel Benjamin Dadon, Lisa Liu, Sadiqua Shadbar, Chaitanya Sudrik, Yi Tang, Shankul Vartak
  • Publication number: 20240427558
    Abstract: A graphic design implementation system provides a design interface to render at least a portion of a graphic design and a code interface to render a code representation for at least a portion of the graphic design. Providing the code interface includes executing one or more plugins to generate the code representation, the one or more plugins including at least a first plugin that is selectable by a user to configure the generation of the code representation in accordance with one or more preferences.
    Type: Application
    Filed: June 20, 2024
    Publication date: December 26, 2024
    Inventors: Sawyer Hood, Rohit Chouhan, Elizbeth Avery Frankenberg, Yi Tang Jackie Chui, Michael Yong, Bersabel Tadesse
  • Patent number: 12176213
    Abstract: Embodiments of the present disclosure provide a semiconductor structure and a manufacturing method thereof. The method includes: providing a substrate, wherein the substrate includes a word line region, a bit line region, and a capacitive region arranged adjacently; forming a first stacked structure that covers a surface of the substrate, wherein the first stacked structure includes a first sacrificial layer located on the surface of the substrate and a first semiconductor layer located on a surface of the first sacrificial layer; forming a second stacked structure that covers a surface of the first stacked structure, wherein the second stacked structure includes a second sacrificial layer located on the surface of the first stacked structure and a second semiconductor layer located on a surface of the second sacrificial layer; and performing an ion implantation on the first semiconductor layer and the second semiconductor layer.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: December 24, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yi Tang
  • Patent number: 12174082
    Abstract: An integrated detection test device for a drill bit and a rotary blowout preventer and a detection method thereof are provided. The test device includes a support frame, a rotary shaft is mounted on the support frame, and an upper end of the rotary shaft is connected to a piston rod of a first hydraulic cylinder fixed on the support frame; and the rotary shaft is connected to a driving device through a rotary disc sleeved outside the rotary shaft. A pit sinking to a fixing plane of the support frame is arranged below the support frame; and an L-shaped track and a transport vehicle slidably connected to the track are mounted in the pit and used to transport the rotary blowout preventer or the drill bit test bench to a test position.
    Type: Grant
    Filed: July 24, 2024
    Date of Patent: December 24, 2024
    Assignees: Sichuan Hongda Security Technology Service Co., Ltd, Sichuan Kete Testing Technology Co., Ltd
    Inventors: Yonggang Deng, Shundong Tang, Gang Wang, Wenbin Chen, Yi Tang, Shanji Wang, Jiajie Ye, Tao Yuan, Qi Yang, Xudong Wang, Yuke You, Zhe Wang, Jian Zhang, Hanjun Liu, Heng Yang, Xun Cai
  • Publication number: 20240390525
    Abstract: Disclosed herein is a device for producing NIR-II contrast agents from fluorescent substances and serum albumin. The device comprises a first container, a mixing vessel, a first tube, and a first flow adjusting valve. According to the embodiments of the present disclosure, the first container and the mixing vessel are connected through the first tube, and the first flow adjusting valve is coupled to the first tube. Also disclosed herein are methods for producing the NIR-II contrast agents by using the present device.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 28, 2024
    Applicant: Chung Yuan Christian University
    Inventors: Cheng-An LIN, Chien-Liang LIU, Yi-Tang SUN
  • Patent number: 12156372
    Abstract: In one embodiment, an apparatus includes an enclosure configured for connection to a printed circuit board, a substrate within the enclosure, a plurality of components mounted on the substrate, a fluid inlet connector, a fluid outlet connector, and a plurality of flow channels within the enclosure, at least one of the components disposed in each the flow channels and segregated from other components in another of the flow channels. The enclosure is configured for immersion cooling of the components.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: November 26, 2024
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: M. Baris Dogruoz, Mark Nowell, Yi Tang, Rakesh Chopra, Mandy Hin Lam
  • Patent number: D1059359
    Type: Grant
    Filed: October 28, 2024
    Date of Patent: January 28, 2025
    Assignees: SHENZHEN SEENDA TECHNOLOGY CO., LTD., SHENZHEN NEWUNITE ELECTRONIC CO., LTD.
    Inventors: Yi Tang, Fating Mei, Yanyan Zhu
  • Patent number: D1062026
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: February 11, 2025
    Assignee: EPISTAR CORPORATION
    Inventors: Hui-Fang Kao, Yao-Ning Chan, Yi-Tang Lai, Yun-Chung Chou, Shih-Chang Lee, Chen Ou