Patents by Inventor Yi-Wei Chen

Yi-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071982
    Abstract: In an embodiment, a device bonding apparatus is provided. The device bonding apparatus includes a first process station configured to receive a wafer; a first bond head configured to carry a die to the wafer, wherein the first bonding head includes a first rigid body and a vacuum channel in the first rigid body for providing an attaching force for carrying the die to the wafer; and a second bond head configured to press the die against the wafer, the second bond head including a second rigid body and an elastic head disposed over the second rigid body for pressing the die, the elastic head having a center portion and an edge portion surrounding the center portion, the center portion of the elastic head having a first thickness, the edge portion of the elastic head having a second thickness, the second thickness being greater than the second thickness.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Yi-Jung Chen, Tsung-Fu Tsai, Szu-Wei Lu
  • Publication number: 20240071833
    Abstract: The present disclosure relates to a semiconductor device with a hybrid fin-dielectric region. The semiconductor device includes a substrate, a source region and a drain region laterally separated by a hybrid fin-dielectric (HFD) region. A gate electrode is disposed above the HFD region and the HFD region includes a plurality of fins covered by a dielectric and separated from the source region and the drain region by the dielectric.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Yi-Huan Chen, Huan-Chih Yuan, Yu-Chang Jong, Scott Yeh, Fei-Yun Chen, Yi-Hao Chen, Ting-Wei Chou
  • Patent number: 11913047
    Abstract: A method for producing ?-aminobutyric acid includes cultivating, in a culture medium containing glutamic acid or a salt thereof, a probiotic composition including at least one lactic acid bacterial strain selected from the group consisting of Bifidobacterium breve CCFM1025 which is deposited at the Guangdong Microbial Culture Collection Center under an accession number GDMCC 60386, Lactobacillus acidophilus TYCA06, Lactobacillus plantarum LPL28, and Bifidobacterium longum subsp. infantis BLI-02 which are deposited at the China General Microbiological Culture Collection Center respectively under accession numbers CGMCC 15210, CGMCC 17954, and CGMCC 15212, Lactobacillus salivarius subsp. salicinius AP-32 which is deposited at the China Center for Type Culture Collection under an accession number CCTCC M 2011127, and combinations thereof.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 27, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Chen-Hung Hsu, Wen-Yang Lin, Yi-Wei Kuo, Shin-Yu Tsai
  • Patent number: 11883961
    Abstract: A method includes, during a processing cycle: navigating the sanding head across a region of a workpiece according to a toolpath; and, based on a sequence of force values output by a force sensor coupled to the sanding head, deviating the sanding head from the toolpath to maintain forces of the sanding head on the workpiece region proximal a target force. The method also includes: detecting a sequence of positions of the sanding head traversing the workpiece region; interpreting a surface contour in the workpiece region based on the sequence of positions; detecting a difference between the surface contour and a corresponding target surface defined in a target model of the workpiece; generating a second toolpath for the workpiece region based on the difference; and, during a second processing cycle, navigating the sanding head across the workpiece region according to the second toolpath to reduce the difference.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: January 30, 2024
    Assignee: GrayMatter Robotics Inc.
    Inventors: Avadhoot L. Ahire, Yi-Wei Chen, Satyandra K Gupta, Ariyan M. Kabir, Ashish Kulkarni, Ceasar G. Navarro, Jr., Martin G. Philo, Brual C. Shah
  • Patent number: 11877433
    Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: January 16, 2024
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Pin-Hong Chen, Tsun-Min Cheng, Chih-Chieh Tsai, Tzu-Chieh Chen, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang, Yi-Wei Chen, Hsin-Fu Huang, Chi-Mao Hsu, Li-Wei Feng, Ying-Chiao Wang, Chung-Yen Feng
  • Publication number: 20240007460
    Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Inventors: Fei-Yang Jen, Yi Wei Chen, Jaemin Jin, Hanyu Xue, Wentao Liu, Shang Li
  • Publication number: 20230381961
    Abstract: A method includes, during a processing cycle: navigating the sanding head across a region of a workpiece according to a toolpath; and, based on a sequence of force values output by a force sensor coupled to the sanding head, deviating the sanding head from the toolpath to maintain forces of the sanding head on the workpiece region proximal a target force. The method also includes: detecting a sequence of positions of the sanding head traversing the workpiece region; interpreting a surface contour in the workpiece region based on the sequence of positions; detecting a difference between the surface contour and a corresponding target surface defined in a target model of the workpiece; generating a second toolpath for the workpiece region based on the difference; and, during a second processing cycle, navigating the sanding head across the workpiece region according to the second toolpath to reduce the difference.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Avadhoot L. Ahire, Yi-Wei Chen, Satyandra K Gupta, Ariyan M. Kabir, Ashish Kulkarni, Ceasar G. Navarro, JR., Martin G. Philo, Brual C. Shah
  • Patent number: 11818120
    Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: November 14, 2023
    Assignee: Magic Labs, Inc.
    Inventors: Fei-Yang Jen, Yi Wei Chen, Jaemin Jin, Hanyu Xue, Wentao Liu, Shang Li
  • Patent number: 11799012
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a silicon layer on a substrate and then forming a metal silicon nitride layer on the silicon layer, in which the metal silicon nitride layer includes a bottom portion, a middle portion, and a top portion and a concentration of silicon in the top portion is greater than a concentration of silicon in the middle portion. Next, a conductive layer is formed on the metal silicon nitride layer and the conductive layer, the metal silicon nitride layer, and the silicon layer are patterned to form a gate structure.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: October 24, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chun-Chieh Chiu, Pin-Hong Chen, Yi-Wei Chen, Tsun-Min Cheng, Chih-Chien Liu, Tzu-Chieh Chen, Chih-Chieh Tsai, Kai-Jiun Chang, Yi-An Huang, Chia-Chen Wu, Tzu-Hao Liu
  • Patent number: 11764229
    Abstract: A pixel array substrate, including a substrate, multiple conductors, a pixel driving circuit, a first pad, and a second pad, is provided. The substrate has a first surface, a second surface, and multiple through holes. The through holes extend from the first surface to the second surface. The conductors are respectively disposed in the through holes. The pixel driving circuit is disposed on the first surface of the substrate. The first pad and the second pad are disposed on the second surface of the substrate. The conductors include a first conductor, a second conductor, and a first dummy conductor. The first conductor is electrically connected to the pixel driving circuit and the first pad. The second conductor is electrically connected to the pixel driving circuit and the second pad. The first dummy conductor is overlapped with and electrically isolated from the pixel driving circuit.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: September 19, 2023
    Assignee: Au Optronics Corporation
    Inventors: Hsiu-Chun Hsieh, Hsin-Hung Sung, Shu-Hui Huang, Chih-Chung Su, Yi-Wei Chen, Fang-Hui Chan
  • Publication number: 20230292498
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Application
    Filed: May 18, 2023
    Publication date: September 14, 2023
    Applicants: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Patent number: 11747688
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first substrate, a second substrate opposite to the first substrate, a buffer layer disposed on the second substrate, a protection layer, an active array, a pixel array, and an alignment film. The first substrate includes a transmitting region, a display region surrounding the transmission region, and a periphery region surrounding the display region. The protection layer is disposed on the buffer layer. The active array is disposed on the buffer layer. The pixel array is disposed on the active array and electrically connected to the active array. The alignment film is conformally disposed on the protection layer and the second substrate. The alignment film includes a first portion in direct contact with the second substrate. A vertical projection of the first portion of the alignment film overlaps the transmitting region of the first substrate.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: September 5, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chih-Chung Su, Yi-Wei Chen
  • Patent number: 11711916
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: July 25, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Publication number: 20230139222
    Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 4, 2023
    Inventors: Fei-Yang Jen, Yi Wei Chen, Jaemin Jin, Hanyu Xue, Wentao Liu, Shang Li
  • Patent number: 11637136
    Abstract: A display device, including a pixel array substrate and a sensor element substrate, is provided. The sensor element substrate overlaps the pixel array substrate, and includes a substrate, a switch element, and a photosensitive element. The switch element is located on the substrate. The photosensitive element is electrically connected to the switch element, and includes a transparent electrode, a sensing layer, a metal electrode, and a barrier layer. The sensing layer is located on the transparent electrode. The metal electrode is located on the sensing layer, and covers a first sidewall of the sensing layer. The barrier layer covers a first sidewall of the transparent electrode. The barrier layer is located between the metal electrode and the sensing layer, or between the transparent electrode and the sensing layer.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: April 25, 2023
    Assignee: Au Optronics Corporation
    Inventors: Shin-Shueh Chen, Yi-Wei Chen
  • Publication number: 20230070726
    Abstract: A power converter is provided. The power converter includes a housing, a heat dissipation module, and a first circuit board. The housing forms a receiving space, wherein the housing includes a first housing port and a second housing port. The heat dissipation module is detachably connected to the housing, and disposed in the receiving space. The heat dissipation module includes an inner path that communicates the first housing port with the second housing port. Working fluid enters the inner path via the first housing port. The working fluid leaves the inner path via the second housing port. The first circuit board includes a first circuit board body and a first heat source, wherein the first heat source is disposed on the first circuit board body, and the first heat source is thermally connected to the inner path of the heat dissipation module.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 9, 2023
    Inventors: Sheng-Nan TSAI, Ying-Chung CHUANG, Chia-Jung LIU, Yi-Wei CHEN, Han-Yu TAI, Shao-Hsiang LO
  • Patent number: 11557799
    Abstract: A backup battery system includes a charging-discharging module and a battery module. The charging-discharging module includes a first connector and a first engaging member. The battery module is detachably connected to the charging-discharging module and includes a second connector corresponding to the first connector and a second engaging member corresponding to the first engaging member. When the battery module is connected to the charging-discharging module, the first connector is joined with the second connector and the first engaging member is fixed to the second engaging member.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 17, 2023
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Shin Yi Low, Wen-Lung Liang, Yi-Wei Chen, Wei-Hao Liang
  • Patent number: 11546321
    Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: January 3, 2023
    Assignee: Magic Labs, Inc.
    Inventors: Fei-Yang Jen, Yi Wei Chen, Jaemin Jin, Hanyu Xue, Wentao Liu, Shang Li
  • Patent number: 11547026
    Abstract: A power converter is provided. The power converter includes a housing, a heat dissipation module, and a first circuit board. The housing forms a receiving space, wherein the housing includes a first housing port and a second housing port. The heat dissipation module is detachably connected to the housing, and disposed in the receiving space. The heat dissipation module includes an inner path that communicates the first housing port with the second housing port. Working fluid enters the inner path via the first housing port. The working fluid leaves the inner path via the second housing port. The first circuit board includes a first circuit board body and a first heat source, wherein the first heat source is disposed on the first circuit board body, and the first heat source is thermally connected to the inner path of the heat dissipation module.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: January 3, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sheng-Nan Tsai, Ying-Chung Chuang, Chia-Jung Liu, Yi-Wei Chen, Han-Yu Tai, Shao-Hsiang Lo