Patents by Inventor Yi-Wei Chen

Yi-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11747688
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first substrate, a second substrate opposite to the first substrate, a buffer layer disposed on the second substrate, a protection layer, an active array, a pixel array, and an alignment film. The first substrate includes a transmitting region, a display region surrounding the transmission region, and a periphery region surrounding the display region. The protection layer is disposed on the buffer layer. The active array is disposed on the buffer layer. The pixel array is disposed on the active array and electrically connected to the active array. The alignment film is conformally disposed on the protection layer and the second substrate. The alignment film includes a first portion in direct contact with the second substrate. A vertical projection of the first portion of the alignment film overlaps the transmitting region of the first substrate.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: September 5, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chih-Chung Su, Yi-Wei Chen
  • Patent number: 11711916
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: July 25, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Publication number: 20230139222
    Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 4, 2023
    Inventors: Fei-Yang Jen, Yi Wei Chen, Jaemin Jin, Hanyu Xue, Wentao Liu, Shang Li
  • Patent number: 11637136
    Abstract: A display device, including a pixel array substrate and a sensor element substrate, is provided. The sensor element substrate overlaps the pixel array substrate, and includes a substrate, a switch element, and a photosensitive element. The switch element is located on the substrate. The photosensitive element is electrically connected to the switch element, and includes a transparent electrode, a sensing layer, a metal electrode, and a barrier layer. The sensing layer is located on the transparent electrode. The metal electrode is located on the sensing layer, and covers a first sidewall of the sensing layer. The barrier layer covers a first sidewall of the transparent electrode. The barrier layer is located between the metal electrode and the sensing layer, or between the transparent electrode and the sensing layer.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: April 25, 2023
    Assignee: Au Optronics Corporation
    Inventors: Shin-Shueh Chen, Yi-Wei Chen
  • Publication number: 20230070726
    Abstract: A power converter is provided. The power converter includes a housing, a heat dissipation module, and a first circuit board. The housing forms a receiving space, wherein the housing includes a first housing port and a second housing port. The heat dissipation module is detachably connected to the housing, and disposed in the receiving space. The heat dissipation module includes an inner path that communicates the first housing port with the second housing port. Working fluid enters the inner path via the first housing port. The working fluid leaves the inner path via the second housing port. The first circuit board includes a first circuit board body and a first heat source, wherein the first heat source is disposed on the first circuit board body, and the first heat source is thermally connected to the inner path of the heat dissipation module.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 9, 2023
    Inventors: Sheng-Nan TSAI, Ying-Chung CHUANG, Chia-Jung LIU, Yi-Wei CHEN, Han-Yu TAI, Shao-Hsiang LO
  • Patent number: 11557799
    Abstract: A backup battery system includes a charging-discharging module and a battery module. The charging-discharging module includes a first connector and a first engaging member. The battery module is detachably connected to the charging-discharging module and includes a second connector corresponding to the first connector and a second engaging member corresponding to the first engaging member. When the battery module is connected to the charging-discharging module, the first connector is joined with the second connector and the first engaging member is fixed to the second engaging member.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 17, 2023
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Shin Yi Low, Wen-Lung Liang, Yi-Wei Chen, Wei-Hao Liang
  • Patent number: 11546321
    Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: January 3, 2023
    Assignee: Magic Labs, Inc.
    Inventors: Fei-Yang Jen, Yi Wei Chen, Jaemin Jin, Hanyu Xue, Wentao Liu, Shang Li
  • Patent number: 11547026
    Abstract: A power converter is provided. The power converter includes a housing, a heat dissipation module, and a first circuit board. The housing forms a receiving space, wherein the housing includes a first housing port and a second housing port. The heat dissipation module is detachably connected to the housing, and disposed in the receiving space. The heat dissipation module includes an inner path that communicates the first housing port with the second housing port. Working fluid enters the inner path via the first housing port. The working fluid leaves the inner path via the second housing port. The first circuit board includes a first circuit board body and a first heat source, wherein the first heat source is disposed on the first circuit board body, and the first heat source is thermally connected to the inner path of the heat dissipation module.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: January 3, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sheng-Nan Tsai, Ying-Chung Chuang, Chia-Jung Liu, Yi-Wei Chen, Han-Yu Tai, Shao-Hsiang Lo
  • Publication number: 20220413345
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first substrate, a second substrate opposite to the first substrate, a buffer layer disposed on the second substrate, a protection layer, an active array, a pixel array, and an alignment film. The first substrate includes a transmitting region, a display region surrounding the transmission region, and a periphery region surrounding the display region. The protection layer is disposed on the buffer layer. The active array is disposed on the buffer layer. The pixel array is disposed on the active array and electrically connected to the active array. The alignment film is conformally disposed on the protection layer and the second substrate. The alignment film includes a first portion in direct contact with the second substrate. A vertical projection of the first portion of the alignment film overlaps the transmitting region of the first substrate.
    Type: Application
    Filed: September 1, 2022
    Publication date: December 29, 2022
    Inventors: Chih-Chung SU, Yi-Wei CHEN
  • Patent number: 11480835
    Abstract: An electronic device includes a first substrate, a second substrate, a buffer layer, an active array, a pixel array, a protection layer and an alignment film. The first substrate includes a transmission region, a display region, and a periphery region. The periphery region surrounds the display region, and the display region surrounds the transmission region. The first substrate is disposed opposite to the second substrate. The buffer layer is disposed on the second substrate. The protection layer is disposed on the buffer layer, and a projection of the protection layer on the second substrate is apart from the transmission region. The active array is disposed on the buffer layer. The pixel array is disposed on the active array and is electrically connected to the active array. The alignment film is conformally disposed on the protection layer, the buffer layer, and the second substrate.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: October 25, 2022
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chih-Chung Su, Yi-Wei Chen
  • Publication number: 20220305304
    Abstract: A thermoresponsive facial mask has a non-woven fabric structure with multiple layers, wherein at last one of the layers of the non-woven fabric structure has far-infrared hollow fibers. The far-infrared hollow fibers content far-infrared powers that emit a far-infrared radiation. A formula for the thermoresponsive facial mask has a polyalcohol and a germanium element, which promotes the thermoresponsive facial mask to generate an advantage of forming the warming effect automatically.
    Type: Application
    Filed: March 21, 2022
    Publication date: September 29, 2022
    Inventors: Yi Wei Chen, Kuo Pin Cheng, Wei Hao Lee, Ta Wui Cheng, Ke Yang Chen
  • Patent number: 11456129
    Abstract: A key structure includes a protective cover and a keycap. The keycap includes flow-guiding bevel surface. When the protective cover and the keycap are adhered on each other through a glue material, an excess portion of the glue material is retained on the flow-guiding bevel surface. Consequently, the excess portion of the glue material will not spread to other regions.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: September 27, 2022
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Ming-Han Wu, Yi-Wei Chen, Hsien-Tsan Chang
  • Publication number: 20220293361
    Abstract: A key structure includes a protective cover and a keycap. The keycap includes flow-guiding bevel surface. When the protective cover and the keycap are adhered on each other through a glue material, an excess portion of the glue material is retained on the flow-guiding bevel surface. Consequently, the excess portion of the glue material will not spread to other regions.
    Type: Application
    Filed: October 22, 2021
    Publication date: September 15, 2022
    Inventors: Ming-Han Wu, Yi-Wei Chen, Hsien-Tsan Chang
  • Publication number: 20220254968
    Abstract: An electronic device, including an active device substrate, an insulation film, a vertical wire, and an anisotropic conductive adhesive, is provided. The active device substrate includes a substrate, a first wire, and a second wire. The first wire is configured on a first surface of the substrate, the second wire is configured on a second surface of the substrate, and a side surface connects the first surface to the second surface that is opposite to the first surface. The insulation film is configured on the side surface of the substrate. The vertical wire is configured on a surface of the insulation film and is located between the insulation film and the side surface of the substrate. The anisotropic conductive adhesive is configured between the vertical wire and the side surface of the substrate and electrically connects the vertical wire to the first wire and the second wire.
    Type: Application
    Filed: July 8, 2021
    Publication date: August 11, 2022
    Applicant: Au Optronics Corporation
    Inventors: Hsin-Hung Sung, Yi-Wei Chen
  • Publication number: 20220234342
    Abstract: A method of attaching an elastic protective film on an object is provided. Firstly, the object is provided. Then, an adhesive layer is installed on the object. Then, the elastic protective film is provided. Then, a buffering element is provided. Then, a piercing element is provided. A side of the piercing element facing the buffering element includes plural needle-like structures. Then, the piercing element and the buffering element are pressed on the elastic protective film, the adhesive layer and the object along a first direction. Consequently, the buffering element and the elastic protective film are pierced by the plural needle-like structures. Then, the piercing element and the buffering element are removed along a second direction, wherein the second direction is opposite to the first direction.
    Type: Application
    Filed: March 25, 2021
    Publication date: July 28, 2022
    Inventors: Ming-Han Wu, Yi-Wei Chen
  • Publication number: 20220214721
    Abstract: A keyboard device includes plural keys, a frame member and an elastic protective film. The frame member includes an outer frame and plural perforations. The keys are disposed within the outer frame. The outer frame has a first surface and a second surface opposed to the first surface. The plural perforations are in communication with the first surface and the second surface. The elastic protective film is fixed on the first surface of the frame member. The plural keys and the plural perforations are covered by the elastic protective film.
    Type: Application
    Filed: February 24, 2021
    Publication date: July 7, 2022
    Inventors: Ming-Han Wu, Yi-Wei Chen
  • Publication number: 20220165755
    Abstract: A pixel array substrate, including a substrate, multiple conductors, a pixel driving circuit, a first pad, and a second pad, is provided. The substrate has a first surface, a second surface, and multiple through holes. The through holes extend from the first surface to the second surface. The conductors are respectively disposed in the through holes. The pixel driving circuit is disposed on the first surface of the substrate. The first pad and the second pad are disposed on the second surface of the substrate. The conductors include a first conductor, a second conductor, and a first dummy conductor. The first conductor is electrically connected to the pixel driving circuit and the first pad. The second conductor is electrically connected to the pixel driving circuit and the second pad. The first dummy conductor is overlapped with and electrically isolated from the pixel driving circuit.
    Type: Application
    Filed: June 28, 2021
    Publication date: May 26, 2022
    Applicant: Au Optronics Corporation
    Inventors: Hsiu-Chun Hsieh, Hsin-Hung Sung, Shu-Hui Huang, Chih-Chung Su, Yi-Wei Chen, Fang-Hui Chan
  • Patent number: 11342022
    Abstract: Multi-stage content addressable memory devices are described. Some embodiments relate to memory devices including a plurality of rows of memory cells, multiple match lines and multiple pre-charge circuits. A first row of the plurality of rows includes a first segment and a second segment. The first segment may include a first subset of the memory cells of the first row and the second segment may include a second subset of the memory cells of the first row. The first match line is coupled to the memory cells of the first subset, and the second match line is coupled to the memory cells of the second subset. The first pre-charge circuit is configured to pre-charge the first match line to a first pre-charge voltage, and the second pre-charge circuit is configured to pre-charge the second match line to a second pre-charge voltage different from (e.g., greater than) the first pre-charge voltage.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: May 24, 2022
    Assignee: MEDIATEK Singapore Pte. Ltd.
    Inventors: Chetan Deshpande, Gajanan Sahebrao Jedhe, Ritesh Garg, Gaurang Prabhakar Narvekar, Yi-Wei Chen
  • Publication number: 20220130839
    Abstract: A method for fabricating buried word line of a dynamic random access memory (DRAM) includes the steps of: forming a trench in a substrate; forming a first conductive layer in the trench; forming a second conductive layer on the first conductive layer, in which the second conductive layer above the substrate and the second conductive layer below the substrate comprise different thickness; and forming a third conductive layer on the second conductive layer to fill the trench.
    Type: Application
    Filed: January 6, 2022
    Publication date: April 28, 2022
    Applicants: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Pin-Hong Chen, Yi-Wei Chen, Tzu-Chieh Chen, Chih-Chieh Tsai, Chia-Chen Wu, Kai-Jiun Chang, Yi-An Huang, Tsun-Min Cheng
  • Publication number: 20220087077
    Abstract: A power converter is provided. The power converter includes a housing, a heat dissipation module, and a first circuit board. The housing forms a receiving space, wherein the housing includes a first housing port and a second housing port. The heat dissipation module is detachably connected to the housing, and disposed in the receiving space. The heat dissipation module includes an inner path that communicates the first housing port with the second housing port. Working fluid enters the inner path via the first housing port. The working fluid leaves the inner path via the second housing port. The first circuit board includes a first circuit board body and a first heat source, wherein the first heat source is disposed on the first circuit board body, and the first heat source is thermally connected to the inner path of the heat dissipation module.
    Type: Application
    Filed: April 1, 2021
    Publication date: March 17, 2022
    Inventors: Sheng-Nan TSAI, Ying-Chung CHUANG, Chia-Jung LIU, Yi-Wei CHEN, Han-Yu TAI, Shao-Hsiang LO